Multi-Pulse Converters for High Voltage and High Power Applications. 2.1 Operating Principles

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1 Multi-Pulse Converters for High Voltage and High Power Applications Sewan Choi, Junyong Oh Seoul National Univ. of Technology Dept. of Control and Instrumentation Eng. 72 Kongnung-Dong, Nowon-Guy Seoul , Korea Phone : Fax : schoi@duck.snut.ac.kr Abstract - This paper proposes a multi-pulse converter for high voltage and high power applications such as HVDC conversion. The proposed technique, based on the dc current reinjection, further decreases the number of components in the auxiliary circuit to achieve the same pulse number Moreover, a control strategy over the whole range of phase delay angle is obtained along with sophisticated input- current and output voltage,analysis. With the pulse multiplication strategy the proposed schemes demonstrate 24-pulse, 36-pulse and 48-pulse characteristics both in the input current and in the output voltage. Experimental results fiom a 3KVA laboratory prototype verijl the proposed concept. Key words : multi-pulse, harmonics, HVDC. Introduction HVDC conversion is implemented mostly by monopolar or bipolar configurations of 2-pulse series - connected thyristor converters. In this case the resulting high contents of 2-pulse related harmonics upto the order of 50 can couple into nearby telephone circuits and cause noise in the communication network. This also may cause misoperation of protective relaying and circuit breakers[. To avoid such undesirable harmonic effects, tuned passive filters have been employed on the ac side of the converter. However, they generate their own harmonic problems including delayed system response following disturbances and suffer from the resonance problem with unknown system impedance. In order to increase the pulse number of the converter, additional bridges and the corresponding phase-shifting eansformers are necessary, and this increases VA rating and cost of the equipment. Several methods have been proposed to increase the pulse number without additional bridges and the corresponding phase-shifting transformers[2-4. A harmonic reduction technique has been proposed to utilize several thyristors connected to taps on the interphase reactor of parallel-connected thyhtor rectifiers[2]. A dc current rejnjection technique which multiplies the pulse number, and hence eliminates Junggoo Cho Korea Electrotechnology Reserch Institute 28- Sungju-dong, Changwon 64-20, Korea Phone : , Fax : jgcho@keri.re.kr harmonics without additional bridges and phase-shifting transformers has been applied to the series-connected thyristor converter for HVDC applications[3]. In this paper, a multi-pulse converter is proposed for high voltage and high power applications such as HVDC conversion. The proposed technique, based on the dc current reinjection [3], further decreases the number of components in the auxiliary circuit to achieve the same pulse number. Moreover, a control strategy over the whole range of phase delay angle is obtained along with sophisticated input current and output voltage analysis. With a pulse multiplication strategy the proposed schemes demonstrate 24-pulse, 36-pulse and 48-pulse characteristics both in the input current and in the output voltage. 2. Proposed 24-Pulse Scheme 2. Operating Principles Fig. shows the proposed 24-pulse converter.which is identical to the conventional 2-pulse series-connected converter with the addition of an auxiliary circuit consisting of transformer Tr,, Tr, and two voltage dividing capacitors C, and C, and two thyristors T, and T,. Output voltage vo, of the upper bridge and output voltage v,, of the lower bridge have 6-pulse characteristics according to the phase delay angle ct and Fig. Proposed 24-pulse converter

2 T r > t (a) T, ON (b) Tq ON Fig. 3 Operation of auxiliary circuit and carries output current I,. This induces the negative current i,,, = -(",)I,. With the repeated firing of the two thyristors, current i, is induced at the primary side of the transformer T, as shown in Fig. 2. The current i, is equally divided into two currents ip and iq and alters current iol in the positive rail and current ioz in the negative rail, respectively. Then, rectifier output currents io, and io2 can be expressed as, Fig. 2 Various waveforms (Vu=l(PU),I,=l(PU), N~,=0.984,a=3Oo) are displaced in phase by 30". Fig. 2 shows the various waveforms for the voltages and currents of the proposed 24-pulse scheme in Fig. at phase delay angle of 30". Assuming a negligible ripple voltage in capacitors C, and C,, voltage v, across the primary side of transformer Tr, is given by, vm = 4Vo, - v,) () 2 Voltage v, varies with each phase delay angle a and its fiequency is six times the mains fiequency. Fig. 3 describes the operation of two thyristors connected to the secondary,winding of transformer Tr, in the auxiliary circuit. Suppose that thyristor T, is fired at angle p, which is measured fiom the zero crossing of the voltage v,(see Fig. 2). Since v, is forward biased at this moment, thyristor T, is turned on and carries output current I,. This causes positive current i, = (NJNp)Io to be induced at the primary winding of transformer T,. Again, if thyristor Tq is fired at angle p,, thyristor Tq is turned on w io, = Io - -im (2) 2 Now, switching function Sa, for phase 'a' of the upper bridge is defined to relate bridge output current iol to bridge input current i,, as shown i.n Fig. 4. The switching functions for phase 'b ' and 'c ' (can also be defined by, s,, = S#,L - 20" SCI = S#,L + 20" (3) Similarly, the switching function!; for the lower bridge can be defined by, Sa, = Sm,L - 30" S, = S,,L - 30" (4) S, = S,L - 30" Then, the bridge input currents car be expressed in terms of the bridge output currents and switching fhctions as, Fig. 4Switching function Sa, for phase' a'

3 From the MMF balance equation of the main transformer shown in Fig., the input line current for phase 'a' can be expressed in terms of the bridge input currents as, in = io, + -(io, J5 - i,) Then, from (2)-(6) input current i, can be expressed as, It can easily be noticed that the input current waveform depends on the induced current i, that is, on turns ratio The of transformer Tr, and firing angles p, and p,. optimum turns ratio has been found to be N&=0.984 for diode rectifier in [5]. The optimum firing angles p, and p, for the lowest input current THD can be obtained at each phase delay angle a as shown in Fig. 5. Note that the minimum THD of 6.62% could be obtained over the whole range of angle a between 0" and 80". This illustrates that the input current has 24-pulse characteristic with elimination of harmonics upto the order of 9. The output voltage vw between nodes 'p' and 'q' is v, = v,, + vo2 and is identical to the output voltage waveform of the conventional 2-pulse converter as shown in Fig. 2. On the other hand, the output voltage v, of the proposed scheme is given by, vo = vpi + vx (8) When thyristor T, is turned on the voltage v, becomes v, = (N&) v, and when T, is turned on it becomes v, = - (N/N,) v,. The voltage v, is added to the voltage vw, and finally the output voltage v, has 24-pulse characteristic as shown in Fig Component Ratings In this section the VA ratings of the transformers and the thyristors employed in the proposed scheme are determined and the blocking capacitor is designed. The voltage v, of transformer Tr, varies with phase delay 0 I6. E:v PO. 800 a Fig. 6 VA rating of transformers T, and T, i angle a and has the largest RMS value at angle a = 90". Then the maximum VA rating of the transformer Tr, is obtained by, VA_ =0.443Vu ~0.984~ =0.6VoIs (9) The voltage across the transformer Tr, also varies with phase delay angle a and has the largest RMS value at angle a = 90". Then the maximum VA rating of the transformer Tr, is obtained by, VApl = Vu ~0.492 Io = 0.09V00 (0) The VA ratings of the transformers Tr, and Tr, at each phase delay angle are shown in Fig. 6. The total transformer VA rating in the auxiliary circuit becomes maximum of 0.25P0 at angle a = 90" and minimum of 0.066P0 at angle a = 0". The VA rating of the phaseshifting transformer has also been calculated and is listed in Table I. Ratings of the main thyristor and the auxiliary thyristor are also listed in Table I. Phase Shifting Transformer Table I. Component rating Transformer Tr, VAN.. I ~ VJV, N/A ls.yl TransformcrTr, IJ, N/A % VAN.. N/A VJV, I.44,.44 ~ Main Thyristor IJ. I I I I r/ THD * 6.6% I TappingThyristor. 0' s. a 65' 80' Fig. 5 Optimum fring angles e,, p, V-JV, I N/A I I I IJ. I N/A I I I 0.5

4 I I - Fig. 7 Capacitor current and Capacitor voltage A large ripple in voltage vcp due to small capacitance C, may distort the commutation voltage v,, which may in turn cause a commutation failure of the auxiliary thyristors. Therefore, capacitance C;(C,) should be determined taking into account the permissible level of the ripple voltage. Fig. 7 shows the current flowing through capacitor C,, ip,and the voltage across the capacitor, vcp. The ripple voltage amplitude Vripple ch be expressed as I =- *cp The average voltage V, of capacitor is, vcp = - Vsdc (3) 2 Defining a ripple factor K, = Vripple / V, of capacitor voltage, the capacitance can be determined by, cp =- KP vu 3. Pulse Multiplication J (a) 36-Pulse (b) 48-Pluse Fig. 9 Waveforms for auxiliary circuit (a=30") L Fig. 8. As shown in Fig. 9, firing order for natural commutation must be fiom the right to the left'when voltage v, is positive whereas it must be f?om the left to the right when voltage v, is negative. Equations ()-(9) fiom the analysis of input ciment and output voltage, which are also valid for higher pulse operation, give optimum tap position of the auxiliary thyristors and control angles for the thyristlors to minimize the input current harmonics. The optimum tap position is found to be NJN, =.309 for 36-pulse operation and N,,/NP = 0.977, N,/N, = 0.50 for 48-pulse operation. Fig. 0 shows the optimum firing angles for the lowest THD of the input current at each phase delay angle a. PSIM Simulation results for 36-pulse scheme and 48-pulse scheme are shown in Fig. and Fig. 2, respectively. With the appropriate firing of the auxiliary thyristors the minimum THD of the input current has been shown to be 4.0% for 36-pulse scheme imd 3.08 % for 48-pulse scheme over the range of phase delay angle a between 5" and 75". Component ratings of each multi-pulse scheme are listed in Table I. The proposed technique for 24-pulse operation described in section 2 can be extended for higher pulse operation such as 36-pulse, 48-pulse etc, al. For pulse multiplication, PT@ additional auxiliary thyristors are connected to the taps on the transformer T, as shown in - v. + - v. + N. i. N. i. ;. T,QTp;2 (a) 36-Pulse (b) 48-Pulse Fig. 8 Auxiliary circuit Fig. 0 Optimum firing angles

5 ~ a m a m mm Mm _m w m nl m, (a) Input current i, *mm 3". I m... om _m -5 m m m a m sm m (b) Output voltage v, Fig. Simulation results for 36-Pulse opration(a=30") a m.sa m 7".Ism 4" a m *m m (a) Input current i, Fig 3. HVDC sending end with the proposed scheme HVDC and monopolar HVDC configurations. 5. Experimental Results The proposed 24-pulse converter shown in Fig. has been implemented with the condition of turns ratio NJNp = 0.984, phase delay angle a = 30" and optimum firing angle, pp= 5" and ps= 45". Fig. 4(a) shows current i,,, which is equally divided into two currents ip and iq. Bridge output current io, and bridge input current i,, are shown in Fig. 4(b) and Fig. 4(c), respectively. Finally, Fig. 4(d) shows input current i,. which is near sinusoidal in shape with the absence of the S', 7h, ll*, 3*, lth and 9* harmonics. Voltage vw, shown in Fig. 4(e), is the output voltage of the conventional 2-pulse converter. Output voltage v, of the proposed converter is shown in Fig. 4(f). Note that the waveform for output voltage v, illustrates the 24-pulse characteristic. (b) Output voltage v, Fig. 2 Simulation results for 48-Pulse operation(a=30 ) 4. HVDC Applications Fig. 3 shows bipolar configuration of the proposed multi-pulse converter for HVDC sending end. Groupd is connected to node 'r' of upper converter system providing positive pole and node 'p' of lower converter system providing negative pole. Bipolar HVDC receiving end of the proposed multi-pulse converter can also be configured in the same way. The proposed scheme does not necessitate ac side filters for elimination of the lth and 3h harmonics due to multipulse operation. Moreover, the proposed multi-pulse converter schemes can be applied to back-to-back tie (a) Current i,,(b) Bridge output current io,

6 (c) Bridge input current in, have been determined via thorough input current and output voltage analysis. Wilh the proposed pulse multiplication, THDs both of input current and of output voltage could be kept minimum over the whole range of phase delay angle. Component ratings of each multipulse scheme have been compared. The proposed scheme is an economic way to realize high performance HVDC conversion. The experimental results from the proposed 24-pulse scheme validate the proposed pulse multiplication technique. References (d) Input current in (e) Voltage vw t I I I I [l] G. D. Breuer and R. L. Hauth, HVDC s Increasing Popularity, IEEE Potentials, pp. 8-2, May 988 [2] S. Miyairi, etc. al, New Method for Reducing Harmonics Involved in Input and Output of Rectifier with Interphase Transformer, IEEE Trans. on Industry Applications, pp , vol. IA-22, no. 5, Sep/Oct 986. [3] J.F. Baird and J. Arrillaga, Harmonic reduction in DC Ripple Reinjection, pp , IEE Proceedings, Vol. 27, Part C, No. 5, Sep. 980, [4] J. Arrillaga and M. VillalAanca, 24-Pulse HVDC Conversion, pp , IEE Proceeding, Vol. 38, Part C, No., Jan. 99, [5] S. Choi, J. Oh, K. Kim and J Cho, A New 24- Pulse Diode Rectifier for High Voltage and High Power Applications, IEEE Power Electronics Specialist Conference, pp , June 999 (f) Output voltage v, Fig. 4 Experimental results of the proposed 24-Pulse converter at a=30 (4Ndiv,200V/div) 6. Conclusions In this paper a multi-pulse converter for high voltage and high power applications has been proposed. The proposed schemes, based on the conventional 2-pulse converter, employ an auxiliary circuit consisting of thyristors and low KVA transformer. Tap position and control angles for minimum THD of the input current