Newhaven Display International, Inc Galvin Ct. Elgin IL, Ph: Fax:

Transcription

1 NHD22CWAY3 Character OLED Display Module NHD Newhaven Display 22 2 Lines x 2 Characters CW Character OLED Module A Model Y Yellow 3 2.4V~5.5V Supply Voltage Newhaven Display International, Inc. 266 Galvin Ct. Elgin IL, 624 Ph: Fax: nhtech@newhavendisplay.com nhsales@newhavendisplay.com

2 Document Revision History Revision Date Description Changed by 2/5/24 Initial Release AK 4/6/25 Pin Description, Electrical Characteristics Updated PB 2 2//6 Recommended Connector P/Ns Added SB 3 2/3/7 Quality Table and Mechanical Drawing, I2C Interface TM Updated Functions and Features 2 lines x 2 characters Builtin LCD comparable controller 4/8bit Parallel, SPI, or I²C MPU interface 2.8V or 5.V operation RoHS compliant Slim design [2]

3 Mechanical Drawing A B C Newhaven Display NHD22CW_RevB PROPRIETARY Notes: D. Color: Yellow 2. Display format: 2 line x 2 character 3. Supply Voltage: 2.4V~5.5V Unit 4. Interface: 4/8bit Parallel, SPI, I²C mm 5. Controller: US266 Gen. Tol. Date Part Number: 6. Recommended FFC Connector: MOLE ±.3 2/3/7 NHD22CWAY The information contained herein is the exclusive property of Newhaven Display International, Inc. and shall not be copied, reproduced, and/or disclosed in any format without permission. [3] A B C D

4 Pin Description Parallel Interface: Pin No. Symbol External Connection Function Description V SS Power Supply Ground 2 V DD Power Supply Supply Voltage for OLED and Logic VDD=2.8V for 2.8V operation, VDD=5V for 5V operation 3 REGV DD Power Supply Internal 5V I/O Regulator select signal REGVDD=V for 2.8V operation, REGVDD=5V for 5V operation 4 D/C MPU Data/Command select signal. D/C=: Command, D/C=: Data 5 R/W MPU Read/Write select signal, R/W=: Read R/W=: Write 6 E MPU Operation Enable signal. Falling edge triggered. 7 DB DB3 MPU Four low order bidirectional threestate data bus lines. These four are not used during 4bit operation. 4 DB4 DB7 MPU Four high order bidirectional threestate data bus lines. 5 /CS MPU Active LOW Chip Select signal 6 /RES MPU Active LOW Reset signal 79 BS BS2 MPU MPU interface select signal 2 V SS Power Supply Ground Serial Interface: Pin No. Symbol External Connection Function Description V SS Power Supply Ground 2 V DD Power Supply Supply Voltage for OLED and Logic VDD=2.8V for 2.8V operation, VDD=5V for 5V operation 3 REGV DD Power Supply Internal 5V I/O Regulator select signal REGVDD=V for 2.8V operation, REGVDD=5V for 5V operation 46 NC No Connect. Tie to Ground 7 SCLK MPU Serial Clock signal 8 SDI MPU Serial Data Input signal 9 SDO MPU Serial Data Output signal 4 NC No Connect. Tie to Ground 5 /CS MPU Active LOW Chip Select signal 6 /RES MPU Active LOW Reset signal 79 BS BS2 MPU MPU interface select signal 2 V SS Power Supply Ground I²C Interface: Pin No. Symbol External Connection Function Description V SS Power Supply Ground 2 V DD Power Supply Supply Voltage for OLED and Logic VDD=2.8V for 2.8V operation ONLY, 5V mode not supported 3 REGV DD Power Supply Internal 5V I/O Regulator select signal REGVDD=V for 2.8V operation ONLY, 5V mode not supported 4 SA MPU Slave Address select signal 56 NC No Connect. Tie to Ground 7 SCL MPU Serial Clock signal 8 SDAIN MPU Serial Data Input. 9 SDAOUT MPU Serial Data Output. Tie together with SDAIN (pin 8) 5 NC No Connect. Tie to Ground 6 /RES MPU Active LOW Reset signal 79 BS BS2 MPU MPU interface select signal 2 V SS Power Supply Ground [4]

5 MPU Interface Pin Selections Pin Name 4bit Parallel 68 interface 4bit Parallel 88 interface 8bit Parallel 68 interface 8bit Parallel 88 interface Serial Interface I²C Interface BS BS BS2 MPU Interface Pin Assignment Summary Bus Data/Command Interface Control Signals Interface D7 D6 D5 D4 D3 D2 D D E R/W /CS D/C /RES 4bit 68 D[7:4] Tie LOW E R/W /CS D/C /RES 4bit 88 D[7:4] Tie LOW /RD /WR /CS D/C /RES 8bit 68 D[7:] E R/W /CS D/C /RES 8bit 88 D[7:] /RD /WR /CS D/C /RES SPI Tie LOW SDO SDI SCLK Tie LOW /CS Tie LOW /RES I²C Tie LOW SDAOUT SDAIN SCL Tie LOW SA /RES [5]

6 Electrical Characteristics Item Symbol Condition Min. Typ. Max. Unit Operating Temperature Range T OP Absolute Max ⁰C Storage Temperature Range T ST Absolute Max 4 +9 ⁰C Supply Voltage for logic V DD V Supply Voltage for I/O Regulator REGV DD V DD = 5V V Supply Current I DD 7 35 ma Sleep Mode Current I DDSLEEP 2 5 ma H Level input V IH.8 * V DD V DD V L Level input V IL V SS.2 * V DD V H Level output V OH.9 * V DD V DD V L Level output V OL V SS. * V DD V Optical Characteristics Item Symbol Condition Min. Typ. Max. Unit Top ϕy+ 8 ⁰ Optimal Bottom ϕy 8 ⁰ Viewing CR,: Left θ 8 ⁰ Angles Right θ+ 8 ⁰ Contrast Ratio CR,: Response Time Rise T R µs Fall T F µs Brightness L V 5% checkerboard 2 5 cd/m 2 Lifetime T OP =25 C 5% checkerboard 8, Hrs. Note: Lifetime at typical temperature is based on accelerated hightemperature operation. Lifetime is tested at average 5% pixels on and is rated as Hours until HalfBrightness. The Display OFF command can be used to extend the lifetime of the display. Luminance of active pixels will degrade faster than inactive pixels. Residual (burnin) images may occur. To avoid this, every pixel should be illuminated uniformly. Controller Information Builtin US266 controller. Please download specification at DDRAM Address A B C D E F A 4B 4C 4D 4E 4F [6]

7 Table of Commands. Fundamental Command List Command IS RE SD D/C# R/W# (WR#) Instruction Code D7 D6 D5 D4 D3 D2 D D Clear Display Return Home * Description Write "2H" to DDRAM and set DDRAM address to "H" from AC. Set DDRAM address to "H" from AC and return cursor to its original position if shifted. The contents of DDRAM are not changed. Entry Mode Set Display ON/ OFF Control Extended Function Set I/D S BDC BDS D C B FW BW NW Assign cursor / blink moving direction with DDRAM address. I/D = "": cursor/ blink moves to right and DDRAM address is increased by (POR) I/D = "": cursor/ blink moves to left and DDRAM address is decreased by Assign display shift with DDRAM address. S = "": make display shift of the enabled lines by the DS4 to DS bits in the shift enable instruction. Left/ right direction depends on I/D bit selection. S = "": display shift disable (POR) Common bidirection function. BDC = "": COM3 > COM BDC = "": COM > COM3 Segment bidirection function. BDS = "": SEG99 > SEG, BDS = "": SEG > SEG99 Set display/cursor/blink ON/OFF D = "": display ON, D = "": display OFF (POR), C = "": cursor ON, C = "": cursor OFF (POR), B = "": blink ON, B = "": blink OFF (POR). Assign font width, black/white inverting of cursor, and 4line display mode control bit. FW = "": 6dot font width, FW = "": 5dot font width (POR), B/W = "": black/white inverting of cursor enable, B/W = "": black/white inverting of cursor disable (POR) NW = "": 3line or 4line display mode NW = "": line or 2line display mode [7]

8 . Fundamental Command Set Command IS RE SD Cursor or Display Shift Double Height (4 Line)/ Displaydot Shift D/C# R/W# (WR#) Instruction Code D7 D6 D5 D4 D3 D2 D D S/C R/L * * UD2 UD * DH Shift Enable DS4 DS3 DS2 DS Scroll Enable HS4 HS3 HS2 HS Description Set cursor moving and display shift control bit, and the direction, without changing DDRAM data. S/C = "": display shift, S/C = "": cursor shift, R/L = "": shift to right, R/L = "": shift to left UD2~: Assign different doubt height format (POR=b) Refer to Table 72 for details DH = "": display shift enable DH = "": dot scroll enable (POR) DS[4:]=b (POR) when DH = b Determine the line for display shift. DS = "/": st line display shift enable/disable DS2 = "/": 2nd line display shift enable/disable DS3 = "/": 3rd line display shift enable/disable DS4 = "/": 4th line display shift enable/disable. HS[4:]=b (POR) when DH = b Determine the line for horizontal smooth scroll. HS = "/": st line dot scroll enable/disable HS2 = "/": 2nd line dot scroll enable/disable HS3 = "/": 3rd line dot scroll enable/disable HS4 = "/": 4th line dot scroll enable/disable. * N DH RE () IS Numbers of display line, N when N = "": 2line (NW=b) / 4line (NW=b), when N = "": line (NW=b) / 3line (NW=b) DH = / : Double height font control for 2line mode enable/ disable (POR=) Function Set Extension register, RE ("") Extension register, IS * N BE RE () REV CGRAM blink enable BE = b: CGRAM blink enable BE = b: CGRAM blink disable (POR) Extension register, RE ("") Reverse bit REV = "": reverse display, REV = "": normal display (POR) [8]

9 . Fundamental Command Set Command IS RE SD Set CGRAM Address Set DDRAM Address Set Scroll Quantity Read Busy Flag and Address/ Part ID D/C# R/W# (WR#) Instruction Code D7 D6 D5 D4 D3 D2 D D AC5 AC4 AC3 AC2 AC AC AC6 AC5 AC4 AC3 AC2 AC AC * SQ5 SQ4 SQ3 SQ2 SQ SQ BF Write Data D7 D6 D5 D4 D3 D2 D D AC6 / ID6 AC5 / ID5 AC4 / ID4 AC3 / ID3 AC2 / ID2 AC / ID AC / ID Description Set CGRAM address in address counter. (POR= ) Set DDRAM address in address counter. (POR= ) Set the quantity of horizontal dot scroll. (POR= ) Valid up to SQ[5:] = b Can be known whether during internal operation or not by reading BF. The contents of address counter or the part ID can also be read. When it is read the first time, the address counter can be read. When it is read the second time, the part ID can be read. BF = "": busy state BF = "": ready state Write data into internal RAM (DDRAM / CGRAM). Read Data D7 D6 D5 D4 D3 D2 D D Read data from internal RAM (DDRAM / CGRAM). 2. Extended Command Set Command IS RE SD Function Selection A Function Selection B D/C# R/W# (WR#) Instruction Code Hex D7 D6 D5 D4 D3 D2 D D 7 A[7:] 72 * A 7 A 6 A 5 A 4 A 3 A 2 A A * * * ROM ROM OPR OPR Description A[7:] = h, Disable internal V DD regulator at 5V I/O application mode A[7:] = 5Ch, Enable internal V DD regulator at 5V I/O application mode (POR) OPR[:]: Select the character no. of character generator OPR[: CGRO CGRA ] M M b 24 8 b b 25 6 b 256 ROM[:]: Select character ROM RO[:] b b b b ROM A B C Invalid OLED Characteriza tion 78/79 SD Extension Register, SD SD=b: OLED Command set is disabled (POR) SD=b: OLED Command set is enabled. [9]

10 3. OLED Command Set Command IS RE SD Set Contrast Control D/C # R/W# (WR#) Instruction Code Hex D7 D6 D5 D4 D3 D2 D D 8 A[7:] A 7 A 6 A 5 A 4 A 3 A 2 A A Description Double byte command to select out of 256 contrast steps. Contrast increases as the value increases. (POR = 7Fh ) Set Display Clock Divide Ratio / Oscillator Frequency Set Phase Length Set SEG Pins Hardware Configuration D5 A[7:] D9 A[7:] DB A[6:4] A 7 A 6 A 5 A 4 A 3 A 2 A A A 7 A 6 A 5 A 4 A 3 A 2 A A A 6 A 5 A 4 A[3:]: Define the divide ratio {D) of the display clocks (DCLK) divide ratio = A[3:] + (POR=b) A[7:4]: Set the Oscillator Frequency, FOSC. Oscillator Frequency increases with the value of A[7:4] and vice versa. (POR=b) Range:b~b Frequency increases as setting value increases. A[3:]: Phase period of up to 32 DCLK; clock is an valid entry with 2 DCLK (POR=b) A[7:4]: Phase 2 period of up to 5 DCLK; clock is invalid entry (POR=b) A[6:4] Hex Code VCOMH Deselect level b h ~.65 x V CC b h ~.7 x V CC B 2h ~.77 x V CC (POR) 3h ~.83 x V CC b 4h x V CC []

11 . OLED Command Set Command IS RE SD D/C # R/W# (WR#) Instruction Code Hex D7 D6 D5 D4 D3 D2 D D DC A[7:] A 7 A 6 A 5 A 4 A 3 A 2 A A Description Set VSL & GPIO Set VSL: A[7] = b: Internal VSL (POR) A[7] = b: Enable external VSL Function Selection C Set GPIO: A[:]= b represents GPIO pin HiZ, input disabled (always read as low) A[:]= b represents GPIO pin HiZ, input enabled A[:]= b represents GPIO pin output Low (RESET) A[:]= b represents GPIO pin output High 23 A[5:] * * A 5 A 4 A 3 A 2 A A A[5:4] = b Disable Fade Out / Blinking Mode[RESET] A[5:4] = b Enable Fade Out mode. Once Fade Mode is enabled, contrast decrease gradually to all pixels OFF. Output follows RAM content when Fade mode is disabled. Set Fade Out and Blinking A[5:4] = b Enable Blinking mode. Once Blinking Mode is enabled, contrast decrease gradually to all pixels OFF and then contrast increases gradually to normal display. This process loops continuously until the Blinking mode is disabled. A[3:] : Set time interval for each fade step A[3:] Time interval of for each fade step b 8 Frames b 6 Frames b 24 Frames : : b 2 Frames b 28 Frames []

12 Timing Characteristics 68Series Parallel Interface: Symbol Parameter Min Typ Max Unit t cycle Clock Cycle Time (write cycle) 4 ns t AS Address Setup Time 3 ns t AH Address Hold Time 7 ns t CS Chip Select Time ns t CH Chip Select Hold Time ns t DSW Write Data Setup Time 35 ns t DHW Write Data Hold Time 8 ns t DHR Read Data Hold Time 3 ns t OH Output Disable Time 9 ns t ACC Access Time (RAM) Access Time (command) 25 ns PW CSL Chip Select Low Pulse Width (read RAM) Chip Select Low Pulse Width (read Command) Chip Select Low Pulse Width (write) ns ns ns PW CSH Chip Select High Pulse Width (read) Chip Select High Pulse Width (write) ns ns t R Rise Time 5 ns t F Fall Time 5 ns Condition : /CS low pulse width > E high pulse width [2]

13 Condition 2: /CS low pulse width < E high pulse width [3]

14 88Series Parallel Interface: Symbol Parameter Min Typ Max Unit t cycle Clock Cycle Time (write cycle) 4 ns t AS Address Setup Time 3 ns t AH Address Hold Time 7 ns t CS Chip Select Time ns t CSH Chip Select hold time to read signal ns t DSW Write Data Setup Time 35 ns t DHW Write Data Hold Time 8 ns t DHR Read Data Hold Time 3 ns t OH Output Disable Time 7 ns t ACC Access Time (RAM) Access Time (command) 25 ns PW CSL PW CSH Chip Select Low Pulse Width (read RAM) t PWLR Chip Select Low Pulse Width (read Command) t PWLR Chip Select Low Pulse Width (write) t PWLW Chip Select High Pulse Width (read) t PWHR Chip Select High Pulse Width (write) t PWHW t R Rise Time 5 ns t F Fall Time 5 ns ns ns ns ns ns [4]

15 Serial Interface: Symbol Parameter Min Typ Max Unit t C Serial Clock Cycle Time 2 µs t R, t F Serial clock rise/fall time 5 ns t W Serial clock width (high, low) 4 ns t su Chip select setup time 6 ns t h Chip select hold time 2 ns t su2 Serial input data setup time 2 ns t h2 Serial input data hold time TBD ns t D Serial output data delay time TBD ns t DH Serial output data hold time 7 ns [5]

16 I²C Interface: Symbol Parameter Min Typ Max Unit t cycle Clock Cycle Time 2.5 µs t HSTART Start Condition Hold Time.6 µs t HD Data Hold Time (for SDA OUT pin) 5 ns Data Hold Time (for SDA IN pin) 3 ns t SD Data Setup Time ns t SSTART Start condition setup time (Only for a repeated Start Condition).6 µs t SSTOP Stop condition Setup Time.6 µs t R Rise Time for data and clock pin 3 ns t F Fall Time for data and clock pin 3 ns t IDLE Idle Time before a new transmission can start.3 µs [6]

17 Builtin Font Tables [7]

18 [8]

19 [9]

20 Example Program Code void command(char i) { C_S = ; P = i; D_C = ; R_W = ; E = ; delayms(); E = ; } //chip select LOW active //data on port //data/command select LOW command //read/write select LOW write //enable HIGH //delay //enable LOW data latched void data(char i) { C_S = ; P = i; D_C = ; R_W = ; E = ; delayms(); E = ; } //chip select LOW active //data on port //data/command select HIGH data //read/write select LOW write //enable HIGH //delay //enable LOW data latched void output() { int i; command(x); command(x2); for(i=;i<2;i++) { } //clear display //return home data(xf); } command(xc); //line 2 for(i=;i<2;i++) { } data(xf); //write solid blocks //write solid blocks void init() { RES = ; delayms(); command(x2a); command(x7); data(x); command(x28); command(x8); command(x2a); command(x79); command(xd5); //reset HIGH inactive //delay //function set (extended command set) //function selection A // disable internal VDD regulator (2.8V I/O). data(x5c) = enable regulator (5V I/O) //function set (fundamental command set) //display off, cursor off, blink off //function set (extended command set) //OLED command set enabled //set display clock divide ratio/oscillator frequency [2]

21 } command(x7); command(x78); command(x8); command(x6); command(x72); data(x); command(x2a); command(x79); command(xda); command(x); command(xdc); command(x); command(x8); command(x7f); command(xd9); command(xf); command(xdb); command(x4); command(x78); command(x28); command(x); command(x8); command(xc); delayms(); //set display clock divide ratio/oscillator frequency //OLED command set disabled //extended function set (2lines) //COM SEG direction //function selection B //ROM CGRAM selection //function set (extended command set) //OLED command set enabled //set SEG pins hardware configuration //set SEG pins hardware configuration //function selection C //function selection C //set contrast control //set contrast control //set phase length //set phase length //set VCOMH deselect level //set VCOMH deselect level //OLED command set disabled //function set (fundamental command set) //clear display //set DDRAM address to x //display ON //delay void main(void) { init(); while() { output(); delayms(2); } } [2]

22 Quality Information Test Item Content of Test Test Condition Note High Temperature Test the endurance of the display at +9⁰C, 24hrs 2 storage high storage temperature. Low Temperature Test the endurance of the display at 4⁰C, 24hrs,2 storage low storage temperature. High Temperature Operation Test the endurance of the display by applying electric stress (voltage & +85⁰C, 24hrs 2 Low Temperature Operation High Temperature / Humidity Operation Thermal Shock resistance Vibration test current) at high temperature. Test the endurance of the display by applying electric stress (voltage & current) at low temperature. Test the endurance of the display by applying electric stress (voltage & current) at high temperature with high humidity. Test the endurance of the display by applying electric stress (voltage & current) during a cycle of low and high temperatures. Test the endurance of the display by applying vibration to simulate transportation and use. 4⁰C, 24hrs,2 +6⁰C, 9% RH, 24hrs,2 4⁰C, 3min > 25⁰C, 5min > 85⁰C, 3min = cycle For cycles 22Hz,.5mm amplitude. 225Hz,.5G 3min in each of 3 directions,y,z Static electricity test Test the endurance of the display by V S =8V, R S =.5kΩ, C S =pf applying electric static discharge. One time Note : No condensation to be observed. Note 2: Conducted after 2 hours of storage at 25⁰C, %RH. Note 3: Test performed on product itself, not inside a container. Evaluation Criteria: : Display is fully functional during operational tests and after all tests, at room temperature. 2: No observable defects. 3: Luminance >5% of initial value. 4: Current consumption within 5% of initial value 3 Precautions for using OLEDs/LCDs/LCMs See Precautions at Warranty Information and Terms & Conditions [22]