Optimized Design of a Dual-Band Power Amplifier With SiC Varactor-Based Dynamic Load Modulation

Transcription

1 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 63, NO. 8, AUGUST Optimized Design of a Dual-Band Power Amplifier With SiC Varactor-Based Dynamic Load Modulation César Sánchez-Pérez, Mustafa Özen, Christer M. Andersson, Dan Kuylenstierna, Member, IEEE, Niklas Rorsman, Member, IEEE, and Christian Fager, Member, IEEE Abstract A new methodology for the design of single/multiband power amplifiers (PAs) with dynamic load modulation (DLM) is presented. First, the topology for the output matching network (OMN) including the control varactor is selected. A comprehensive optimization of the OMN parameters is then developed by which varactor and transistor losses are considered to ensure maximum efficiency enhancement at each frequency. To verify the method, a dual-band PA with DLM is realized. Drain efficiencies of 75% and 60% at 685 MHz and 1.84 GHz, respectively, are measured at peak output power. At 10-dB output power back-off efficiencies of 43.5% and 49.5%, respectively, are obtained. Linearized modulated measurements with a 6.5-dB peak-to-average power ratio WCDMA signal show average drain efficiencies of 56% and 54% at 685 MHz and 1.84 GHz, respectively, at an adjacent channel leakage ratio of 49 and 47.5 dbc, respectively. The proposed method shows the effectiveness of applying an optimization process for the design of single- or multi-band DLM PAs. The results demonstrate that near-optimum performance may be obtained in terms of efficiency enhancement for a given transistor and varactor-based OMN, thus making DLM competitive against other load modulation techniques. Index Terms Dual band, dynamic load modulation (DLM), gallium nitride (GaN), high efficiency, power amplifier (PA), silicon carbide (SiC), tunable matching network, varactor. I. INTRODUCTION T HE increasing demand for higher data rates in mobile communications is pushing a quick development and deployment of standards like long-term evolution (LTE). The complex modulation schemes used in these standards lead to high values of peak-to-average powerratio(papr)inthetransmitted signals. Furthermore, there exists an important spectrum fragmentation, e.g., the LTE frequency bands are allocated from 700 MHz up to 2700 MHz. This situation constitutes a problem for the design of efficient high power amplifiers (PAs). Manuscript received October 28, 2014; revised April 06, 2015 and May 16, 2015; accepted May 22, Date of publication June 23, 2015; date of current version August 04, This work was supported in part by the Swedish Governmental Agency for Innovation Systems (VINNOVA). C. Sánchez-Pérez was with the Department of Microtechnology and Nanoscience, Chalmers University of Technology, SE Göteborg, Sweden. He is now with Qamcom Research and Technology AB, Göteborg, Sweden ( cesar.sanchez@qamcom.se). M. Özen, D. Kuylenstierna, N. Rorsman, and C. Fager are with the Department of Microtechnology and Nanoscience, Chalmers University of Technology, SE Göteborg, Sweden. ( christian.fager@chalmers.se). C. M. Andersson is with the Information Technology Research and Development Center, Mitsubishi Electric Corporation, Kamakura, Japan. Color versions of one or more of the figures in this paper are available online at Digital Object Identifier /TMTT The use of broadband or multi-band approaches is therefore highly desired to reduce transmitter complexity and cost. In this context, the use of dual-band PAs that can efficiently amplify signals with large PAPR is gaining a lot of attention [1], [2]. Various efficiency enhanced PA architectures have been proposed, mainly envelope-tracking (ET) [3] [5], outphasing [6], [7], and especially Doherty [8] [10]. Doherty and outphasing architectures are inherently narrowband and significant efforts have therefore been made to develop broadband or dual/multiband designs. Dual-band and multi-band Doherty PAs with excellent performance have been recently presented [1], [2], as well as broadband Doherty/outphasing transmitters [11]. As an alternative to those PA architectures, varactor-based dynamic load modulation (DLM) has been successfully explored in recent years [12] [19]. The single-band varactor-based DLM PA, including linearization, has been successfully demonstrated at gigahertz frequencies [16] and high output power levels [19]. A few examples of broadband/multiband DLM PAs can also be found. In [13], a multi-band 0.9/1.8/1.9/2.1-GHz PA was presented. However, the peak and back-off efficiency at the lower frequency band are low and the output power is limited to 28 dbm. Moreover, it makes use of two control varactors, which complicates the design and the operation with modulated signals. A recent paper by Chen and Peroulis [17] showed a 10-W broadband GHz DLM PA approach with excellent peak and back-off efficiency performance. However, the drain bias was reconfigured versus frequency and the power utilization factor is low since a 25-W transistor was used. Furthermore, no modulated measurements or linearization of the transmitter are included in that paper. DLM PAs should, theoretically, offer the same efficiency enhancement as Doherty or any other load-modulation-based PA architecture. The DLM PA efficiency enhancement is, however, limited by varactor losses and nonoptimum load trajectory realization [15]. Additionally, for broadband or multi-band implementations, the output matching network (OMN) design gets even more complicated, especially if second harmonic terminations are also considered. These problems have made DLM PAs not competitive against other architectures like Doherty PAs. In this paper, we present a generic procedure for realization of highly efficient single-band, multi-band, or broadband DLM PAs. In contrast to previous work, a comprehensive optimization procedure is proposed, which allows the joint performance of the transistor and varactors to be exploited, independent of the OMN topology or varactor technology used. The optimization is based on linear simulations and is therefore very fast compared to using harmonic-balance simulations. To verify the method, IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See for more information.

2 2580 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 63, NO. 8, AUGUST 2015 a dual-band silicon carbide (SiC) varactor-based DLM PA is designed and built. Both static and digital pre-distortion (DPD) linearized measurements are presented, demonstrating excellent results that validate the proposed methodology. This paper is organized as follows. Section II describes the generic design methodology in detail. Section III is focused on the specific dual-band DLM PA design. Static and modulated measurements are presented in Section IV. Conclusions are finally summarized in Section V. II. DESIGN METHODOLOGY The first step of the DLM design methodology is to characterize the transistor under different fundamental and second harmonic load impedance conditions. Thereafter, the topology of the OMN including the varactors is selected and an optimization process is carried out to maximize the average efficiency at the different frequencies. This optimization process relies on simple linear calculations. Using the load pull (LP) transistor characterization data and the linear calculations it is possible to predict the average efficiency of the DLM PA, using the probability density function (PDF) of a modulated signal, at the different frequencies. This outcome is used as the fitness function by the optimization algorithm. As a final result, the OMN features to be optimized, e.g., component values and/or transmission-line dimensions, are returned. This method can be used for single-band designs or more complex multi-band designs. Increasing the number of bands brings, of course, more complexity and tradeoffs. A. Transistor Characterization As a starting point for the design and optimization process, transistor characterization based on LP simulations (alternatively measurements) are carried out to determine the optimum load trajectories [15]. Without loss of generality, LP simulation data is used to describe the design methodology. It should be mentioned that the results of these LP simulations correspond to ideal lossless impedances presented at the drain extrinsic plane of the transistor. Hence, these results represent an upper bound of the maximum performance that can be achieved. Input power is swept for a dense set of first and second harmonic impedance combinations at each carrier frequency.a set of 1406 fundamental load impedances and 48 second harmonic impedances, making a total of different combinations are simulated. For the fundamental load impedances, just the upper part (inductive region) of the Smith chart is considered since it is well known that the optimum trajectory will be located there. For the second harmonic terminations, a less dense set covering the entire Smith chart is considered. A table containing output power and dc-power consumption is saved for later use. This table is indexed by the independent variables,, representing the fundamental and second harmonic load reflection coefficients for a given carrier frequency.accessing an arbitrary index of the LP table returns the complete input power sweep for the dc power and output power at the corresponding impedance terminations. As an example, LP simulations of a 15-W bare die GaN HEMT (CGH60015D) transistor from Cree Inc. biased in class B( V, V) are performed. Fig. 1(a) shows the optimum fundamental load trajectory and second harmonic impedance for different output power levels to achieve the best power-added efficiency (PAE) at 700 MHz. It should be noted that other load trajectories can be followed with just a small decrease in efficiency performance. Compared to an ideal class-b PA without load modulation, the results of Fig. 1(b) show that a great efficiency improvement in back-off can be obtained by properly tuning the fundamental and second harmonic load impedance for different power levels. These efficiency values correspond to the transistor extrinsic drain plane. When a real OMN with loss is considered for the DLM PA realization, these efficiency values are reduced significantly. The same general behavior in terms of the load trajectories and associated PAE can be observed at other frequencies. B. OMN Topology The selection of the OMN topology constitutes an important step in the design process. Although the topology itself is independent of the optimization process, the final performance will be highly dependent on it. For this reason, the selected topology should have good potential for multi/broad-band matching, be easy to simulate, and be able to handle the transistor RF output power without reaching the varactor breakdown voltage or forward conducting regions. An overview of different varactor-based matching networks topologies can be found in the literature [13], [20]. A flexible solution that has successfully been used in a similar tunable matching applications is a double-stub tuner [21]. To simplify the tuning process and the complexity of the PA, just one of the stubs will be loaded with varactors while the other will remain open circuited (see Fig. 2). Preliminary simulations showed significant efficiency advantages if the varactor was located closer to the transistor. Hence, the open stub is placed between the varactor-stub and the PA output. The basic schematic of the OMN topology can be seen in Fig. 2. In this figure, the bond-wire connection ( ), the dc-blocking ( ) capacitor, and the RF choke ( ) are also included. There are five transmission lines (, with ) with electrical lengths and characteristic impedance, which will be the object of the optimization process, as will be explained later in this section. C. Optimization Process The OMN design becomes complex when the objective is to accomplish a generic multi-band DLM PA controlling the load trajectories and impedance terminations at several frequencies. Analytical solutions are therefore unfeasible and we instead propose the use of an optimization process where output result are the OMN features, e.g., component values or transmission-line dimensions. Without loss of generality, the OMN topology described in Section II-B is considered. In this case, the optimization process for a generic -band design is formulated as follows: search for the optimal physical dimensions (width and length) of the five transmission lines,,with, in the OMN (Fig. 2) so the estimated average efficiency (using a modulated signal) of the PA at, is maximized.

3 SÁNCHEZ-PÉREZ et al.: OPTIMIZED DESIGN OF DUAL-BAND PA WITH SiC VARACTOR-BASED DLM 2581 Fig. 1. Simulation of the fundamental optimum load impedance trajectory and associated efficiency at 700 MHz when the second harmonic impedance is open circuit. Efficiency results are compared to ideal class-b PA with same output power level. (a) Fundamental load impedance trajectory with the corresponding output power levels and second harmonic termination ( ). (b) PAE corresponding to impedances shown in Fig. 1(a). As a reference, the theoretical class-b efficiency for the same output power is included. Fig. 2. Schematic of the PA OMN including the varactors. The optimization process only involves linear simulations of the OMN. For the varactors, a simple linear model with a variable capacitance dependent on the bias voltage is used. The specific equation, which describes the capacitance in our varactor model, is where,,and are technology-dependent constants. This approach assumes that the varactor capacitance is independent of the RF voltage swing across the varactor. This assumption is motivated by the fact that anti-series varactor configuration helps to reduce the capacitance variation due to the RF voltage swing across the varactor [22]. The varactor model also includes all relevant parasitics to have accurate prediction of the losses [23]. Realistic models for the transmission lines, including conductor and dielectric losses, are also used [24]. Scattering parameter data for other passive components (capacitors and inductors) are also utilized. The fact that the optimization process relies on linear simulations enables a significant speed increase (1) compared to harmonic-balance simulations. In this way, thousands of OMN parameter settings can be quickly evaluated on a regular computer. Different optimization algorithms can be used to solve this problem. In this work, a genetic algorithm (GA) is chosen, as such algorithms have been widely studied and successfully applied in many fields in engineering, e.g., in electromagnetics [25], but also in microwave circuits such as tunable matching network design [26]. A flowchart representation of the optimization process can be seen in Fig. 3. The evaluation process of a possible solution at a single frequency is performed as follows. The parameters of interest are the reflection coefficients at the fundamental and second harmonic,, the power gain,, as well as the voltage levels across the varactors. These values are calculated in Step 1 and Step 2 of the flowchart in Fig. 3 solving the voltage and currents at the nodes of the circuit. The reflection coefficients and power gain are power ratios so they can be obtained by simply assuming a sinusoidal source, first at the frequency and then at its second harmonic,. For the calculation of the varactor voltage levels, we assume a sinusoidal source at,whichdelivers the same power as the transistor would deliver when operating close to saturation. This condition imposes the worst case scenario in terms of RF voltage swing across the varactors. Although this assumption overestimates the voltage across the varactors, it is also true that the nonlinear effects from the varactors are not considered. Comparing this simplified simulations to harmonic-balance simulations, it appears that this assumption is good enough. The main difference will instead appear in the optimum varactor control voltage versus output power. However, this is of less importance since the final control voltage settings are determined experimentally from static measurements. In Step 3, the reflection coefficients obtained from the evaluation of the OMN during optimization are used to index the LP

4 2582 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 63, NO. 8, AUGUST 2015 a new generation is created and the process starts over with Step 1. III. DUAL-BAND DLM PA PROTOTYPE Fig. 3. Flowchart representing schematically the optimization process. data tables saved during the transistor characterization. From the closest entry in the table, a complete input power sweep in terms of dc and output power,,, can be retrieved. The process of accesing the LP data tables is repeated for each varactor bias voltage. With this data, an estimation of the drain efficiency for the different bias voltages can be calculated at each frequency as where accounts for the OMN losses. Note that in (2), the dependence with the reflection coefficients, frequency, and input power is excluded for clarity. In Step 4, the RF voltage swing across the varactors, whose calculation was described in Step 2, is checked. The solutions, which produce diode forward conduction or reverse breakdown, are discarded. In this way it is ensured that the varactors tolerate the power levels safely. Furthermore, to avoid possible solutions with good efficiency values, but low output power, constrains on the minimum output power are imposed. Solutions that do not reach this minimum power level are set to zero efficiency so the GA can discard such solutions. In Step 5, average efficiency, denoted as, is calculated using the PDF of a modulated signal, together with the efficiencies obtained from (2). It should be noted that one efficiency curve exists for every varactor bias voltage considered. The best efficiency values considering all these curves are used to calculate the average efficiency. The whole process is carried out for all carrier frequencies. After that, a final fitness function is calculated. The fitness function is usually and equally weighted average of the efficiencies obtained at each single frequency. The optimization will stop either when a given efficiency target is satisfied or when the maximum number of allowed iterations is reached. Otherwise, (2) A. Optimization of a 700/1900-MHz DLM PA To prove the validity of the proposed method, a dual-band DLM PA design is considered. The selected frequencies, and, are arbitrarily set to 700 MHz and 1.9 GHz. A 15-W bare die GaN HEMT (CGH60015D) transistor from Cree Inc. is used. The targeted output power is constrained to be at least 40 dbm. The tuning components for the OMN are Chalmers 14-finger SiC varactors [27]. Those devices feature a maximum capacitance of 11 pf, a tuning range around 6, and a quality factor of around 40 at 1 GHz and 0-V biasing. The tuning is not as abrupt as in typical Si varactors, which, together with a high breakdown voltage ( 100 V) make them highly suitable for highpower applications. Their excellent performance has already been demonstrated in class-e pulse-width modulation [28] and class-j DLM [18] PAs. Similar to previous DLM PAs, this work uses an anti-series configuration to improve the power handling [29]. The parameters shown in (1) for the SiC varactor correspond to pf, pf, and V. The rest of the varactor parasitics are described in [23]. The OMN topology used is the one represented in Fig. 2. Transmission lines with are subject to the optimization process. This makes it ten parameters (width and length of each ) to be optimized. The topology also includes a dc-blocking ATC (American Technical Ceramics Corporation) capacitor of 20 pf and a 82-nH Coilcraft square air-core inductor providing high impedance at both carrier frequencies. The bondwire connection to the transistor drain is estimated to 0.15 nh. These elements are not subject to optimization and are considered fixed. The steps described in Section II-C are now applied to this design. Since it is a dual-band design, each time a possible solution is evaluated, two values are returned: the average efficiencies and. These two values could be equally weighted and used as input to the GA to create the next generation. Another option suited to this dual-band case is to use a multi-objective GA. In this case, the GA returns not only a single solution, but a set of solutions called the Pareto front [30]. The Pareto front represents a set of possible solutions in the ( -axis), ( -axis) plane among which it is not possible to improve the average efficiency at one frequency without decreasing it in the other. Fig. 4 shows the result of the multi-objective GA. The -axis shows the average efficiency at and the -axis at. All the plotted crosses ( ) correspond to possible solutions. The Pareto front is represented by the outer boundary of possible solutions. We could, for instance, choose a solution with efficiency above 50% at, but the price to pay is a decrease on the efficiency at, which would be lower than 42%. The solution that is finally selected in this work corresponds to efficiencies of 46.7% and 45.7% at and, respectively. It should be noted that when many different solutions are clustered in small areas, the difference in the optimized parameters is usually small. The chosen solution consists of the transmission-line

5 SÁNCHEZ-PÉREZ et al.: OPTIMIZED DESIGN OF DUAL-BAND PA WITH SiC VARACTOR-BASED DLM 2583 Fig. 4. Solutions returned by the GA multi-objective together with the Pareto front. The final selected solution is also indicated. Fig. 5. Load trajectories when sweeping the varactor bias voltage from 0 to 70 V after the optimization process and ADS simulations ( ). Solid lines represent the ADS layout-ready large-signal load trajectories, dashed lines represent the load trajectories obtained in the linear calculations during the optimization process. The solid circles on the traces represent the sweep starting point (0-V varactor voltage). (a) 700 MHz. (b) 1.9 GHz. TABLE I COMPARISON OF TRANSMISSION-LINE DIMENSIONS AFTER THE OPTIMIZATION PROCESS AND THOSE FINALLY IMPLEMENTED IN THE PROTOTYPE Fig. 6. PA input matching network. values in Table I listed together with the values of the final prototype layout. Differences in values are mainly related to post-ga fine tuning of the OMN using harmonic balance to compensate for the microstrip T-junction, varactor bias network, and nonlinear effects from the varactors, which where not included in the optimization process. B. OMN Design Finalization The optimization process returns the physical dimensions of the PA OMN. This result serves as the input for the rest of the PA design carried out using Agilent Technologies Advanced Design System (ADS). From this point on, a nonlinear model for the SiC varactors, as well as the proprietary transistor model from Cree Inc. (used to generate the LP data) are used in harmonic-balance simulations to evaluate the complete PA performance. First, the layout of the OMN is finalized. After adding the required microstrip T junctions and varactor bias inductors, a tuning process is carried out to compensate for them. Even after this post-optimization process, the values of the OMN transmission lines are quite close to the ones returned by the GA optimization process. Fig. 5 shows the fundamental and second harmonic load trajectories at the two frequency bands for the linear calculations of the optimization process and for the nonlinear ADS simulations. The agreement is good, especially for the fundamental harmonic trajectory. Some discrepancy appears for the second harmonic trajectories. However, no significant reduction in efficiency is expected due to this difference. Comparing the obtained load trajectory to that shown in Fig. 1(a), a significant difference can be observed. The reason is that the load trajectory presented in Fig. 1(a) is obtained assuming lossless impedances presented at the intrinsic drain of the transistor, while the trajectories shown in Fig. 5 consider the real and lossy OMN realization obtained through the optimization process. Furthermore, since a dual-band design is considered, a tradeoff between the two load trajectories exists. The trajectories of Fig. 5 represent the optimum solution given the constrains, i.e., the dual-band design and the real lossy OMN. C. Input Matching A fixed dual-band matching network is designed to ensure a good input matching at both frequency bands. Since the input impedance variation with the output match tuning is not very significant, a fixed solution is preferred to reduce complexity. The designed dual-band input matching network is presented in Fig. 6. A stabilization network comprising a parallel R C and the resistor for the gate bias ensures unconditional stability along the whole frequency range. An 18-pF ATC dc-blocking capacitor is used, together with a double stub topology ( ), which ensures good matching at both frequencies. The bondwire connection to the gate of the transistor is fixed in the design to 0.5 nh and is implemented using two gold bond wires each with a length of approximately 1 mm tor.

6 2584 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 63, NO. 8, AUGUST 2015 Fig. 7. Simulated drain efficiency at 700 MHz and 1.9 GHz for the layout-ready PA. Input powers from 10 to 32 dbm and varactor bias voltages from 1 to 73 V are swept to obtain these cloud of points. (a) 700 MHz. (b) 1.9 GHz. Fig. 9. Measurements showing maximum output power, maximum drain efficiency, and drain efficiency at 6- and 9-dB output back-off for different frequencies. (a) Low-frequency band. (b) High-frequency band. Fig. 8. Dual-band DLM PA prototype (221 mm 65 mm). A zoom-in of the varactors is also shown. D. Efficiency Simulations Fig. 7 shows the layout-ready PA drain efficiency simulations at both frequencies when the input power is swept from 10 to 32 dbm and varactor bias voltage from 1 to 73 V. Hence, each of these points in the figure corresponds to a specific combination of input power and varactor bias voltage. By an optimized co-control of the varactor voltage and input power, it is possible to track the envelope of this cloud of points to maintain high instantaneous efficiency. Output powers of 40 and 42 dbm are obtained at 700 MHz and 1.9 GHz, respectively. The effect of load modulation is clearly seen translating into efficiencies close to 50% at 8-dB output power back-off (OPBO) at both frequencies. Finally, the dual-band DLM PA prototype is built using Rogers 4350B (, )substratesona brass fixture with dimensions of 221 mm 65 mm. The two anti-series SiC varactors with size of 0.4 mm 0.7 mm are bonded to the fixture and the printed circuit board (PCB). Note that in contrast to other DLM PAs with similar power levels, which tend to stack a larger number of varactors, this design can handle the power levels with two. This is a consequence of both the good properties of SiC varactors and the optimization process. A photograph of the DLM PA prototype is shown in Fig. 8. IV. MEASUREMENT RESULTS A. Static Measurements Static characterization of the PA is initially performed under continuous wave (CW) conditions. Varactor voltage is swept from0to72v,afterwhichthereisnomoreefficiencyenhancement. The SiC varactors are reversely biased, and as a consequence, the consumption is negligible and does not affect the efficiency results. Input power is swept for every varactor bias voltage until the forward gate current reaches 2 ma or the gain is compressed 3 db. The transistor is biased in class Bwith V. Input and delivered output power levels are measured with couplers and power meters. Low-pass filters, different for each frequency band, are used at the PA output. Drain efficiency and PAE are calculated for every input power and varactor voltage combination. Initially, different frequencies are measured around the intended low- and high-frequency bands, i.e., near 700 MHz and 1.9 GHz. Fig. 9 shows the maximum drain efficiency and output power together with the efficiencies at 6 and 9 db of OPBO for the two bands. In the lower frequency band, a peak efficiency of 80% is obtained at 700 MHz, with the output power level higher than 41 dbm. However, at this specific frequency, although 45% of efficiency is achieved at 9-dB OPBO, the load modulation is not optimum. Moving to slightly lower frequencies, e.g., at 685 MHz, a significant improvement is observed. At this frequency, nearly 50% efficiency at 9-dB OPBO, with a limited sacrifice in output power and peak efficiency, is obtained. At the higher frequency band, this effect is even more noticeable. Moving from 1.9 to 1.84 GHz, the peak efficiency decreases slightly, but the efficiency in back-off improves dramatically, with almost 55% at 9-dB OPBO. The results presented will henceforth relate to 685MHzand1.84GHz. Fig. 10 shows the static measurements at both 685 MHz and 1.84 GHz. Together with all the cloud of points corresponding to the combined input power and varactor voltage tested, the maximum achievable drain efficiency is depicted. At 685 MHz, a maximum output power of 41 dbm is obtained, with a peak efficiency better than 75%. The back-off performance is good, keeping an efficiency close to 45% at 10-dB OPBO. The advantage of modulating the varactor voltage compared to keeping it fixed is clear with a reduction of almost 42% of dc-power consumption at 8-dB OPBO. At 1.84 GHz, a maximum output power of 42 dbm is obtained with a peak efficiency slightly above 60%. The back-off efficiency is kept flat, around 60% for almost 8 db of dynamic range, and it is reduced to around 50% at 10-dB OPBO. Again, comparing to a fixed varactor bias voltage for maximum output power, reduction in dc-power consumption is close to 60% at 8-dB OPBO. A similar representation for the gain, including the gain trajectory for the best achievable efficiency, is shown in Fig. 11. The gain at 1.84 GHz is

7 SÁNCHEZ-PÉREZ et al.: OPTIMIZED DESIGN OF DUAL-BAND PA WITH SiC VARACTOR-BASED DLM 2585 Fig. 10. Drain efficiency measurements at 685 MHz and 1.84 GHz. All the combinations of input power and varactor voltage are depicted as dots. The varactor voltage has been swept from 0 to 72 V in 2-V steps. The best achievable efficiency is also indicated with a red line (in online version) with circle markers. Efficiency for the fixed varactor voltage leading to maximum output power is represented with a blue trace (in online version). (a) 685 MHz. (b) 1.84 GHz. Fig. 13. Best drain efficiency predictions from simulations compared to measurements at both frequencies. (a) 685 MHz. (b) 1.84 GHz. Fig. 11. Measured gain at 685 MHz and 1.84 GHz. All the combinations of input power and varactor voltage are depicted as dots. The varactor voltagehas been swept from 0 to 72 V in 2-V steps. The gain for the best achievable efficiency is also indicated with a red line (in online version) with circle markers. (a) 685 MHz. (b) 1.84 GHz. Fig. 14. Optimum varactor voltage control function to achieve the highest efficiency. The control functions at both frequencies are shown. Fig. 12. Measured and simulated PA input return losses. lower than predicted in simulations, which will have an impact on the PAE at this frequency. Small-signal measured and simulated input return losses are also shown in Fig. 12. Although the measured input return loss at this frequency is not as good as in simulations, it may not fully explain the gain reduction observed. Therefore, we believe that the second harmonic input impedance detuning is causing the decrease of the gain at this frequency. A comparison of the best achievable drain efficiency between the simulations and CW measurements is presented in Fig. 13. Good agreement is observed between the curves at both frequencies, although simulations tend to underestimate the output power at both frequencies. Despite this fact, the efficiency in back-off is well predicted, which validates both the varactor and the transistor model used in the simulation process. Finally, the varactor voltage control function at the two frequencies is presented in Fig. 14. Similar trends are observed at both frequencies starting with a high varactor voltage, 70 V, at low output powers and then decreasing down to around 5 10 V when the PA is saturated. In contrast to most of the published DLM PAs, where the varactor voltage control increases with the output power, this work exhibits a decreasing control function. This has two implications: first, the voltage swing is high at low bias voltages. The use of nonabrupt SiC varactors is essential to make the PA work under these conditions. Second, the varactors are being operated at their highest quality factor in back-off. This explains the good efficiency enhancement at large back-off levels. The optimization process is ultimately responsible of both results since it tries to maximize the average efficiency while keeping the voltage across the varactors within the limits.

8 2586 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 63, NO. 8, AUGUST 2015 TABLE II STATE-OF-THE-ART VARACTOR-BASED DLM PA TABLE III PERFORMANCE COMPARISON OF OTHER PUBLISHED DUAL/MULTI-BAND PAs (NONCONCURRENT MODE) Fig. 15. Block diagram of the DPD linearization scheme used. Table II compares the static performance of this dual-band DLM PA with other published varactor-based DLM PAs. Efficiency at back-off of this PA (6 and 10 db) outperforms any other published DLM PA, despite most of them actually being single-band designs. B. Linearized Modulated Measurements Modulated measurements were also performed at both bands in order to assess the performance of the PA under realistic dynamic operating conditions. Specifically, a 3.84-MHz 6.5-dB PAPR WCDMA signal was used. The experimental setup and linearization approach used resembles the same as those in [31]. A block diagram of the digital linearization scheme used is shown in Fig. 15. From the linearization perspective, the DLM PA is considered as a single-input single-output system. An indirect learning architecture is used, whereby the DPD model parameters are identified by comparing the desired input signal with the measured output signal. Efficiency optimized input signals,, are calculated from the pre-distorted input signal using the static inverse model of the DLM PA. The static inverse model at each carrier frequency is constructed from the corresponding measurement data shown in Fig. 14. A vector-switched generalized memory polynomial (VS-GMP) behavioral model is used for the DPD linearization Fig. 16. PA output signal spectra with and without DPD for both frequencies. (a) 685 MHz. (b) 1.84 GHz. [32]. The VS-GMP model quantizes the input signal according to its amplitude into a number of regions. The output is computed by using separate models corresponding to each region. In this PA, the load is modulated for a limited range of output signal amplitudes. The input output relation thus has two distinct operating regions, which makes the VS-GMP very suited for behavioral modeling of these kind of architectures. The measured output power spectrum before and after DPD linearization are shown in Fig. 16. The VS-GMP suppresses the ACLR below 47.5 dbc in both bands while maintaining high average efficiency and output power. Average efficiencies of 56.2% and 53.2% were measured at 685 MHz and 1.84 GHz, respectively. A comparison with other dual/multi-band PA architectures under nonconcurrent operation is shown in Table III. The performance in terms of efficiency and ACLR levels for the DLM PA is among the best published. These results indicate that the DLM PA concept is an interesting candidate for the realization of dual/multi-band transmitters.

9 SÁNCHEZ-PÉREZ et al.: OPTIMIZED DESIGN OF DUAL-BAND PA WITH SiC VARACTOR-BASED DLM 2587 V. CONCLUSIONS A new powerful approach for generic design of single and multi-band DLM PAs has been presented. Using simple linear simulations and transistor LP data, it is possible to optimize a given OMN topology to achieve near-optimum load trajectories at several frequency bands. To verify the method, a dual-band PA with DLM has been built. The prototype features excellent results, especially in terms of efficiency at large ( 8dB) OPBO. Modulated measurements show average efficiencies of 56% and 54% at 685 MHz and 1.84 GHz, respectively, with adjacent channel leakage ratio (ACLR) levels below 47.5 for both bands. These results show that DLM PAs can be a competitive efficiency enhancement technique even when compared with other widespread techniques like Doherty PAs. ACKNOWLEDGMENT This work was carried out in part at the GigaHertz Centre, Chalmers Institute of Technology, Göteborg, Sweden. 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Garcia-Ducar, Design and applications of a MHz tunable matching network, IEEE J. Emerg. Sel. Topics Circuits Syst., vol. 3, no. 4, pp , Dec [27] C. M. Andersson et al., A SiC varactor with large effective tuning range for microwave power applications, IEEE Electron Device Lett., vol. 32, no. 6, pp , Jun [28] M.Özen,R.Jos,C.M.Andersson,M.Acar,andC.Fager, High-efficiency RF pulsewidth modulation of class-e power amplifiers, IEEE Trans. Microw. Theory Techn., vol. 59, no. 11, pp , Nov [29] K. Buisman et al., Distortion-free varactor diode topologies for RF adaptivity, in IEEEMTT-SInt.Microw.Symp.Dig., Jun [30] A. Konak, D. W. Coit, and A. E. Smith, Multi-objective optimization using genetic algorithms: A tutorial, Rel. Eng. Syst. Safety, vol. 91, pp , [31] M. Özen, C. Andersson, T. Eriksson, M. Acar, R. Jos, and C. Fager, Linearization study of a highly efficient CMOS-GaN RF pulse width modulation based transmitter, in 42nd Eur. Microw. Conf., 2012, pp [32] S. Afsardoost, T. Eriksson, and C. Fager, Digital predistortion using a vector-switched model, IEEE Trans. Microw. Theory Techn., vol. 60, no. 4, pp , Apr César Sánchez-Pérez received the Ph.D. degree from the University of Zaragoza, Zaragoza, Spain in From September 2012 to December 2014, he was a Postdoc with the Microwave Electronics Laboratory, Chalmers University of Technology, Göteborg, Sweden. Since January 2015, he has been an RF/Microwave Specialist with Qamcom Research and Technology AB, Göteborg, Sweden. His research interests include wireless communications systems with an emphasis on tunable matching networks and high-efficiency transmitters.

10 2588 IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 63, NO. 8, AUGUST 2015 Mustafa Özen received the Ph.D. degree from the Chalmers University of Technology, Göteborg, Sweden, in He is currently with the GigaHertz Center, Chalmers University of Technology. His research interests are switch-mode PAs and digital transmitter architectures. His research interests are in the areas of power amplifier efficiency enhancement techniques and digital transmitter architectures. Dr. Özen was the recipient of the 2011 Best Paper Award of the IEEE Wireless and Microwave Technology Conference. Christer M. Andersson receivedthem.sc.degree in engineering nanoscience from Lund University, Lund, Sweden, in 2009, and the Ph.D. degree in microwave electronics from the Chalmers University of Technology, Göteborg, Sweden, in Since 2013, he has been a member of the Amplifier Group, Information Technology Research and Development Center, Mitsubishi Electric Corporation, Kamakura, Japan. His main research interests are wide bandgap devices, compact modeling, and the design of high-efficiency power amplifiers. Niklas Rorsman (M 10) received the M.Sc. degree in engineering physics and Ph.D. degree in electrical engineering from the Chalmers University of Technology, Göteborg, Sweden, in 1988 and 1995, respectively. In 1998, he joined the Chalmers University of Technology, where he currently leads the microwave wide bandgap technology activities and the investigation of the application of graphene in microwave electronics. Christian Fager (S 98 M 03) received the M.Sc. and Ph.D. degrees in electrical engineering and microwave electronics from the Chalmers University of Technology, Göteborg, Sweden, in 1998 and 2003, respectively. He is currently an Associate Professor with the Microwave Electronics Laboratory, Chalmers University of Technology. He has authored or coauthored more than 100 papers in international journals and conferences. His research interests include the design and modeling of linear and energy-efficient transmitters for future wireless systems. Dr. Fager is currently an associate editor for IEEE Microwave Magazine.He was the recipient of the 2002 Best Student Paper Award of the IEEE Microwave Theory and Techniques Society (IEEE MTT-S) International Microwave Symposium (IMS). Dan Kuylenstierna (S 04 M 07) was born in Göteborg, Sweden, in He received the M.Sc. degree in engineering physics and Ph.D. degree in microtechnology and nanoscience from the Chalmers University of Technology, Göteborg, Sweden, in 2001 and 2007, respectively. He is currently an Associate professor with the Microwave Electronics Laboratory, Department of Microtechnology and Nanoscience, Chalmers University of Technology. His main scientific interests are monolithic microwave integrated circuit (MMIC) design, reconfigurable circuits, frequency generation, and phase-noise metrology. Dr. Kuylenstierna was a recipient of the IEEE Microwave Theory and Techniques Society (IEEE MTT-S) Graduate Fellowship Award in 2005.