Generation of New Nonisolated High Voltage Gain DC-DC Converters

Transcription

1 Generation of New Nonisolated High Voltage Gain DC-DC Converters R. P. Torrico-Bascope, and L. F. Costa Energy Processing and Control Group Electrical Engineering Departament - DEE Federal University of Ceara - UFC Fortaleza, Brazil rene@dee.ufc.br, levyfcosta@gmai1.com G. V. Torrico-Bascope GTB Power Electronics R&T AB Sibeliusgangen 44, 4TR Kista - Sweden grover. torrico@gmail.com Ahstract- This paper introduces a family of non isolated DC-DC converters based on high voltage gain multi-states switching cell (HVG-MSSC). The proposed converters are employed in application where high output voltage is required. Normally, the output voltage generated by photovoltaic panels, small wind generators, fuel cells, batteries, and ultracapacitors is low. Then, this low voltage must be increased to 200Vdc, 400Vdc or 800Vdc (dependently of inverter topology and its rms output voltage) in order to feed power inverters and provide a high quality sinusoidal waveform of 115c or 230c. The proposed converters are derived from six classic converters: Buck, Boost, Buck-Boost, Cuk, Sepic and Zeta. The theoretical analysis of converters, as well as example design and experimental results for a lkw Sepic converter is presented in this paper. Keywords- Multi-states switching cell High voltage gain converter; DC-DC converter; I. INTRODUCTION Nowadays many companies are betting in clean energy sources, such as solar and wind, due to concern about the environmental pollution and the global heating of the planet. The conversion of mechanical energy into electrical energy is made through photovoltaic panels and turbo-generators. The output voltage of the indicated sources is low (l2vdc to 120Vdc), and almost always is necessary to step up to an adequate value (200Vdc to 800Vdc) [1-2]. Other voltage sources that present low voltage are fuel cells, batteries, and ultracapacitors. For this reason, is necessary to study DC-DC converters with high gain [1-8]. Recently, the multiphase or interleaving converters are widely used to divide the current through the semiconductors devices and to reduce the voltage ripple across output filter capacitors. In this way, they can to process high power and reduce the volume of capacitors. Using this technique the conduction losses due to channel resistance of the MOSTETs are reduced, so the efficiency is increased. The multiphase switching cell shown in Fig. 1 is obtained from multiphase or interleaving converter [9-13]. To obtain high voltage gain using the indicated cell, secondary windings are coupled to the inductors [14]. On the other hand, theses converters drained pulsed current from voltage source. If batteries supply the described converters, its lifetime may be reduced due to high rms current and internal resistance of batteries. II. PROPOSED HIGH GAIN VOLTAGE MULTI-STATES SWITCHING CELL Other technique to divide current through the semiconductors devices was proposed in [15-16]. U sing this technique six non-isolated DC-DC converters were generated. Theses converters were obtained from a multi-state switching cell (MSSC). The MSSC is shown in Fig. 1 (b) and is composed by an inductor, a multiphase transformer, and controlled switches. Using this cell, the frequency of the filter inductor ripple is equal to number of legs times the switching frequency. Thus, the inductor weight and volume is very small. The current through the multiphase transformer windings is continuous with small ripple; therefore a high magnetic flux density can be used for the transformer design, then, the volume of the transformer is reduced. The states number of switching cell is the number of legs plus one. To reach high voltage gain, secondary windings to each phase of multiphase transformer of MSSC are added, which makes possible to transfer energy to other capacitor. The indicated secondary windings are associated to a bidirectional controlled rectifier. The controlled rectifier can be connected in series with main switching cell, or it can be left without connection to permit the cell most flexible. Fig. l(c) shows the new high voltage gain multi-states switching cell, HVG MSSC. The main contribution of this paper is the generation of non-isolated DC-DC converters with high voltage gain features. III. GENERATION OF NEW TOPOLOGIES Based on classic DC-DC converters are generated new topologies shown in Figs. 2 to 7. The topologies are named of HVG-MSSC Buck, Boost, Buck-Boost, Cuk, Sepic, and Zeta converters. The new converters are obtained of substitution of classical switching cell, detached in Figs. 2 (a) to 7 (a), for HVG-MSSC as shown in Figs. 2 (b) to 7 (b). Rearranging the circuit for a convenient form, is obtained family of HVG MSSC converters, which each converter is shown in Figs. 2 (c), 3 (b), 4 (c), 5 (c), 6 (c) and 7 (c). As the secondary circuit of the cell shown in Fig. 1 (c) not has connection to the primary circuit, it is possible to obtain other circuits beyond the ones. Among all proposed topologies, just the Buck converter has voltage gain lower than one; therefore, this converter leaves the objectives of the paper $ IEEE

2 The main converter features observed includes: Lower current stress on the switches; Capability to process more energy; Possibility to associate more secondary winding, dependently of output voltage requirement. The secondary of multiphase transformer may to have other type of connection (delta, wye, zigzag, polygon); Lower current ripple on the inductor Ll, which implies in reduced size of input inductor; IV. Lower voltage ripples on the capacitors, which implies in reduced size output capacitor filter; SIMPLIFIED THEORETICAL ANALYSIS FOR SINGLE PHASE TRANSFORMER The theoretical analysis consists to demonstrate the relation between the input-output voltages, named static gain. For all the converters, the analysis is realized for continuous conduction mode (CCM) operating with pulse width modulation (PWM). The converters with single phase transformer employ the three-state switching cell [15, 17]. b b b a a Multiphase S I transformer a c c Figure 1. c (a) (b) (c) Switching cells: (a) MuItiphase switching cell, (b) Multi-states switching cell, (c) High voltage gain multi-states switching cell. L2 VI c) a LI VI CI Figure Generation of HVG-MSSC Buck converter: (a) Classical Buck converter, (b) Application of HVG-MSSC in Buck converter, (c) Proposed HVG MSSC Buck converter. VI Figure 3. (b) Generation of HVG-MSSC Boost converter: (a) Classical Boostconverter, (b) Application of HVG-MSSC in Boost converter.

3 Q CI VI Figure 4. w Generation of HVG-MSSC Buck-Boost converter: (al Classical Buck-Boost converter, (bl Application of HVG-MSSC in Buck-Boost converter, (cl Rearrangement of the circuit. L3 c) C C Figure 5. w Generation of HVG-MSSC Cuk converter: (al Classical Cuk converter, (bl Application of HVG-MSSC in Cuk converter, (cl Rearrangement of circuit. C Figure 6. (b) (c) Generation of HVG-MSSC Sepic converter: (a) Classical Sepic converter, (bl Application of HVG-MSSC in Sepic converter, (cl Rearrangement of circuit. L 3 (a) CI Q VI Figure 7. (a) (b) (c) Generation of HVG-MSSC Zeta converter: (a) Classical Zeta converter, (b) Application of HVG-MSSC in Zeta converter, (c) Rearrangement of circuit.

4 For theoretical analysis some symbols are used, and then they are described follow: Ts - Switching period; fs - Switching frequency; Np - Number of turns of primary winding; Ns - Number of turns of secondary winding; n - Transformer turns ratio of multi phase transformer. The duty-cycle D is defined by the ratio between control pulse width of the switch and the switching period. The transformer turns ratio is defined as n=ns/np The displacement angle between of the PWM pulses of each leg is given by (1) A. Buck Converter 3600 (JPWM = -- N legs The static gain is obtained for the three Buck converters shown in Fig. 2. The voltage gain of the classic Buck converter shown in Fig. 2 (a) is given by (2) On the other hand, the voltage gain of the second Buck converter, shown in Fig. 2 (b) is presented in (3), (1) (2) Gv=v,)= V, (2+n) (3) To get V=V, where V and V are the voltage across the capacitors and, respectively, the transformer turns ratio must be n=2, and duty cycle must be lower than D<O.5. Finally, the voltage gain of the third modified Buck converter, shown in Fig. 2 (c), is given by (4), Gv = = D(I+n) This converter presents the follow limitation: n9 and 0<0.5. Thus, it is not possible to obtain high voltage gain with this converter, since it is a step-down converter. B. Boost Converter As made for Buck converters, the static gain of Boost converters shown in Fig. 3 is presented. (4) The voltage gain of the classic Boost converter, shown in Fig. 3 (a) is given by (5) Gv _1_ = = V i (I-D) (5) The voltage gain of HVG-MSSC Boost converter is given by (6), (2+n) 2(I-D) (6) Gv= -=---'-:--'-:- For proposed single-phase HVG-MSSC Boost converter, the duty cycle must be higher than 0.5. Because, for duty cycle lower than 0.5, the voltage induction across secondary winding of the transformer is poor, this implies in no energy transfer through of transformer. Thus, no high voltage gain can be achieved for this condition. On the other hand, soft-start can be applied. For this condition, the duty-cycle will grow up from zero to its nominal value, that should be higher than 0.5. No additional change must be made in control circuit. C. Buck-Boost, Cuk, Sepic and Zeta Converters The Buck-Boost, Cuk, Sepic and Zeta converters, shown in Figs. 4 to 7 respectively, present the same static gain, as exposed bellow. Initially, the voltage gain of classic Buck-Boost, Cuk, Sepic and Zeta converters, shown in Figs. 4 (a) to 7 (a), are given by (7), D GV=-=-- (I-D) (7) On the other hand, the voltage gain of the second converters, shown in Figs. 4 (b) to 7 (b), is given by (8), V o (n+2) D Gv=-=-_ _- V; 2 (I-D) (8) Finally, the static gain of proposed single-phase HVG MSSC Buck-Boost, Cuk, Sepic and Zeta, shown in Figs. 4 (c) to 7 (c), is presented in (9), I (2D+n) Gv = -= --' -'------"- V i (I-D) 2 (9) The HVG-MSSC Boost converter problem of energy transference through transformer for duty-cycle lower than 0.5 occurs also for proposed single-phase HVG MSSC Buck Boost, Cuk, Sepic and Zeta converters. It means that theses converters must also operates with duty cycle higher than 0.5. TABLE!. STATIC GAIN OF PROPOSED CONVERTERS Buck Boost Buck-Boost, Cuk, Sepic and Zeta Classic Gv = - = D Gv=-= -- I (I-D) Gv = Vo _D_ = V i (I-D) Single-phase HVG MSSC Gv = = D(I+n) GV=-= I (I-D) GV=-=-_' V; (2+n) 2(I-D) (2D+ n) 2

5 On the other hand, soft-start can be applied, without modification of control circuit. Table I show the static gain of generated converters with single-phase and generalized for N-phase. The same analysis can be made for HVG four-state switching cell where three-phase transformer is employed. The theoretical analysis for indicated switching cell will be presented in future papers. V. SIMPLIFIED DESIGN EXAMPLE In order to apply the theoretical analysis developed in this paper, an example design is realized. It was choosing the single-phase unidirectional Sepic converter. A voltage double rectifier was used associate to the secondary winding of singlephase transformer, in order to increase the static gain of the converter. The implemented converter topology is shown in Fig. 8 and the converter specification and design parameters are shown in Table I and II, respectively. D2 S2-1 9 Figure 8. TABLE II. Input voltage range: Output power: Output voltage: TABLE III. CONVERTER SPECIFICATION = 42-54VDC Po =lkw Vo = 4 00VDC ASSUMED PARAMETERS Transformer turns ratio: n = 2.15 Switching frequency: J = 25kHz Maximum LI inductor "ji L l =O.15 Iimax current ripple: 01 s!": -1 J A. Duty-cycle l.--jj,,,,, T1 ',. 't-r: L ',, 1 """,, ' ':! Transformer 7" 1 - I Topology of single-phase proposed Sepic converter with voltage doubler rectifier. Due to the voltage doubler rectifier, the static gain of proposed Sepic converter is given by (10). V() 1 Gv = - = --.( D+n ) (I-D) (10) Hence, rearranging the terms in (11) and substituting the parameters of Table I, is obtained the maximum duty-cycle of the converter, V a -n'v I D = = V a C1 = 0.7 Ra + (11) B. Inductor LI and L2 Design The normalized current in the inductor Ll for the parameters presents in Table II and III is calculated according to (12). Its comportment is show in Fig. 9. Figure 9. M Ll = 2 M LI. L l. Is = (2D -1) (1-D) V a (n+ D) 0.023,-----, IIIL XIO -J D (12) Normalized ripple current on the Ll inductor for proposed Sepic converter. From Fig. 9, it is observed that the maximum current ripple accurs for duty-cycle equal to Then the inductance Ll is calculated according to (12). V Ll o = 16 1s ML 1 (n+0.75) (12) LI = ( ) For this converter, the inductor Ll fl = 90 H and L2 may be magnetically coupled and they value must be equal. Thus LI = L2 = 90flH (13) C. Capacitance C, CI and Design Analyzing the voltage and current on the capacitor C, it is obtained the capacitance equation, as shown in (14). Assuming L1Vc3 = 0.05, the capacitor C is calculated below. P C "----- o 16 Is. L1Vc3..(n ) C ( ) 42 ( ) = 1 f1 F (14) The same analysis presented for C is realized for C 1, and. Then, capacitance C 1 is calculated as shown in (15). C 1 (I-D) P 0 C 1- > 2-/, /1Vo Vj (n+d) (1-0.7) ( ) = 833nF (15) Capacitance and may be equal, and calculated as shown in (16). (I-D)-Po = (16) Is LlVo V, '(n+d)

6 (1-0.7) 1000 c 2 =c 3 =1.67 F ( ) f.1 The voltages across capacitors are calculated using the equations (17), (18) and (19). Thus, VC = = 42V (17) 42 VC 2 = = =140V (1-D) (1-0.7) n V V = VC 4 = ---'- 2 (1-D) D. Semiconductors Design = 150.5V 2 (1-0.7) (18) (19) The semiconductors design is based just in to obtain the voltage across the controlled switches and diodes. The breakdown voltage of the controlled switches must be higher than the following value: V 42 VS1 =VS2 =--' -= =140V (I-D) (I-0.7) The maximum reverse voltage of the rectifier diodes must be higher than the values calculated from (20) and (21). Thus, V 42 VD\ = VD2 = --' -= = 140V (20) (I-D) (1-0.7) VD 3 = VD = = =30lV 4 (I-D) (I-0.7) VI. EXPERIMENTAL RESULTS (21) In order to verify the operation and evaluate the performance of the proposed high voltage gain Sepic converter with MSSC, a prototype was assembled and tested. The specification and components used to assemble the prototype are shown in Table I and Table II, respectively. The experimental results consist of relevant voltage and current waveforms and also curves that demonstrate the performance of the proposed structure. TABLE IV. PROTOTYPE COMPONENTS Diodes 01, O2 30CTH03 Diodes 03, 04 30TH 06 Inductor Ll. L2 Output Filter Capacitors CI,,. C. Switches SI, S2 High Frequency Transformer L1=L2= 9Of.!H NEE-55/28/21 (Thornton Ipec) NL1= 23 turns (33x26A WG) NL2= 23 turns (3x26A WG) 8=1.31 mm (gap) 2.2f.!F / 400V IFRP90N20D NEE-55/28/21 (Thornton Ipec) Np 1 =Np2=1 0 turns (l7x25awg) NsI=22 turns (8x25AWG) Fig. 10 shows the measured gate-to-source voltages of switches S1 and S2 and the currents through inductors L1 and L2. The rounded shape is due to the nonlinearity of circuit and components, as the inductor and transformer resistance. The current through inductors L\ and L2 are out of phase due to the position of current probe. This current must be in phase. The inductor ripple is according to the value assumed in design. Fig. 11 shows the same control signals of switches S1 and S2 and the voltage and current in the switch S\. It is observed low voltage across the controlled switch compared with the output voltage. No overshooting is presented, due to natural clamping of capacitors C and C 1. Fig. 12 shows the same gating signals as showed before in Figs. 10 and 11, the current through the primary winding of transformer and also the voltage across the primary winding of transformer. Fig. 13 shows the same gating signals, the current through the secondary winding of transformer and also the voltage across the secondary winding of transformer. From Figs. 12 and 13 is observed symmetry of each semi-cycle. No DC voltage level was observed. Fig. 14 shows the current through the diodes D3. The rounded form presented in currents shown in Figs. 12, 13 and 14 are due the low capacitance and, which required an elevated current for a short interval of time powered by transformer. Then, the dynamic of this current causes the rounded waveform. If the capacitance and are a bit higher, the waveforms will looks ideality. Finally, Fig. 15 presents the efficiency of the converter as a function of the output power. The converter presents efficiency higher than 93% for a large range of operation for output power. On the other hand, the reach high efficiency is not the objective of this paper. I. CONCLUSION In the paper were obtained six new nonisolated DC-DC converters with high voltage gain features. All the topologies are derivate of the classic Buck, Boost, Buck-Boost, Cuk, Sepic and Zeta converters. The proposed converters can be applied to development power supply systems using photovoltaic modules, small wind modules, and fuel cells. The main contribution of the paper is the generation of new topologies of DC-DC converters. The advantages of proposed converter are the lower current stress on the switches; capability to process more power; lower current ripple on the inductor as higher the number of phase, which implies in reduced size of input inductor; lower voltage ripples on the capacitors as higher the number of phase, which implies in reduced capacitance of output filter capacitor, eliminating electrolytic capacitors of the converter circuit. On the other hand, the proposed converters present as disadvantage high number of elements in the circuit and complex modulation circuit as major number of phases. Although the elevate number of elements in the proposed converters, its size and weight may be low.

7 illso.40 % I Figure 10. Gate signals V GSI and V GQ, inductors Ll and L2 currents (I00V/div.; 20V/div.; 20V/div.; 25A1div.; 1OIlS/div.) Figure II. Gate signals VGSI and VGQ, drain-tosource voltage VSI and drain current lsi (loov/div.; 20V/div.; 20V/div.; 25A1div.; 1OIlS/div.) Figure 12. Gate signals V GSI and V Gs2, current and voltage on the primary winding of trasformer (I00V/div.; 20V/div.; 20V/div.; loaldiv.; 1OIlS/div.) illfo:.40!ij Figure 13. Gate signals VGSI and VGS2, secondary winding voltage and current in the transformer (I OOV/div.; 20V/div.; 20V/div.; 25A1div.; 1OIlS/div.) Figure 14. Gate signals V GSI and V Gs2, current through diode 03 (20V/div.; 20V/div.; 5A1div.; 1OIlS/div.) 99,00 98,00 97,00 96,00 95,00 e 94,00,.., <> " 93,00 <L>. ;; 92,00 IE L.LJ 91,00 90,00 89,00 88,00 87, Output power (W) Figure 15. Efficiency of the converter, as a function of the output power. Theoretical analysis for single-phase converters, example design and experimental results for a high voltage gain Sepic converter with MSSC was exposed in this paper in order to demonstrate the performance of proposed converters. The implemented Sepic converter does not achieve high efficiency, however it was not the focus of this work. Efficiency converter could be enhanced by design optimization. [I] REFERENCES Wuhua Li, Jun Liu, Jiande Wu and Xiangning He, "Design and Analysis of Isolated ZVT Boost Converters for High-Efficiency and High-Step Up Applications," IEEE Transaction on Power Electronics, vo1.22, no.6, pp , Nov [2] Yi Zhao, Wuhua Li, Yan Deng, Xiangning He, Simon Lambert, Volker Pickert, "High step-up boost converter with coupled inductor and switched capacitor," in proc. 5th let International Conference on Power Electronics, Machines and Drives (PEMD 2010), vol., no., pp.i-6, April [3] K.e. Tseng and T.J. Liang, "Novel high-efficiency step-up converter," fee Proceedings Electric Power Applications, vo1.l51, no.2, pp , Mar [4] ng-jong Wai and u-yong Duan, "High step-up converter with coupled-inductor," IEEE Transaction on Power Electronics, vo1.20, no.5, pp , Sept [5] Y ohan Park and Sewan Choi, "Soft -switched interleaved boost converters for high step-up and high power applications," in proc International Power Electronics Conference (IPEC), vol., no., pp ,21-24 June [6] Rui Xie, Wuhua Li, Yi Zhao, Jing Zhao, Xiangning He and Fengwen Cao, "General law of non-isolated interleaved high step-up topologies with winding-cross-coupled inductors deduced from isolation counterparts," in proc IEEE Energy Conversion Congress and Exposition (ECCE), vol., no., pp , Sept [7] Y. Jang and M.M. Jovanovic, "New two-inductor boost converter with auxiliary transformer," IEEE Transaction on Power Electronics, vol.l9, no. 1, pp , Jan [8] Qun Zhao and F.e. Lee, "High-efficiency, high step-up DC-DC converters," IEEE Transaction on Power Electronics, vol.l8, no.!, pp , Jan [9] Jung-Goo Cho, Ju-Won Baek, Geun-Hie Rim and louri Kang, "Novel Zero-Voltage-Transition PWM Multiphase Converters," In IEEE Trans. on Power Electr., Vol.l3, No.1, pp , January [10] H.-B. Shin, E.-S. Jang, J.-G. Park, H.-W. Lee and T.A. Lipo, "Generalized steady-state analysis of multiphase interleaved Boost converter with coupled inductors," in lee Proc.-Electr. Power Appl., Vol. 152, No.3, pp , May [11] H.-B. Shin, E.-S. Jang, J-G. Park, H.-W. Lee and T.A. Lipo, "Smallsignal analysis of multiphase interleaved boost converter with coupled inductors in lee Proc.-Electr. Power Appl., vo1.152, no.5, pp , Sept [12] Wuhua Li, Yi Zhao, Yan Deng and Xiangning He, "Interleaved Converter with Voltage Multiplier Cell for High Step-Up and High Efficiency Conversion," IEEE Transaction on Power Electronics, Vo1.25, No.9, pp , September [13] Changwoo Yoon, Joongeun Kim, Sewan Choi, "Multiphase DC DC Converters Using a Boost-Half-Bridge Cell for High-Voltage and High-

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