Basic Electronics: Carnegie Mellon Lab Manual. Edited by Curtis A. Meyer

Transcription

1 Basic Electronics: Carnegie Mellon Lab Manual Edited by Curtis A. Meyer

2 ii COPYRIGHT c 2012 Carnegie Mellon Department of Physics and Curtis A. Meyer ALL RIGHTS RESERVED. No part of this work covered by the copyright hereon may be reproduced or used in any form or by any means graphic, electronic, mechanical, including but not limited to photocopying, recording, taping, web distribution, information networks, or information storage and retrieval systems without written permission of the editor. For permission to use material from this manual, contact the editor via cmeyer@curtismeyer.com Web:

3 Foreword The laboratory projects described in this manual are the basis of the electronics course taught at Carnegie Mellon University. The labs follow the textbook Basic Electronics: An Introduction to Electronics for Science Students by Curtis A. Meyer and span topics from simple DC circuits through an introduction to digital electronics. The lab course meets about twice per week for three hours at a time and will cover all eleven labs in this manual. Each lab starts with short section identifying which material in the textbook is related to the lab and what the goals are for the particular lab. This is followed by an introduction to the material covered in the lab which tries to summarize the material in the textbook. After the introduction is a section which contains preliminary lab questions. These questions are based on the material in the introduction and should be answered before starting to work on your lab. This section is followed by one which lists the equipment and parts that are needed for the lab. The final section in each lab is the procedure that you will follow in doing the lab. You will find boxed questions throughout the procedure which should be answered in your lab. Your lab work will be recorded in a lab book that is provided in lab. Do your preliminary lab questions in this book and then have an instructor sign off when you have completed them. Your actual work should be recorded in your lab book in ink, although you may tape in printouts of data spread sheets and computer-generated plots of your data. A lab book should roughly follow the following organization. 1. Your preliminary lab questions with an instructor s signature to verify that this has been accurately completed. This accounts for 10% of your lab s score. 2. An introduction/purpose for the lab which identifies the goals of the lab. This should be at most a three-to-four sentence description of what you will be doing, and what you expect to learn from the lab. This accounts for 5% of your lab score. 3. A procedure of how you did this lab. This should be a short description of how you set up the lab. It MUST include relevant circuit diagrams. It is also a good place to include the measured values of all the components that you are using. Finally, you should summarize the measurements that you will be making. eg We will measure the frequency response of the circuit by using a measured input signal and scanning over a frequency range from 1 to 1,000,000 Hz. We will measure the input voltage, the output voltage and the phase difference between the input and the output using our oscilloscope. Do not write a novel, but write enough information that you can set up and repeat your measurement using only your lab book. If there are multiple sections to the lab, you need a procedure for each section. This accounts for 10 to 20% of your lab score. 4. Your data and preliminary plots show the data that you collected. This should contain the data that you collected during the lab. It is either in hand-written, properly labeled tables, or from a printed out spreadsheet. Be sure this is labeled including units. This section can also contain neat, hand-drawn sketches of the data to help identify where you need to collect additional data points. iii

4 iv These are not your analysis plots, they only help you identify when the data are changing rapidly and allow you to collect additional points if needed. Finally, if there were problems encountered during data collection, mention them here, and describe how they were resolved. This accounts for 10 to 30% of your lab s score. 5. Your analysis and discussion of your data is a very important part of your lab. This section should include computer-generated plots of your data. If possible, you should also overlay the expected theoretical curves on top of your data and comment on where things agree and disagree. For major disagreements, there should be some additional discussion as to why this occurred. This section should also contain any calculations that you need to carry out, and if there are theoretical expectations, it should contain the mathematical formula that are needed. You do not need to derive the formulas, but the formulas must be present in your lab book. This accounts for 20 to 50% of your lab s score. 6. As noted above, there are questions throughout the lab write up. It is necessary to answer these questions in your lab book. This can be done when they are encountered, or you can do it in a dedicated section in your report. These questions are enclosed in boxes in the text that leave sufficient space for you to write the answer. You may find this a convenient way of making sure that you have answered all these question. You can then copy the answers into your lab booxk. These questions account for about 10% of your lab s score. Question Is this enough space for an answer? 7. You lab work must have a summary or conclusion. What did you learn in the lab? This section should contain a brief description of what you learned in the lab. It should also summarize how well your lab agreed with expectations. You may also make suggestions for improving your procedure. This accounts for 5% of your lab s score. In order to help you in the early labs, sections on data collection have been provided in labs 1, 2, 3 and 4. These give a suggested data table for collecting some of your data, as well as providing a few hints in data collection. It is expected that by the end of lab 4, you will have mastered this skill and are expected to be able to do this your self in the remaining labs. We have also provided an Appendix to this lab manual which describes the proto-board that is used to build your circuits. Before starting the first lab, it is advisable that you read through this Appendix to become familiar with the board.

5 Contents 1 DC Elements and Measurements Introduction Preliminary Lab Questions Equipment and Parts Procedure Additional Problems Oscilloscope and Signal Generator Operation Introduction Preliminary Lab Questions Equipment and Parts Procedure Additional Problems RC and RL circuits: Time Domain Response Introduction Preliminary Lab Questions Equipment and Parts Procedure Additional Problems RC, RL, and RLC circuits: Frequency Domain Response Introduction Preliminary Lab Questions Equipment and Parts Procedure Additional Problems AC to DC Conversion and Power Supplies Introduction Preliminary Lab Questions Equipment and Parts Procedure Additional Problems v

6 vi CONTENTS 6 Voltage Multipliers Introduction Preliminary Lab Questions Equipment and Parts Procedure Additional Problems Bipolar Junction Transistors, Emitter Followers Introduction Preliminary Lab Questions Equipment and Parts Procedure Additional Problems Bipolar Junction Transistor: Inverting Amplifiers Introduction Preliminary Lab Questions Equipment and Parts Procedure Additional Problems Introduction to Operational Amplifiers Introduction Preliminary Lab Questions Equipment and Parts Procedure Additional Problems Operational Amplifiers with Reactive Elements Introduction Preliminary Lab Questions Equipment and Parts Procedures Additional Problems The Transition from Analog to Digital Circuits Introduction Preliminary Lab Questions Equipment and Parts Procedure Additional Problems Digital Circuits and Logic Gates Introduction Preliminary Lab Questions Equipment and Parts Procedure Additional Problems

7 CONTENTS vii A The PB10 Proto-board 171 A.1 Introduction A.2 Connections on the PB10 Proto-board A.3 Hints on wiring circuits on the PB10 Proto-board B Component Labels 175 B.1 Resistor Codes B.2 Capacitors B.3 Semiconductor Labels B.4 Diodes B.5 Transistors B.6 Integrated Circuits C Curve Fitting in Excel 185 C.1 Introduction C.2 Performing Linear Fits to our Data C.3 Performing General Fits to our Data

8 viii CONTENTS

9 Chapter 1 DC Elements and Measurements Reference Reading: Chapter 1, Sections 1.3, 1.4, 1.5 and 1.6. Time: Two lab periods will be devoted to this lab. Goals: 1. Become familiar with basic DC ( direct current : zero frequency or constant bias) elements, measurements, and responses. 2. Become familiar with I-V curves for several (linear and non-linear) elements we will use throughout the semester. 3. Become familiar with power computation and the power limitations of real devices. 4. Be able to replace a circuit element with a Thèvenin equivalent circuit which has the same I-V curve. 5. Test the basic circuit theory of linear devices developed in class and the textbook, most importantly, the voltage divider equation and Thèvenin s theorem. 1.1 Introduction The electrical current, I, through a circuit element is almost always related to electric fields resulting from the application of a voltage, V, across the circuit element. The potential energy difference across the circuit element for a charge Q is just QV. Increasing V across a device corresponds to increasing the average electric field inside the device. The actual electric field inside the device may be highly nonuniform and depend on the arrangement and properties of the materials within the object. However, the behavior of a circuit element within a circuit is generally determined by the relationship between I and V without detailed knowledge of the actual electric field. In this lab, you will study the relationship between I and V for a variety of devices The I-V curve. The I-V curve of a circuit element or device may be obtained in the following manner. First, the element is connected to an external power source such as a variable voltage power supply. Next, the current through the device, I, and the voltage across the device, V, are measured. The external power supply is then varied so I and V are changed and the new values are measured. This procedure is repeated and the points are plotted on a graph of I vs V. The curve which connects these points is called the I-V curve for the device being tested. 1

10 2 CHAPTER 1. DC ELEMENTS AND MEASUREMENTS Linear devices have I-V curves that are straight lines. For many devices, the response or current through the device is proportional to the input or voltage across the device over a broad range and their I-V curves obey Ohm s law: V = IR. (1.1) Devices which obey Ohm s law are called resistive elements. Other elements may have non-linear I-V curves or response. In some cases the response is not even symmetric about zero voltage (the response depends on the polarity of the applied voltage). For direct current, power dissipation can always be written as P = V I. (1.2) This is just the potential energy change per charge (V ) times the amount of charge per second (I) passing through. For resistive elements, this reduces, using Ohm s law, to P = V I = I 2 R = V 2 R. (1.3) Any of these forms can be used for resistors choose the most convenient for your purposes. non-linear devices, you have to use (1.2) Diodes and light-emitting diodes Most of the components whose I-V curves we measure will be symmetric for positive and negative voltage. However, both the Zener diode and the light-emitting diodes are exceptions to this behavior. They have a very definite polarity. These components are discussed in Section B.4 of Appendix B where it is shown that the two legs of a diode have different names. They are known as the anode and the cathode. A diode is said to be forward biased if the voltage at the anode is more positive than the voltage at the cathode. The diode is said to be reverse biased if the opposite is true. For

11 1.2. PRELIMINARY LAB QUESTIONS Preliminary Lab Questions The work in this section must be completed and signed off by an instructor before you start working on the lab. Do this work in your lab book. 1. Carefully plot the I V curve of an ideal resistor of R = 100Ω for voltage values between 0 and 15 Volts. Be sure to label all axis and put the correct values on them. 2. Two resistors, R 1 and R 2 are placed in series, what is the equivalent resistance of the two?

12 4 CHAPTER 1. DC ELEMENTS AND MEASUREMENTS 3. Three resistors, R 1, R 2 and R 3 are placed in parallel. Sketch the circuit represented by this. What is the equivalent resistance of the three? Sketch the equivalent circuit. 4. You have a perfect current source of I = 1 A and hook it up to a load, R L. What is the I V curve of this device for voltages between and 10 Volts. 1.3 Equipment and Parts In this lab we will utilize the following equipment. This equipment is located at your lab station. 1. The Global Specialities 1302 DC Power supply. 2. The Metex 4650 digital meter. 3. The Global Specialities PB10 proto-board (see Appendix A for a description). Note that this board should be part of the PRO-S-LAB kit that include a power brick and power bus as well. These latter two parts are not needed until lab 7. You will also need the following components in order to carry out this lab. It makes more sense to get them as you need them, rather than all at once before the start of the lab. 1. A 10 Ω resistor. 2. A 47 Ω resistor. 3. A 100 Ω resistor. 4. Two 1 kω resistor.

13 ýƒ ƒ ƒ 1.4. PROCEDURE 5 5. A 10 kω resistor precision 10 kω resistors precision 20 kω resistors. 8. A 1 kω potentiometer. 9. A 10 kω potentiometer. 10. A low-current light-emitting diode (red, green or yellow). 11. A very bright light-emitting diode (blue or violet). 12. Either a 5.6 V or a 7.2 V Zener diode, depending on what is available. 13. A light bulb. 14. An AA 1.5 V battery. 15. Assorted wires for connections. 1.4 Procedure I-V (current-voltage) curves of passive circuit elements A passive element is a two-contact device that contains no source of power or energy; an element that has a power source is called an active element. In the first part of the laboratory, you are to measure and plot the current vs. voltage curve for various passive circuit elements. You are also to plot the power dissipation in each element vs. applied voltage. You need to decide which of the circuit elements are resistive and which are not resistive. For those elements which are resistive, determine the resistance, R. To do these measurements, you will connect the device under test to a variable voltage power supply and measure I and V as you vary the voltage control of the power supply. Use the circuit shown in Fig V ƒ 1kΩ X A ƒ ƒ I I X V V X Figure 1.1: The setup for measuring the IV curve for a passive element, X. The objects labeled A and V are ammeters (ampere-meters) and voltmeters, respectively. The voltage supply is a variable one with a range from 0 to 15 Volts. 1. In this first lab, your first challenge is to correctly wire the circuit in Figure 1.1 on the protoboard at your lab station. A description of the internal connections of this board can be found in Appendix A of this lab manual. 2. If you have not wired up circuits before, have the instructor check your wiring before switching on the power supply.

14 6 CHAPTER 1. DC ELEMENTS AND MEASUREMENTS 3. Use your circuit from Figure 1.1 to measure the I-V curves and the power dissipation of the following elements. A 1kΩ resistor. A 47Ω resistor. Either a 5.6 V or a 7.2 V Zener diode (depending on availability). A low-current LED (red, green or yellow). A very-bright LED (blue or violet). light bulb (replace the 1k resistor in Fig. 1.1 with 100 Ω). The symbols for these electronic symbols for these elements are shown in Figure 1.2, where we also include the symbol for a variable DC voltage supply. When making these measurements, record the Applied Voltage from the supply, the voltage across the device from the volt meter, and the current through the device. Resistor Zener Diode LED Lamp Variable DC Supply Figure 1.2: The electronic symbols for the components used in this lab. For the diodes, the end with the vertical line is the cathode. 4. Make a table of all your data points and plot them as you go along. Reverse the polarity of the applied voltage by reversing the orientation of the element; this allows you to do measurements from 15 to +15 volts on the supply. 5. When measuring the Zener diode and the LEDs, be sure to have positive voltages correspond to forward biasing the diode and negative voltages corresponding to reverse biasing the diode (see Section 1.1.2). Data Collection: In this section of the lab, we want to collect data to allow us to measure the I V curves of the passive elements, X in Figure 1.1. In order to do this, we need to record the voltage, V X, across the element X and the current I X through the element X. It would also be advisable to record the supply voltage, V S, which we are varying from 15 V to +15 V. As you collect this data, it is advisable to make sketches by hand in your lab notebook. Alternatively, if you are recording the data in a spread sheet, then making a plot of the data on your computer is useful. The purpose of this is to let you know if you have collected enough data. If the curve is a simple straight line, then fewer points are necessary than the case where the curve is changing rapidly. You should also think about the order in which you will take data points before you start in order to plot as you go, you need to know what scale to use for your the axes! Finally, you should put computer-generated plots of your data in your lab book. You also must have a copy of the numerical values of your data in your lab book. It can either be written in by hand, or if you took it in a spread sheet, print out the data and neatly tape it into your lab book. Finally, add plots of the power dissipation vs. applied voltage. This can also be done in your plotting program, however make sure that your results are sensible! Finally, DO NOT JUST STAPLE A BUNCH OF FULL SHEETS OF PAPER IN YOUR LAB BOOK!!!! Trim them to reasonable size and neatly tape or glue them into your lab book. In collecting your data, the following should guide you in developing your lab book. First, record the expected and measured values of all components. For the 1 kω resistor in the circuit:

15 ƒ ƒ 1.4. PROCEDURE 7 The 1 kω resistor has a measured value of xxxx Ω. Similarly, for the components, X, record the measured values when appropriate. Finally, your data should be collected in a table that looks something like Table 1.1. Data for the component X. Source Voltage Component Voltage Component Current V S (Volts) V X (Volts) I X (Amperes) Table 1.1: A sample data table for measuring the I V curve of a passive element X I-V (current-voltage) curves of active circuit elements The I-V (load curves), curve of active circuit elements, such as batteries and power supplies, can be obtained by connecting the elements to an external circuit consisting of a single variable resistor. A circuit for measuring the I-V curve of active elements is shown in Fig A circuit connected to a power source is often called the load on the power source and in this case the single resistor, R L, is called the load resistor. As you will see, a big load (that is, a small resistance) tends to load down the source. Question 1.1 Think about this language: what s big about connecting a small resistor? Source ƒ ƒ R L V V S I I S ƒ A ƒ ý Figure 1.3: The setup for measuring the load curve of a power source. The objects labeled A and V are ammeters (ampere-meters) and voltmeters, respectively. The resistor with the arrow through it is a variable resistor, or a potentiometer. The I-V curve is obtained by varying the load resistor R L to obtain a set of (I, V ) points to plot on a graph. You must find a suitable range of values for R L so that you get a range of values for I and

16 ýƒ ƒ 8 CHAPTER 1. DC ELEMENTS AND MEASUREMENTS V. If all your values of R L are too large, V will vary only a tiny amount; if R L is too small, the total power V 2 /R could exceed the power limitations of the resistor. Any circuit with two output terminals can be considered as a source. It can be a battery, a power supply, two terminals on the outside of a black box. It does not matter. What does matter is that there is an I-V curve for the source, and there are probably many circuits that give the same or equivalent I-V curves. Use the circuit shown in Fig. 1.3 to measure the I-V curves and power output of the devices listed below. For parts 1 and 2 use a 1 kω potentiometer for R L. In part 3, us a 10kΩ potentiometer for R L. 1. battery 2. a 50 ma current source circuit: set up your power supply as follows (a) with an open circuit at the output terminals, set the voltage knob to 10V, (b) turn the current limit knob to zero, (c) attach a 10 Ω resistor across the output terminals, and then (d) set the current limit knob to 50 ma; (e) remove the 10Ω resistor and use the output terminal as the source in Fig the voltage divider network shown in Fig. 1.4 using R 1 = R 2 = 1 kω and V = 10V. V ƒ R 1 ò + ƒ R 2 V o = V ò R2 R 1 +R 2 Figure 1.4: Voltage Divider Circuit for use in part 3. We will find it useful to be able to mimic the behavior of source circuit elements with an equivalent circuit consisting of either 1) an ideal voltage source in series with a resistor (Thèvenin equivalent circuit), or 2) an ideal current source in parallel with a resistor (Norton equivalent circuit). Question 1.2 What are the Thèvenin and Norton equivalent circuits for each of the active devices you investigated above?

17 ýƒ ƒ ýƒ ƒ ƒ ƒ ýƒ ƒ ƒ 1.4. PROCEDURE The R-2R ladder or current divider 10V ƒ 10 A ÿ ÿ 10 B ÿÿ 10 C 10 D ƒ 20 ƒ 20 ƒ 20 ƒ 20 ƒ 20 Figure 1.5: An R 2R resistor ladder. In this diagram, 10 stands for 10kΩ and 20 for 20kΩ. The type of circuit shown in Fig. 1.5 is used in digital-to-analog conversion (DAC), as we will see later in the semester. For the present, it is an interesting example of a resistor network which can be analyzed in terms of voltage and current division and, from various points of view, in terms of Thèvenin equivalents. (a) D ð ƒ 20 (b) C ƒ 10 D ð ƒ ƒ ƒ ƒ Figure 1.6: (a) shows the circuit to measure the resistance R from D to ground. (b) shows the circuit to measure the resistance R from C to ground. We are going to study the properties of this network as we build it. It will be useful to collect all the parts that you need to construct this network using 1% metal-film resistors, but do not build it until you have read through the remainder of this section. If you are so foolish as to ignore this warning, you will find that you need to dismantle the network to make your measurements! 1. Start by simply putting a 20kΩ on the board as shown in Fig. 1.6a. Measure the resistance from the point D to ground. We refer to this as looking to the right into the load. 2. Now add the resistors as shown in Fig. 1.6b and measure the resistance looking to the right into the load (C to ground). 3. Continue to add pairs of resistors and measuring the resistance looking into the load, (B and A to ground) 4. Add the final pair of resistors and measure the resistance between the terminals to which the voltage source will be connected. You should now have the resistance network (without the voltage source) on your proto-board using 1% metal-film resistors. These resistors should all be within 1% of their nominal values (that is, the stated tolerance is the maximum deviation, not a standard deviation); the better the precision, the better the network that can be constructed. Show by calculation in your notebook that the results from above are as expected.

18 10 CHAPTER 1. DC ELEMENTS AND MEASUREMENTS Question 1.3 Calculate what you expect for the above measurements and compare them with what you have observed. Draw the equivalent circuit that the voltage source will see once it is connected to the resistor network that you built. 5. Now connect the 10 V source and measure the voltage to ground from points A, B, C and D. Question 1.4 Show that these are in accord with expectations. Compute the current and power drawn from the source.

19 ýƒ ƒ ƒ ƒ ƒ ƒ ƒ 1.4. PROCEDURE 11 Question 1.5 Lets think about extending the network to an infinite number of resistors in the chain. If we were to do this, what would the equivalent resistance of this network be? 10V ƒ 10 A ÿ ÿ 10 B ÿÿ 10 C 10 D ò + ò 20 ƒ 20 ƒ 20 ƒ 20 ƒ 20 Figure 1.7: An R 2R resistor ladder. In this diagram, 10 stands for 10kΩ and 20 for 20kΩ. Let us now consider our network as shown in Figure 1.7 where we connect two outputs at the end of the circuit. A measurement of the voltage between these terminals will yield the open-circuit voltage of our ladder. If we look back into these new output terminals, we can talk of the circuit in terms of its Thèvenin equivalent.

20 12 CHAPTER 1. DC ELEMENTS AND MEASUREMENTS Question 1.6 Sketch the Thèvenin Equivalent for this circuit in your lab book. 6. We can now determine V th and R th of the equivalent circuit. You can measure the open-circuit voltage by measuring the voltage from + to. The equivalent resistance could then be determined by measuring the short circuit current, for example by putting an ammeter between + and. Although it is safe in this case, this is generally considered to be a dangerous procedure. Question 1.7 Why is this procedure considered dangerous? 7. To illustrate a common practical way to determine the equivalent resistance of a source, do the following: Place a known resistance, with a value of the same order of magnitude as the expected equivalent resistance, from + to. By comparing the voltage across this test resistor with the open circuit voltage, the value of the Thèvenin equivalent resistance, R th, can be determined.

21 1.4. PROCEDURE 13 Question 1.8 Draw the relevant Thèvenin equivalent circuit for this measurement in your notebook and determine R th. How does the predicted short-circuit current compare to what you found by connecting an ammeter from +-to-? Why is it safe to measure the short circuit current with this circuit? A conclusion you should assimilate from this part of the lab is that one complicated circuit (for example, the ladder) can be thought of from many points of view many terminal pairs. For each pair of terminals, there is an equivalent circuit that would mimic the behavior of those terminals. There is no equivalent circuit for the entire circuit, but only for specific pairs of terminals. Knowing the equivalent for a pair of terminals makes it easy to think about what will happen to something you want to connect to those terminals. We will use this concept throughout the course!

22 ÿ ƒ ƒ 14 CHAPTER 1. DC ELEMENTS AND MEASUREMENTS 1.5 Additional Problems After completing this lab, you should be able to answer the following questions. 1. You build the circuit shown in Figure 1.8 below in lab. You supply an input voltage of V 0 to the circuit and look at the output voltage and current between the terminals A and B. In building your circuit, you have carefully chosen your resistors such that R 1, R 2 and R 4 all have the same resistance, R, while R 3 has twice this resistance (2R). (a) In terms of input voltage, V 0, and the characteristic resistance, R, what is the output voltage of our circuit, V AB? (b) If you connect an ammeter in series with resistor R 4, what does the ammeter read (quantity and value)? (c) If you connect an ammeter in parallel with resistor R 4, what does the ammeter read (quantity and value)? (d) Sketch the Thevènin equivalent circuit as seen looking into A-B for your circuit. In terms of V 0 and R, what are V th and R th? V 0 ƒ ÿ R 1 ƒ ÿ ò R 2 A R 3 R ý 4 V ƒ ÿ ƒ ÿ ò AB Figure 1.8: The circuit diagram for problem 1. B 2. You measure the following data for the I V curve between the two output terminals of the blackbox circuit shown in Figure 1.9 below. (a) Make an accurate sketch of the I V curve for your data. (b) What is the open-circuit voltage between the two terminals? (c) What load resistance was used to measure the 10 V data point? Black Box Voltage (V) Current (ma) Figure 1.9: The black-box circuit and data for problem 2.

23 Chapter 2 Oscilloscope and Signal Generator Operation Reference Reading: Chapter 2, Sections 2.1, 2.2, 2.3, 2.4 and 2.5. Time: Two lab periods will be devoted to this lab. Goals: 1. Become familiar with the operation of the Stanford Research Systems DS335 signal generator and the Tektronix TDS 2012B oscilloscope. 2. To become familiar with the various ways of characterizing waveforms: RMS vs. peak-to-peak amplitude, period vs. frequency content of periodic signals. 3. To optimize data collection techniques for measuring the frequency response of circuits. 4. To become acquainted with frequency response plots: Bode and phase plots. 5. To become acquainted with the terminology of decibels as used in standard electronic (and other) applications. 2.1 Introduction This Lab is designed to help you gain familiarity with the Function Generator and the Tektronix oscilloscope you will be using throughout the semester. The DS335 Synthesized Function Generator generates a variety of periodic waveforms of different periods and amplitudes. This is a precision function generator with a highly stable clock for generating signals with different periods. As the name implies, it digitally synthesizes its waveforms in much the same way that a CD player can synthesize signals (the information for which is stored in digital form) that eventually are heard as sound. The Tektronix TDS 2012B oscilloscope provides a means of observing these and other periodic waveforms. Very briefly, a digital oscilloscope emulates an analog oscilloscope which images a periodic waveform by repeatedly passing a dot (the position at which an electron beam hits the phosphor screen of a cathode ray tube) across a screen at a sweep rate (the rate of passage across the screen) and repeat rate (usually determined in various ways to generate a repeating pattern) appropriate for the signal being observed. Thus, the horizontal axis is time and the vertical axis is the voltage being measured. You can directly select the sweep rate and the scale factor for the vertical axis. The trickier part is to arrange to have the sweep repeated in such a way as to generate the same picture of the waveform on 15

24 16 CHAPTER 2. OSCILLOSCOPE AND SIGNAL GENERATOR OPERATION each sweep otherwise, you see a confusing jumble on the screen. As described below, the sweep can be triggered in several different ways. Taking data. Note: This discussion applies both the this lab and to several labs later in the semester. Both the signal generator and the oscilloscope operate over several decades in their key parameters: waveform amplitude and frequency. Not coincidentally, analog circuits must operate properly over a similar range of signal parameters and you will need to both characterize and display such behavior. The measurements are straightforward enough given the matched scales of the instruments. For properly displaying circuit behavior over several decades, a linear scale plot fails miserably. However, a base-10 logarithmic scale gives equal space to each decade or factor of 10 (actually, any base will do the same trick, but base-10 is conventional because of its simple powers-of-ten convenience). In this and subsequent lab exercises, you will want to select where you take data points (primarily at what frequencies) so that the points uniformly fill several decades on a log scale. If you want n points per decade, you d choose 10 1/n and integer powers thereof. For example, in frequency measurements with n = 1, you could take data at, for example, 1Hz, 10Hz, 100Hz,... or 5Hz, 50Hz, 500Hz,.... For n = 3, 1Hz, 2.15Hz, 4.62Hz, 10Hz, 21.5Hz,... could be used. When viewed over several decades, great precision is generally not necessary, so it is common to see 1Hz, 2Hz, 5Hz, 10Hz, 20Hz... used. You might also want to take note of the resistor values available (from about 1Ω through 10MΩ covering seven decades) in the laboratory and from manufacturers Using the DS335 synthesized function generator The controls for the DS335 are in three groups: 1. Buttons on the left control what is displayed: either the frequency, amplitude or the DC offset. 2. The center buttons (FUNC) control the form of the output waveform. 3. To the right is the DATA ENTRY section with a numeric keypad and increment buttons. The SHIFT key accesses the functions located above the numeric keys and the arrow keys below. 4. On the lower right is the POWER button and STATUS lights which, for our purposes, indicate when you input something the generator doesn t understand or can t do. The controls are summarized below; you should experiment to become familiar with these: 1. Upon power-up, the display cycles through a start-up procedure; wait for the default display to appear. Pressing SHIFT and INIT in the DATA ENTRY section puts the device into a default configuration: the output is a sine wave at 1MHz, 2V peak-to-peak (2V pp ), with no offset (the amplitude will read 1V pp because the default load impedance is 50Ω see section 4 below). 2. The default waveform is a sine wave. To change, toggle the FUNC button through square, triangular, sawtooth, and noise, then back to sine. 3. To change frequency: As you know from Fourier analysis, only a sine wave is composed of a single frequency component. Nevertheless, it is convenient to specify all the selectable waveforms by a single frequency designation. This frequency is really the inverse of the fundamental period (the repeat period) of the wave. Non-sine wave signals contain this frequency as well as higher order harmonic components at multiples of the fundamental frequency. Two methods are available for setting the frequency: 1. With the FREQ displayed, enter a number, then hit either MHz, khz, or Hz to specify the intended units; or 2. With FREQ displayed, you will notice that one of the displayed numbers is blinking. Press the Vpp/kHz up button and see that the blinking number is incremented upwards by one. Pressing SHIFT and or will shift the blinking digit so you can increment in larger or smaller amounts.

25 2.1. INTRODUCTION To change amplitude: The same two options are available as under FREQ mode. Note that you can specify the amplitude in two different units and with two different modes: 1. In Vpp mode, you enter the peak-to-peak excursion of the output voltage. This works for any waveform. 2. In Vrms mode, you enter the root-mean-square voltage. Only use this mode for sine wave signals. The Thèvenin equivalent resistance of the DS335 signal source is 50Ω. That is, the output of the generator looks like an ideal voltage (signal) source in series with a 50Ω resistance. The reading of the output display can be changed from High Z to 50Ω with switches in the DATA ENTRY section. The intent of this toggle is to allow you to display the actual voltage delivered to your load under the conditions that the load is i) much larger than 50Ω ( High Z setting) or, ii) equal to 50Ω ( 50Ω setting). If you have a load which does not satisfy either of these conditions, you should use the High Z setting and compute and/or measure the voltage delivered to your circuit. Toggling the reading does not change the output of the generator in any way! 5. DC level: One can superimpose a DC level on an AC signal: 1. Set up the desired AC signal. 2. Press OFFS 3. Enter the DC offset voltage in data entry. Using this, you can, for example produce a square wave where the low voltage side is at zero instead of a negative voltage; this will be useful for digital circuits. 6. Frequency sweep: The DS335 can repeatedly sweep its frequency over the entire range of its output or any fraction thereof at a rate selected by the user. The sweep can cover frequencies at either a linear or a logarithmic rate. To set up a sweep, follow these directions: 1. Reset to default settings. 2. Set the desired amplitude. 3. Press the SHIFT key, then the STOP FREQ/LIN/LOG key. The display should read Lin.Lo9, with the first L blinking indicating a linear sweep rate. You can toggle this with the and buttons. 4. Press SWEEP RATE, then enter the inverse of the desired sweep time (i.e., 0.5 Hz for a 2 second sweep through the selected frequency range). 5. Press the START FREQ key and enter the desired starting frequency. 6. Press the STOP FREQ key and enter the stop frequency. 7. To start the sweep, press SHIFT, then the START FREQ/ON/OFF key. The DS335 puts out a trigger pulse once for each frequency sweep, so you can trigger the scope once on each sweep in order to quickly visualize the frequency response of a circuit (you will need to set the scope sweep time to be greater than or equal to the DS335 sweep time).

26 18 CHAPTER 2. OSCILLOSCOPE AND SIGNAL GENERATOR OPERATION Using the TDS 2012B oscilloscope The User Manual for your oscilloscope is available in the lab. Pages 1-36 cover the basic operational details. The chapter on Application Examples shows how to do various types of measurements, several of which are similar to the laboratory exercises. Most features are documented in the instructions under the HELP button, which you can search via the index or by simply pressing HELP after pressing a button about which you would like to learn. Below are a few notes to help orient you. The TDS 2012B is more than a traditional oscilloscope. The latter would simply show a waveform as it occurs in a circuit. The TDS 2012B is a digital scope: it digitizes the waveform and can store a single waveform so that you can analyze it after it occurs. Like a storage scope, it will display on its screen indefinitely the last trace for which it was triggered. (Warning: This means you may be fooled into thinking the scope is seeing something when it is really displaying an old waveform! In particular if you press the RUN/STOP button, the scope won t run normally until you press it again. STOP lights up in red at the top of the screen to warn you if the scope has been stopped.) Of course, the scope can also perform the functions of a traditional real-time oscilloscope. The scope can save waveforms to floppy disks so you can do further analysis on a computer. The scope performs a variety of analyzes of waveforms (amplitude, period,...) and can do so in a continuous way, constantly updating the results. You will use this capability extensively. Some measurements (in particular, comparisons of different waveforms) require you to manipulate the cursors and read off values of various quantities. The controls for the scope are a combination of front panel knobs and menus displayed on the screen. Getting familiar with both of these is one of the main points of this lab. You select input channel 1 or 2 with the two buttons so-labeled (yellow and blue). After pressing one of these, you can change the settings for the corresponding channel. (Each channel has dedicated control knobs for vertical scale and vertical position, regardless whether that channel is selected or not.) Note that pressing a channel menu button when that channel is already selected turns off the display of that channel. Pressing again turns it back on. VERTICAL section: The scale of the vertical axis is controlled by the VOLTS/DIV knob. The calibration, in volts per large grid unit, is displayed on the screen. You can move the zero volt point with the position knob. Notice that the vertical scale for each channel is displayed on your scope screen (in volts per division). HORIZONTAL section: The scale of the horizontal axis (time) is controlled by the SEC/DIV knob. The calibration, in time per large grid unit, is displayed on the screen. You can move the track horizontally with the position knob. Notice the scope screen always displays the time scale (in time per division). TRIGGER section: The triggering of the sweep is controlled by this section. When trying to visualize a time-varying but periodic voltage (e.g. a sine wave), the scope needs to start its sweep at the same point on the waveform each time otherwise, you will just see a jumble of lines on the screen. By starting at the same point, you get a stable pattern. The LEVEL button controls the voltage level at which the sweep will begin. Note that, if this level is outside the range over which your input signal varies, the scope never triggers! (Or, in AUTO trigger mode, it will trigger randomly!) Several other controls are on the Trigger menu screen, accessed by pressing the Menu button. The SLOPE control determines whether the sweep begins when the input crosses the trigger level while rising(increasing in voltage) or while falling (decreasing in voltage). The SOURCE control decides whether channel 1 or 2 is tested for the trigger condition. (Or whether the EXT TRIG input, or the power line is used to trigger the scope.)

27 2.1. INTRODUCTION 19 Notice that the scope screen (on the bottom right) shows which channel it is triggering on, whether it is looking for a rising or falling slope, and a what level it will trigger. (It also displays the frequency at which it is being triggered.) In the Vertical, Horizontal and Trigger and sections are MENU buttons that bring up onscreen displays with expanded sets of options. One important button is the AUTOSET located on the right side of the top row. This generally sets the scope parameters so that the input signal will appear on the screen. When all else fails, try this! The ACQUIRE button allows you to select Sample mode (which is typically used) or Average mode which can be much more confusing, but is useful for cleaning-up a repetitive signal which has non-repetitive noise on it. The MEASURE button in the top row allows you to set up a variety of types of automatic measurements. Some measurements you will want to use include: the Frequency and RMS (which is usually more reliable than peak-to-peak which is more noise sensitive). The SAVE/RECALL and Print buttons allow you to save (to memories in the scope or to a flash drive) all the settings of the scope and/or a screen image and/or the measured values. If you save the settings, you can then re-adjust the scope for a different job and then return to what you were doing. (Starting next lab, you will use it to save the measured values of the waveform you are looking at. You mustn t confuse these two different ways of using SAVE!) There are also two memories (REFERENCE A and B) which can save a waveform so you can display it on the screen to compare to what you see later. The CURSOR button turns on vertical or horizontal markers (with their exact positions indicated). These are sometimes useful for making measurements by hand when the automated measurements are not trustworthy. It s always good to check occasionally to make sure the scope isn t giving nonsensical values with its automated measurements. The DEFAULT SETUP button will turn off any crazy modes to which the scope may be set (perhaps by the last people who used it). The scope probes allow you to test the voltage at various points in a circuit. Notice that the probes have X1 and X10 settings selected by a switch. Be careful to not use the X10 setting (unless you also set the scope to multiply its input by 10) or you will be off by a factor of 10 in the measurements you make.

28 20 CHAPTER 2. OSCILLOSCOPE AND SIGNAL GENERATOR OPERATION 2.2 Preliminary Lab Questions The work in this section must be completed and signed off by an instructor before you start working on the lab. Do this work in your lab book. 1. In plotting things as a function of frequency, the lab handout indicates that a good choice for frequencies can be found by choosing them according the the 10 1 n rule where n is the number of points per decade. See page 2 in the middle. Assume that we want to take 5 measurements per decade for frequencies between 1000 and Hertz. What values should we choose? 2. The output of your signal generator has two modes, V pp and V rms as described on page 3 of the lab handout. Assume that the voltage is given as V (t) = V o cos ωt. Sketch two cycles of this voltage as a function of time, and then show on your sketch what you would measure for both V pp and V rms. Be sure to express your answers in terms of V o.

29 2.3. EQUIPMENT AND PARTS On page three of your handout, the voltage source is described as having the Thèvenin equivalent resistance of 50Ω. Sketch what this circuit looks like. Assume that we set the source to high Z and connect a 10, 000Ω resistor to it. If we deliver 10V to the load, what is the voltage output reading of the supply? Now assume that we toggle the supply to its 50Ω setting. What is the voltage reading on the supply? (What is the actual voltage delivered to the load?) 2.3 Equipment and Parts In this lab we will utilize the following equipment. This equipment is located at your lab station. 1. The Tektronix TDS 2012B digital oscilloscope. 2. Two P2220 probes for the oscilloscope. 3. One USB memory stick. 4. The Stanford Research Systems DS335 signal generator. 5. One BNC to alligator cable. 6. The Metex 4650 digital meter. 7. The Global Specialities PB10 proto-board (see Appendix A for a description). Note that this board should be part of the PRO-S-LAB kit that include a power brick and power bus as well. These latter two parts are not needed until lab 7. You will also need the following components in order to carry out this lab. It makes more sense to get them as you need them, rather than all at once before the start of the lab kω resistors kω resistors.

30 22 CHAPTER 2. OSCILLOSCOPE AND SIGNAL GENERATOR OPERATION 3. 4 precision 10 kω resistors precision 20 kω resistors. 2.4 Procedure. 1. Play! Take notes of what you do and what you see/measure with the scope as you do this. Visualize each type of waveform from the DS335 on the oscilloscope. Adjust frequency, amplitude and DC offsets and observe the resultant waveforms. Be sure to try the different input coupling settings (DC or AC set using the channel menu buttons) on the scope as you change things like the DC offset. (It will be important to keep track of the setting of the coupling, especially when measuring at low frequencies or for signals which don t average to zero. Usually you want the coupling set to DC... except when you don t.) Try (using the Trigger menu) triggering internally and externally using the SYNC OUT from the DS335. Make sure that you understand the function of the High Z - 50Ω switch on the DS335. You will need to explain this to one of the instructors. Try saving you scope settings, messing things up and then recalling the saved settings. You probably can t trust the amplitude reading of the DS335. Often the most accurate measure of size of a signal is the one found by hand by positioning the scope s horizontal cursors where you best estimate the top and bottom of the signal to be. You can also tell the scope to make automated measurements of Pk-Pk (peak-to-peak size) and RMS. Note: You will always get the best accuracy from the scope if the vertical and horizontal scales are adjusted so one cycle of the waveform fills most of the screen! In general, don t forget to adjust your scope whenever the waveform starts to look small.

31 2.4. PROCEDURE. 23 Question 2.1 Compare all of these measurements to your hand measurements for sine, square, and triangle waves. Which automated measurements are the most accurate? What does the RMS voltage setting mean when applied to sine, square or triangle waves? Compare calculated RMS values to the waveforms you observe. 2. A Voltage Divider. Build a voltage divider with R 1 = 100 kω and R 2 = 2.2 kω. Measure the exact values of your two resistors so that you will be able to make accurate predictions. Now set your DS335 to a sine-wave output with a frequency in the range 100 khz to 1000 khz. Set the output voltage to be 0.75 V peak-to-peak. Connect this voltage across your divider, and then connect channel one of your scope across the entire divider. Use the scope, set to 1V/division, to measure the RMS and Peak-to-Peak voltage. Question 2.2 Are these consistent with the output of your signal generator? Measure the peak-to-peak voltage by hand (using the cursors) and compare to the previous measurements. Now adjust the scope to have 0.1 V/division and repeat your measurements. Connect channel two of the scope across R 2. Based on what you measured earlier, predict what you should measure on channel 2. Make the measurements and compare them with your predic-

32 24 CHAPTER 2. OSCILLOSCOPE AND SIGNAL GENERATOR OPERATION tions. Question 2.3 Which method is the most accurate? What problems do you encounter in your measurements? 3. Frequency response of the R-2R ladder circuit. Substitute the DS335 for the DC voltage source in the R-2R ladder circuit of Laboratory 1 (be sure to include the final 20kΩ resistor). Select a 10V pp sine wave with zero offset voltage (check with the scope to be sure this is what you ve got). Measure the amplitude of the voltage at point D as a function of frequency over the range 1Hz to 3MHz. As discussed in the introduction, take data so that when you make a plot with a logarithmic frequency scale the points are roughly equally spaced. To verify that the frequency dependence you observe is not a result of a variation in output of the DS335 or sensitivity of the scope, use both scope channels with one directly connected to the DS335 output. Be sure to use DC coupling of the input signal on both channels. Make a Bode plot of the measured frequency response. This is a log-log plot of the relative gain (V out (f)/v ref )) vs. frequency, where V ref is a chosen reference voltage. In this case, use 20 log 10 (V (f)/v (1000Hz) for the vertical axis and log 10 (f) for the horizontal axis. The vertical axis is referred to as a decibel or db scale it is a standard in electronics. A bel (named for Alexander Graham Bell) is a factor of 10 change in power. This is commonly used to measure quantities such as amplification and attenuation. For example, the amplification, in bels, is A bel = log 10 (P out /P in ). Then, since P V 2 for resistive loads, we have A bel = log 10 ((V out /V in ) 2 ) = 2 log 10 (V out /V in ). Then a decibel is a tenth of a bel, so the numerical value of the amplification in decibels is ten times more than it is in bels, so A decibel = 20 log 10 (V out /V in ). On a frequency response plot, the characteristic frequency is that frequency at which the response falls to 1 2 (about 0.7) of its nominal or reference value. Remembering that the power delivered to a resistor goes like V 2, this point corresponds to where the power delivered is reduced to 1 2 that at the reference frequency. Since log 10(0.7) 0.15, the vertical scale in the Bode plot is down by 3 db and this frequency is referred to as a -3 db point. Note the -3 db frequency on your plot. Also (if you have sufficient data range) determine the rate of fall-off of the frequency response in db/decade (this is called the roll-off rate).

33 2.4. PROCEDURE. 25 Question 2.4 If the response falls at a rate of α db/decade, what does this imply about the functional form of V (f)? Question 2.5 Is the high frequency behavior what you expect for a device made entirely of resistors? Can you explain what might be happening? Data Collection: Throughout this course, we will measure many Bode plots. In order to do this, there is a certain minimum set of data that we need to collect. First, always measure both v in and v out using your oscillscope. You will find that voltage given bv the signal generator may be inaccurate. Second, in order to measure a phase difference between the input and output, we need to measure how far through a cycle the output is shifted realtive to the input. We do this by measuring a time difference between the peak of the input and the peak of the output voltages. The phase difference, φ, is then computed from the frequency, f, and the time difference, t as φ = (2π) f t. Given this, we would expect to collect data as shown in Table 2.1. We note that the units listed in the table may not be the best choice milliseconds might be better than seconds. We also need to choose a form for v. Is it RMS, amplitude, or peak-to-peak? What ever we choose, we also need to be consistent throug out our measurements. Finally, in using our scope, it is best to put the larger signal on channel one. In this case, put v in on channel one and v out on channel two. 4. AC vs. DC coupling into the oscilloscope. When an input channel is set to AC coupling, an input blocking capacitor is put in series between the input terminal and the scope s amplifier.

34 26 CHAPTER 2. OSCILLOSCOPE AND SIGNAL GENERATOR OPERATION Measured Quantities Computed Quantities Frequency Input Output Time Gain Attenuation Phase Voltage Voltage Shift Shift f (Hz) v in (V) v out (V) t (s) v out /v in 20 db log G φ (rad) Table 2.1: The data needed to make a Bode plot of a circuit. This capacitor will reduce the scope s response at low frequency (we will consider this effect quantitatively in a later lab); the input gain is zero at zero frequency or DC. This blocking function is convenient when you want to examine a small AC signal that rides on top of a larger DC offset. By putting the same signal into both channels of the scope and coupling one AC and one DC, measure the frequency response of the AC coupled channel of the scope. At high enough frequency, both channels should yield the same trace you can overlap the traces so you can see when they start to deviate. Starting at a high frequency, measure the frequency response of the two channels and make a Bode plot using the ratios of the two measured signals. Determine the -3 db point and the roll-off rate. You will need to remain aware of these results when you do measurements throughout the rest of the semester. You ll have to choose whether to use AC or DC coupling for each measurement.

35 ƒ ƒ 2.5. ADDITIONAL PROBLEMS Additional Problems After completing this lab, you should be able to answer the following questions. 1. You are to build the R2R-ladder circuit shown below in lab. You supply an oscillatory input voltage of v in (t) with frequency ω i and measure an oscillatory output voltage, v out (t) with frequency ω o. (a) How is ω o related to ω i? (b) What is v out in terms of v in, R and ω i? (c) Make an accurate Bode plot of the gain of this circuit for a frequency range from 1 Hz up to 1 MHz. (d) Sketch the Thevènin equivalent circuit as seen looking into A-B for your circuit. In terms of V 0 and R, what are V th and R th? ð R ÿ ƒ ÿ ÿ ò 2R 2R R ð ƒ ÿ ƒ ÿ ò v out(ω o, t) ƒ ÿ v in (ω i, t) R Figure 2.1: The circuit for problem 1. R 2. In Figure 2.2 is an image of your oscilloscope from lab. The solid curve is channel 1 and the dashed curve is channel 2. You may assume that the input to your circuit is displayed on channel 1 and the output from your circuit is on channel 2. Answer the following questions based on these measured scope traces. (a) What is the frequency of the input signal? (b) What is the peak-to-peak and the RMS voltage of the output signal? (c) For this particular frequency, what is the gain, G, of your circuit? (d) For this particular frequency, what is the phase difference φ = φ out φ in, (in degrees) between the input and output? (e) On the plot above, accurately sketch what the output signal would look like if the phase difference from part (d) were 180. Voltage (volts) Time (ms) Figure 2.2: The measured signals for question 2.

36 28 CHAPTER 2. OSCILLOSCOPE AND SIGNAL GENERATOR OPERATION

37 Chapter 3 RC and RL circuits: Time Domain Response Reference Reading: Chapter 2, Sections 2.6, 2.7 and 2.8. Time: Two lab periods will be devoted to this lab. Goals: 1. Characterize the exponential response to step inputs of reactive circuits. 2. Come to terms with the meaning of a characteristic time : τ = RC or τ = L/R. 3. Understand two rules of thumb: (a) One cannot instantaneously change the voltage across a capacitor. (b) One cannot instantaneously change the current through an inductor. 3.1 Introduction We introduce two new circuit elements in this laboratory: capacitors and inductors. Together with resistors, these complete the list of two-terminal, linear devices which are commonly used in electronics. In this and the following lab, we will study circuits with various combinations of resistors, capacitors, and inductors from two different points of view: the time domain and the frequency domain. In the time domain we examine transient responses to sudden changes in applied voltages (the closing of a switch or the application of a step change in voltage). In the frequency domain, we will study the response to sinusoidal applied voltages as a function of frequency. The two points of view turn out to be entirely equivalent: complete knowledge of the behavior in one domain implies (with appropriate theory) complete knowledge of behavior in the other. Both points of view are useful throughout electronics as well as being applicable to a wide variety of other physical systems RC circuit analysis The voltage across a resistor-capacitor pair wired in series (see Fig. 3.1) must equal the voltage across the capacitor plus the voltage across the resistor. If we write the voltages as a function of time (as opposed to functions of angular frequency ω), then we are using a time domain treatment of the problem. The equation for the voltages in the RC circuit is v(t) = v C (t) + v R (t). (3.1) 29

38 ƒ ƒ 30 CHAPTER 3. RC AND RL CIRCUITS: TIME DOMAIN RESPONSE Using the relations v C = Q/C and V R = i(t)r, this can be rewritten as: Q(t) on the capacitor and i(t) in the circuit loop are related by assuming Q(0) = 0, or v(t) = Q(t)/C + i(t)r. (3.2) Q(t) = t 0 i(t )dt, (3.3) i(t) = dq dt. (3.4) Combining (3.3) or (3.4) with (3.2), a variety of interesting limits can be found. For example, by taking the derivative of (3.2), we get that dv dt = i C + R di dt. We can now express the right side in terms of a single time varying quantity, v R (t) as dv dt = v R(t) RC + dv R(t) dt If the voltage across the resistor changes slowly enough we can neglect the second term on the right. or dv R dt 1 dv R v R dt v R RC 1 RC. Referring back to equation 3.2, this amounts to requiring the voltage across R to be small, so most of v(t) appears across C. Finally, we get that. v R (t) = RC dv dt. (3.5) ò ƒ ÿ C ò ƒ ƒ ÿ / R ý ò ƒ ÿ Thus, for slowly varying signals, the voltage across the resistor is proportional to the derivative of input voltage. This is called a differentiating circuit as it will differentiate slowly varying input voltages. v(t) v C (t) v R (t) Figure 3.1: An AC source, v(t), driving a simple RC circuit. We can measure the output voltage across the capacitor, v C (t) or the resistor, v R (t). As noted in out textbook, the quantity τ RC RC (3.6)

39 3.1. INTRODUCTION 31 has the units of time. We define this to be the characteristic time τ RC of an RC circuit. This is a quantity that will see many times during this course. This allows us to rewrite equation 3.5 as One can also take the integral of equation (3.2) to get t 0 v R (t) = τ RC dv dt. (3.7) v(t )dt = 1 C t 0 Q(t )dt + Q(t)R. (3.8) Looking back at (3.2), we see that as long as the voltage on C is small, we can neglect the last term on the right. This means that and we note that so we have that Q(t) RC i(t) i(t) = dq dt 1 di i dt 1 RC which means that the signal should be rapidly varying. Dividing equation 3.8 by RC, we get that v C (t) = 1 RC t This can be written in terms of the characteristic time as v C (t) = 1 τ RC 0 t 0 v(t )dt. v(t )dt. (3.9) Thus, we see that for rapidly varying input signals, the voltage across the capacitor, v C (t), is the integral of the input voltage, v(t). In this lab, we are going to consider a step-function input voltage where at time t = 0, the voltage instantaneously goes from zero to some value, V 0, and the remains at V 0 for all future times. Given this an an input voltage, we would find the following solutions for the voltage across the resistor and the capacitor for times t > 0. v R (t) = V 0 e t/τ RC (t > 0) (3.10) ) v C (t) = V 0 (1 e t/τ RC (t > 0) (3.11) We also note that, as expected, v R (t) + v C (t) = V 0. For a step-function input, we can also look at equations 3.7 and 3.9 which indicate that the voltage across the resistor should behave like the derivative of our step function, while that across the capacitor should behave like the integral. At first glance, this seems a bit crazy to claim that equations 3.10 and 3.11 behave like this. However, we have a couple of caveats on how rapidly the signal is changing for these to work. In the case of the derivative, if we look at equation 3.10 on time scales much larger than τ RC, the exponential decay will look like a spike. Similarly, if we look at equation 3.11 on time scales small compared to τ RC, then the output will look like a linearly rising voltage. Both of these are consistent with what we expect.

40 32 CHAPTER 3. RC AND RL CIRCUITS: TIME DOMAIN RESPONSE Analysis of RL circuits The voltage across an inductor-resistor pair in series can be written as and can be expanded to yield that v(t) = v L + v R v(t) = L di + ir. (3.12) dt An analysis similar to that above for the capacitor yields integrator and differentiator circuits built using an inductor. For slowly varying inputs, most of the voltage is across the resistor and the remaining voltage across the inductor satisfies the expresion Dimensional analysis implies that v L (t) = L R dv dt. τ LR L R (3.13) is the characteristic time constant for this LR circuit. Thus, we can write our voltage across the inductor as v L (t) = τ LR dv dt. (3.14) For rapidly varying inputs, most of the voltage is across the inductor and the voltage across the resistor can be written as v R (t) = 1 τ LR t 0 v(t )dt. (3.15) As we did with the capacitor, we can also consider a step-function input to this circuit. In the limit of a pure inductor, we would find a solution similar to what we did for the capacitor. As the current is changing rapidly at time t = 0, we would initially find all the voltage across the inductor, and none across the resistor. It would then decay away from the inductor, and build up on the resistor, In the case of a physical inductor, there is not only an inductance L, but and internal resistance R L as well. This means that at long times, we have a voltage divider with resistors R and R L. Solving the equations and defining the characteristic time to be Thus, we would find that v R (t) = v L (t) = τ RL = L R + R L. (3.16) R ( ) V 0 1 e t/τ RL R + R L R L R + R L V 0 + (3.17) R R + R L V 0 e t/τ RL. (3.18) We note the subtle difference between these expressions and the corresponding ones for the capacitor. In particular, we see the impact of the two resistors, R and R L, leading to terms that come from the voltage divider expression. The long time limit of the voltage across the resistor is v R (t = ) = R R + R L V 0,

41 3.1. INTRODUCTION 33 while that for the inductor is v L (t = ) = R L R + R L V 0, As with the capacitor, we have v R (t) + v L (t) = V 0 at all times.

42 ƒ ƒ 34 CHAPTER 3. RC AND RL CIRCUITS: TIME DOMAIN RESPONSE 3.2 Preliminary Lab Questions The work in this section must be completed and signed off by an instructor before you start working on the lab. Do this work in your lab book. V ƒ ÿ C ƒ ý ÿ ƒ R V R V ƒ ÿ L ƒ ý ÿ ƒ R Figure 3.2: Figure for the prelab work. V R 1. What are the characteristic time constants for the following circuits? Take R = 4.7 kω, C = 0.1 µf, L = 1 mh. 2. Of what order are the differential equations that govern the behavior of the above circuits? 3. After a long time, which element in the left-hand circuit will have a significant voltage? In the right-hand circuit? What about at the instant of closure of the switches?

43 3.3. EQUIPMENT AND PARTS Equipment and Parts In this lab we will utilize the following equipment. This equipment is located at your lab station. 1. The Global Specialities 1302 DC Power supply. 2. The Tektronix TDS 2012B digital oscilloscope. 3. Two P2220 probes for the oscilloscope. 4. One USB memory stick. 5. The Stanford Research Systems DS335 signal generator. 6. One BNC to alligator cable. 7. The Metex 4650 digital meter. 8. The Global Specialities PB10 proto-board (see Appendix A for a description). Note that this board should be part of the PRO-S-LAB kit that include a power brick and power bus as well. These latter two parts are not needed until lab 7. You will also need the following components in order to carry out this lab. It makes more sense to get them as you need them, rather than all at once before the start of the lab Ω resistor kω resistor. 3. One additional resistor you choose to match the inductor pf capacitor µf capacitor mh inductor. 3.4 Procedure Gotcha! 1. Is the DS335 set to be High-Z? 2. Is the voltage offset of the DS335 set to 0 V? 3. Is the current limit turned to the maximum value on your DC power supply? 4. Do you want to use AC or DC coupling on your oscilloscope? If you are interested in seeing a DC offset, then you need to DC couple. If you want to only see the time-varying part of the signal, then you want to AC couple. 5. Recall from lab 2 that at very-low and very-high frequencies, AC coupling may attenuate your signals.

44 ƒ 36 CHAPTER 3. RC AND RL CIRCUITS: TIME DOMAIN RESPONSE Time domain response of RC circuits Voltage across the resistor. Investigate the output characteristics of the circuit shown in Fig In order to observe the complete transient response, you want to apply a step voltage and then hold this applied voltage for a time that is long compared to τ (i.e., until the transient has died away). A transient is a temporary signal which exists as a system moves from one stable mode to another. In this case, the transient exists as the system moves from an uncharged capacitor and zero applied voltage to an applied voltage and a steady charge on the capacitor. 1. Set up the circuit shown using C = 0.33µF and R = 1kΩ. 2. As the supply voltage, use 5 Volts from the DC supplies at your experimental station. The diagram indicates that you could ground one point of the circuit. In fact it is more convenient to work with the circuit floating, meaning that you don t ground any point. Then you can connect the scope leads (one of which is grounded) anywhere in the circuit without introducing an unintended short. 3. Calculate the numerical value of the time constant for this circuit. 4. Instead of using a switch, you should be able to obtain the transient response by plugging a banana plug into the terminal on your proto-board or just plugging a jumper wire into the proto-board. 5. You will have to set up the oscilloscope to take a single shot measurement of the transient. This will require some trial and error to make the triggering work and to be sure that you get the horizontal and vertical scales right. Remember that you must discharge the capacitor after each attempt you can do this by connecting a wire across it for a short time. You can erase trial signals and reset the trigger by pushing the single seq button. If you have trouble capturing the signal with your scope, you may want to warm up on something simpler. Try to measure the voltage across a resistor just as you apply voltage across the resistor. This gives you a very simple step function to practice triggering your scope. 6. Once you have obtained a clean transient signal, you should transfer the data to a diskette so that you can perform least-squares fits on a computer. Be sure to SAVE the wave function of interest (not the scope setup and not the wrong channel of the scope) in spreadsheet format. To make sure everything is working correctly, plot at least one of your measurements on the computer before going on to do the rest of the experiment. 7. Verify that the expected functional form and time constant are observed. (a) To verify the functional form, make a plot that will make the expected form a straight line. To do this, note that if v(t) = Ae t/τ (3.19) then V ln v(t) = ln A t/τ. (3.20) ƒ ÿ C ƒ ý ÿ ƒ R Figure 3.3: The setup to measure the time response of an RC circuits. V R

45 3.4. PROCEDURE 37 (b) The above equation implies a natural way to plot your data. Find a way to plot your data so that your data points form a straight line with slope 1/τ. What happens if you use log 10 (...) instead of ln(...) (log 10 is a more customary way to plot data because humans have ten fingers instead of !)? The input function to your circuit is a step function that turns on when you close the switch. When we are looking at the response of an RC circuit, we talk about times either long or short compared to the time τ = RC. Question 3.1 What does the derivative of a step function look like? What part(s) of the observed output signal mimics the derivative of the input signal? Is this consistent with the above equations? Voltage across the capacitor. 1. Reverse the positions of R and C in your circuit and measure the transient response across C. Or, if you haven t grounded the circuit you can just move the scope probe leads to the capacitor. 2. Graph and fit the voltage across C as a function of time. Note that the voltage across the capacitor is not simply an exponential. So simply taking the ln of your data won t give you a linear graph to fit. Think about what simple manipulation of your data you must do in addition to taking the ln. The input function to your circuit is a step function that turns on when you close the switch. When we are looking at the response of an RC circuit, we talk about times either long or short compared to the time τ = RC.

46 38 CHAPTER 3. RC AND RL CIRCUITS: TIME DOMAIN RESPONSE Question 3.2 What does the integral of a step function look like? What part(s) of the observed output signal mimics the integral of the input signal? (Hint: think about τ). Measuring a fast transient. To see how well the scope works, try measuring the transient in a circuit with R = 470Ω and C = 27pf (or similar values). Question 3.3 What is the calculated time constant? Recall that the speed of light is 1 foot per nanosecond (excuse the units!) You aren t likely to be able to close a mechanical switch fast enough to make these measurements. Instead, you can replace the D.C. power supply and switch with the square-wave output of your DS335 Function Generator. This will serve to charge and discharge the capacitor repeatedly. You should use a high frequency square wave. Prove to yourself that the circuit will have many RC times to reach equilibrium before the square wave voltage reverses.

47 ƒ 3.4. PROCEDURE 39 Even the square wave can t make transitions on a time scale which is fast compared to RC. Look at the shape of your square wave on the scope and determine how long it takes the voltage to ramp up to a reasonably stable level. You only expect the simple RC behavior in the circuit once the input voltage has stabilized. When you analyze the data, you will want to ignore the first part of the transient, taken when the input voltage was changing. Knowing the ramp up time allows you to decide which part of the data to discard. Again, you should measure, plot, and fit the transient across the resistor and across the capacitor. Now the circuit is not floating because the DS335 output is grounded on one side. You ll have to arrange the circuit so you can measure the desired voltage while still having the ground connection of the scope connected to the same part of the circuit as the ground connection of the function generator. Data Collection: In this experiment, the primary data consists of a scope trace of showing the time dependence of the signal across a given component. The rather large amount of data from these traces can loaded into an Excel file and then manipulated. However, in doing this analysis, it is necessary to look at the data. There will be some part of the data that corresponds to t < 0, where the voltage across the components in zero. This is not useful for our analysis. There will also be part of the signal for large times where the voltage has fallen below the line noise. In this region, it will appear that the output voltage has become constant, and no longer follows an exponential decay. These data should also be discarded from your analysis. In the case of the resistor, the voltage should now follow equation 3.10, and it is easy to linearize this by taking the natural log of both side. For the case of the capacitor, we have equation Here, simply taking the natural log of both sides leads to a mess. We first need to isolate the exponential piece of this equation. ) v C (t) = V 0 (1 e t/τ RC (3.21) V 0 v C (t) V 0 = e t/τ RC (3.22) Thus, taking the natural log of the latter equation will yield an equation linear in time, and allow us to fit for the slope which is related to τ RL Time domain response of RL circuits V ƒ ÿ L ƒ ý ÿ ƒ R V R Figure 3.4: Setup for time response of RL circuits. The circuit shown in Fig. 3.4 and the one with R and L interchanged are to be investigated. Real inductors introduce a slight complication: they have an internal resistance, R L, that is generally nonnegligible and we have to write [ v(t) = L di ] dt + ir L + ir. (3.23)

48 40 CHAPTER 3. RC AND RL CIRCUITS: TIME DOMAIN RESPONSE The internal resistance is usually not shown in circuit diagrams, but must always be kept in mind. For example, you cannot directly measure the voltage across just the inductance; the apparent voltage is across the series combination of L and R L. In fact, R L is not just the DC resistance of the coiled wire either: The effective R L includes all dissipative effects which remove energy from the circuit. This includes inductive heating in any magnetic core material around which the coil is wound and, at high frequencies, radiative effects as well. 1. Measure the apparent resistance and inductance of your inductor with your Ohmmeter and the LRC meter. 2. Setup the circuit shown in Fig Use a series resistance (R in the diagram) that has a value comparable to R L. 3. Measure the functional form and time constant of the voltage across R in the same way you did for the RC circuit. Also, note the final voltage across R. Question 3.4 What are the final and initial voltages across L? 4. What is R L? There are (at least) two ways to determine this from the data: from the time constant and from the final voltage across R. Do these agree with each other? Do they agree with our ohm-meter measure- Question 3.5 ment of R L?

49 ƒ ƒ ƒ ƒ 3.5. ADDITIONAL PROBLEMS Additional Problems After completing this lab, you should be able to answer the following questions. 1. Let us consider the ideal RL circuit as shown in Figure 3.5. The inductor has inductance L and is assumed to be an ideal inductor meaning its internal resistance is zero. The resistor has resistance R and the circuit is connected through a switch to a DC source whose voltage is V 0. (a) At time t = 0, the switch is closed and current begins to flow through the circuit. Sketch the voltage between the points A and B as a function of time, v AB (t). (b) In terms of the instantaneous current i(t) in the circuit, what is the voltage drop across the resistor, v R (t) and the inductor, v L (t)? (c) Our expressions in part (b) lead to the first-order differential equation for the current Consider a solution of the form 0 = d dt i(t) + R L i(t) V 0 L. i(t) = i 0 ( 1 e αt ) where i 0 and α are constants. What must i 0 and α be in terms of R, L and V 0 for the solution to work? V 0 ƒ ÿ ÿ ò A R ñ L ƒ ÿ ò v L(t) B ÿ ƒ ó Figure 3.5: The circuit for problem RC circuits can be used as the timing mechanism in an electronic clock where the resistor and capacitor are chosen to yield an appropriate τ RC. In the circuit in Figure 3.6, we saw that the voltage across the resistor was given as v R (t) = V 0 e t/τ RC, ƒ ÿ ò C R ƒ ÿ ò v R(t) ƒ where t measures the time from when the switch is closed. (a) In terms of τ RC, how long does it V 0 Figure 3.6: The circuit for problem 2. take for the voltage across the resistor to fall from 2 3 of its maximum value to 1 3 of its maximum value? (b) We would like to design a clock that has a period of T = 0.05 s and we are told that the time in part (a) represents 1 2 of the period. If we are using a 1 kω resistor, which value should we choose for our capacitor? (c) What would you do if the only capacitors that are available are twice the value that you need?

50 42 CHAPTER 3. RC AND RL CIRCUITS: TIME DOMAIN RESPONSE

51 Chapter 4 RC, RL, and RLC circuits: Frequency Domain Response Reference Reading: Chapter 3, Sections 3.1, 3.2, 3.3, 3.4, 3.5, 3.6 and 3.7 Time: Two lab periods will be devoted to this lab. Goals: 1. Gain familiarity with the AC frequency response of simple RC, RL, and RLC circuits. In particular, with the amplitude and phase response both in terms of measuring and calculating these responses. 2. Understand the meaning of a characteristic frequency for these three types of circuits. 3. Understand the meaning of the terms low-pass filter and high-pass filter and be able to identify them in a circuit. 4. Understand the requirements for coupling circuit units together in a modular fashion. 4.1 Introduction We now re-examine the circuits of Lab 3 in a different way. Here, we apply sinusoidal waves rather than step inputs and measure the amplitude and phase (relative to the source) of the output signal. This lab is an excellent place to compare theory to your measurements and such comparisons are expected in your lab book. Your measurements should be compared to quantitative calculations of the expected behavior of the circuits and the results plotted on top of your data The Generic Filter The RC and RL circuits in this lab can be modelled as AC voltage dividers. In order to understand this, we consider the very general voltage divider network as shown in Figure 4.1. The components Z 1 and Z 2 can be any combination of elements, and we can model the behavior of this circuit as discussed in chapter 3 of our textbook. For a generic input voltage, v in, we have that the output voltage is given by our voltage-divider equation as v out = Z 2 Z 1 + Z 2 v in. 43

52 ƒ ƒ ƒ ƒ ÿ ò Z 1 A Z / 2 v out ƒ ÿ ò 44 CHAPTER 4. RC, RL, AND RLC CIRCUITS: FREQUENCY DOMAIN RESPONSE v in Figure 4.1: A generalized voltage divider constructed of two components with impedances Z 1 and Z 2. The output is looked at between the terminals A and B. B Since the impedances Z 1 and Z 2 may depend on the input frequency of our signal, it might be helpful to write that explicitly. Thus, the gain of our circuit is given as G(ω) = Z 2 (ω) Z 1 (ω) + Z 2 (ω). (4.1) We also recall that the output impedance, or Thèvenin impedance is given as Z out (ω) = Z 1 (ω) Z 2 (ω) Z 1 (ω) + Z 2 (ω), (4.2) and the input impedance of our unloaded circuit is just Z in (ω) = Z 1 (ω) + Z 2 (ω). (4.3) As noted in chapter 3 of our textbook, these three quantities characterize the behavior of our filter and allow us to view the circuit in terms of the equivalent circuit shown in Figure 4.2. ð ƒ ò Z out Z in G v ð ƒ ÿ ý ÿ ò ƒ / vout in v in Figure 4.2: The equivalent circuit for our filter in Figure 4.1 shown explicitly in terms of the three characteristic properties of a filter, the gain G, the input impedance Z in and the output impedance Z out. We now write the input, v in (t), and output, v out (t), explicitly as sinusoidal signals v in (t) = V in e j(ωt+φin) v out (t) = V out e j(ωt+φout). The quantities V in and V out are the amplitudes of the signals, while the angular frequency ω is given as 2π f. The two phases, φ in and φ out essentially set the value of the signals at time t = 0. The measured gain of our circuit is then G = V out V in,

53 ƒ ƒ ƒ ƒ 4.1. INTRODUCTION 45 and our measured phase difference is This allows us to write the measured gain as RC Filters φ = φ out φ in G = G e j φ. We can now apply what we saw in Section to the specific case of RC filters. For us, we will consider the two simple filters shown in Figure 4.3. To analyze these, we simply identify Z 1 with the resistor or the capacitor and Z 2 with the opposite component. We also recall that as we did in our textbook, the characteristic frequency of these circuits is given as ω RC = 1 RC. (4.4) In our textbook, we saw that the left-hand circuit is known as a low-pass filter, while the right-hand circuit is known as the high-pass filter. We n Applying equation 4.1 to these, we find that the gain for v in ƒ ÿ ò R A C / ƒ ÿ ò v out v in / B ƒ ÿ ò A C R v out ƒ ÿ ò Figure 4.3: The two RC configurations we will consider in this lab. The left-hand circuit is the low-pass filter while the right-hand circuit is the high-pass filter. We will see that the low-pass filter is also known as an integrating circuit, while the high-pass is known as a differentiating circuit. the low-pass and the high-pass filters are given as G lp = G hp = j ω ω RC (4.5) 1 1 j ω RC ω, (4.6) where we showed that for frequencies small compared to ω RC, the gain of the low-pass filter is G lp (ω ω RC ) = 1 (4.7) and for frequencies large compared to ω RC that the gain of the high-pass filter is G hp (ω ω RC ) = 1. (4.8) As discussed in our text, we note that in the region where the frequency is much larger than the characteristic frequency, the gain of the low-pass filter become G lp (ω ω RC ) = j ω RC ω, (4.9) B

54 ƒ ƒ ƒ ƒ 46 CHAPTER 4. RC, RL, AND RLC CIRCUITS: FREQUENCY DOMAIN RESPONSE which we showed yields a circuit that integrates the input voltage. Similarly, for the case of frequencies small compared to the characteristic frequency, we have gain of the high-pass filter as G hp (ω ω RC ) = j This yields a circuit that differentiates the input voltage. ω ω RC. (4.10) RL Filters SImilar to the RC filters from the previous section, we can also build high-pass and low-pass filters using resistors and inductors. These circuits are shown in Figure 4.4 where the left-hand circuit is a low-pass filter and the right-hand-circuit is a high-pass filter. Before continuing, we need to point out that for most physical inductors, there is an internal resistance, R L, that may well be of similar size as the explicit R in out circuit. Thus, in analyzing there circuits, we need to be sure to consider that Z L = R L + jωl. Accounting for the R L of the inductor, we define a characteristic frequency for our RL circuit as ω RL = R + R L L. (4.11) Using this, we can express the gain of these filters in terms of R, R L and ω LR. configuration in Figure 4.4, it is easy to show that the gain is ( ) R G lp = R + R L ƒ ÿ ò L A R / ƒ ÿ ò Unfortunately, there is no compact form for the high-pass filter. v in v out v in / B For the low-pass j ω ω RL. (4.12) ƒ R ÿ ò A L v out ƒ ÿ ò Figure 4.4: The two RL configurations we will consider in this lab. The left-hand circuit is the low-pass filter while the right-hand circuit is the high-pass filter. B RLC Filters The voltage divider result can also be applied to RLC circuits, with Z 1 being replaced by Z R and Z L combined in the appropriate way. Such a circuit is shown in Figure 4.5. The resulting behavior is more complex than RC and RL circuits, as the RLC circuit exhibits resonant behavior at a characteristic frequency, ω LC = 1 LC. (4.13)

55 ƒ 4.1. INTRODUCTION 47 These circuits are discussed in detail in the textbook (Section 3.6). Here we only reproduce that the gain as measured across the capacitor is given as where ω RC = 1/RC as defined above. G C (ω) = v in 1 ( ) 2 (4.14) 1 ω ω LC + j ω ω RC R ƒ L / ƒ ƒ ÿ A C ƒ ò v out ƒ ÿ Figure 4.5: The RLC circuit configured to measure the voltage across the capacitor. B Band-pass Filters As discussed in Sections 3.7 and 3.8 of the textbook, there are many occasions when we need to couple one functional block of circuitry to another. In fact, it s hard to think of a situation where this is not necessary! In the case of a high-pass filter connected to a low-pass filter, we create a band-pass filter. Such a circuit will attenuate signal both above and below some characteristic frequency. The new feature is that we need to worry about the input impedance of the second filter relative to the output impedance of the first filter. We show the equivalent circuit for this in Figure 4.6. In order for the overall gain of the combined circuit to be the product of the two individual gains, we must have that See your textbook for a more detailed discussion of this circuit. (Z in ) 2 (Z out ) 1. (4.15) ð ƒ ƒ (Z out ) 1 ƒ ƒ ò (Z in ) 1 G ð ƒ ÿ ý ÿ ò ƒ / vout 1 v in (Z in ) 2 G 2 G 1 v in ƒ ÿ ƒ / (Z out ) 2 v in Figure 4.6: The equivalent circuit for the output of one filter used as input to a second filter.

56 48 CHAPTER 4. RC, RL, AND RLC CIRCUITS: FREQUENCY DOMAIN RESPONSE 4.2 Preliminary Lab Questions The work in this section must be completed and signed off by an instructor before you start working on the lab. Do this work in your lab book. 1. You are given the following power series expansions: cos(x) = 1 x2 2! + x4 4! sin(x) = x x3 3! + x5 5! e x = 1 + x + x2 2! + x3 3! + Show that e jx = cos(x) + j sin(x) where j = Consider a voltage source, V (t) = V o cos(ωt), where the frequency, f varies from 10 Hz up to 100 Hz. Plot the impedance, Z as a function of frequency for each of the following components: a 100 Ω Resistor, a 1.0 µf capacitor, and a 1 mh inductor.

57 4.3. EQUIPMENT AND PARTS A voltage source of V (t) = (5.0V ) cos(ωt) is separately applied to each of the three components above. The frequency f is 100 Hz. Sketch the voltage as a function of time over one cycle of the wave. Sketch the current as a function of time in each component over one cycle of the wave. 4.3 Equipment and Parts In this lab we will utilize the following equipment. This equipment is located at your lab station. 1. The Tektronix TDS 2012B digital oscilloscope. 2. Two P2220 probes for the oscilloscope. 3. One USB memory stick. 4. The Stanford Research Systems DS335 signal generator. 5. One BNC to alligator cable. 6. The Metex 4650 digital meter. 7. The Global Specialities PB10 proto-board (see Appendix A for a description). Note that this board should be part of the PRO-S-LAB kit that include a power brick and power bus as well. These latter two parts are not needed until lab 7. You will also need the following components in order to carry out this lab. It makes more sense to get them as you need them, rather than all at once before the start of the lab.

58 ƒ ƒ ƒ ƒ 50 CHAPTER 4. RC, RL, AND RLC CIRCUITS: FREQUENCY DOMAIN RESPONSE kω resistor kω resistor µf capacitor mh inductor. 5. Additional resistors and capacitors you choose to match your circuit design. 4.4 Procedure Reminder: At the beginning of each section below, enter into your lab notebook a summary of what you are setting out to do and what the relevant equations are expected to be. Derivations and great lengths of verbiage are not necessary, but some orienting explanation is. This should be standard practice in any lab notebook! Gotcha! 1. Is the DS335 set to be High-Z? 2. Is the voltage offset of the DS335 set to 0 V? 3. Do you want to use AC or DC coupling on your oscilloscope? If you are interested in seeing a DC offset, then you need to DC couple. If you want to only see the time-varying part of the signal, then you want to AC couple. 4. Recall from lab 2 that at very-low and very-high frequencies, AC coupling may attenuate your signals. 5. Are all of your grounds connected to the same point? Are you grounding out your circuit in the wrong place? Frequency response of the RC voltage divider. 1. Set up the RC circuit using C = 0.008µF and R = 22kΩ and a sine wave of reasonable amplitude (say, 5 Volts). Calculate the expected characteristic frequency in radians per second and in cycles per second (Hz). v in ƒ ÿ ò R A C / ƒ ÿ ò v out v in / B ƒ ÿ ò A C R v out ƒ ÿ ò Figure 4.7: The low-pass (left) and high-pass (right) configuration of the RC circuit to be studied in this lab. B

59 4.4. PROCEDURE For both the high-pass (differentiator) and low-pass (integrator) configuration, make careful measurements of v out and v in over a frequency range that extends at least two decades below and above the calculated characteristic frequency. Recall that your lab equipment read frequency, f in Hertz, while theoretically we work in angular frequency, ω, where ω = 2π f. Be careful about factors of 2π. As you take the data, plot the gain, G(f) = v out / v in, on a Bode plot and the phase shift between v out and v in on semi-log scales. (Recall that a Bode plots is 20 db log(g) versus log(f).) Set up the scope to display both signals. The scope can be set to measure the amplitudes of each. You can use the cursors to measure phase shift: You calibrate the distance corresponding to 360, then set one cursor on the zero crossing point of the input signal, the other on the corresponding zero crossing of the output; the ratio gives you the phase shift as a fraction of In one configuration, v out is the voltage across R; in the other, v out is the voltage across C. You must determine the necessary wiring for each case. 4. Choose your frequency steps so that your measurements will be roughly equally-spaced on a logarithmic frequency axis. 5. Should you be using the scope s AC- or DC-coupling input mode for this measurement? 6. Determine the slope of the Bode plot (db per decade) in the high- or low-frequency limit (wherever G(f) is varying). Make a plot of your data together with a theoretical function going through (or near?) the data. 7. Determine the frequency at which v C (f) = v R (f). Compare your measured value to the calculated value. 8. Over what range of frequencies do you expect the circuit to integrate or differentiate the input signal? To figure this out, you can use the analysis in the Lab 3 write-up or use the frequency domain logic in Section 3.4 of the textbook. Use the different waveforms available from the signal generator to see that the proper mathematical operation is performed. Choose an appropriate period for the waves so the integrator or differentiator should work well.

60 ƒ ƒ ƒ ƒ 52 CHAPTER 4. RC, RL, AND RLC CIRCUITS: FREQUENCY DOMAIN RESPONSE Data Collection: We recall from lab 2 what we need to measure to be able to make a Bode and Phase plot for our filters. This is shown in Table 4.1. We note that the units listed in the table may not be the best choice milliseconds might be better than seconds. We also recall from lab 2 that the phase difference is obtained by using the scope cursors to measure the time difference between the peak of the v in signal and that of the v out signal, t. Using t and the frequency of the signal, we obtain the phase difference as φ = (2π) f t. Finally, remember that it is important to measure both v in and v out using or oscilloscope and we need to choose a consistent form for v. It can be RMS, amplitude, or peak-to-peak. However, whatever we choose needs to be consistent throughout our measurements. Finally, in using our scope, it is best to put the larger signal on channel one. In this case, put v in on channel one and v out on channel two. Measured Quantities Computed Quantities Frequency Input Output Time Gain Attenuation Phase Voltage Voltage Shift Shift f (Hz) v in (V) v out (V) t (s) v out /v in 20 db log G φ (rad) Table 4.1: The data needed to make a Bode plot of a circuit Frequency response of the RL voltage divider. 1. Repeat the above procedure with the low-pass configuration of an RL circuit as shown in Figure 4.8. Use a 2.2 kω resistor for R and measure the inductance,l, and resistance, R L, of your inductor. v in ƒ ÿ ò L A R / ƒ ÿ ò v out v in / B ƒ R ÿ ò A L v out ƒ ÿ ò Figure 4.8: The low-pass configuration (left) and the high-pass configuration (right) of the RL circuit to be studied in this lab. We only need to measure the low-pass configuration but you may optionally measure both. B

61 4.4. PROCEDURE 53 Question 4.3 be? In the low-frequency limit, what do we expect the gain of the RL low-pass filter to Question 4.4 to be? In the high-frequency limit, what do we expect the gain of the RL high-pass filter Question 4.5 Which circuit, RL or RC, works better as a low-pass filter? Why? RLC Resonant Circuit. 1. Study the discussion of RLC circuits given in section 3.5 of the textbook and calculate a predicted resonant frequency, ω LC. You don t need to include any explicit resistance in this circuit, but in your analysis, do include the source resistance, r s, and that internal to the inductor, R L. 2. Construct a series RLC circuit as shown in Figure 4.9. Use your 0.008µF capacitor and the inductor from the previous part of the lab. 3. Measure the frequency response over the appropriate frequency range. Again, choose frequency steps that will be equally spaced on a logarithmic frequency axis. Choose more points near ω LC to accurately map the behavior.

62 ƒ R ƒ L / ƒ ƒ ÿ A C ƒ ò ƒ ÿ 54 CHAPTER 4. RC, RL, AND RLC CIRCUITS: FREQUENCY DOMAIN RESPONSE v in Figure 4.9: The RLC circuit configured to measure the voltage across the capacitor. v out B 4. Make a Bode plot and a phase-shift plot as in the above procedures. 5. Compare your results to the expected behavior of your circuit. Use your measurements of the amplitude and phase as functions of frequency to determine the value of the internal resistance of the inductor, R L. Comment on the result and compare with what you expect, drawing on the appropriate mathematical relations in your textbook Coupling Circuits Together: The Bandpass RC Filter. As discussed in Sections 3.7 and 3.8 of the textbook, there are many occasions when we need to couple one functional block of circuitry to another in fact, it s hard to think of a situation where this is not necessary! Here, you will design a band-pass filter circuit by taking the output of a high pass RC filter and putting it into a low pass RC filter with the same characteristic frequency. 1. Repeat the design logic in Section 3.8 of the textbook but use a factor of 20 in place of the 100 used in the text. This leads to more comfortable element values. You should find that you can build the low pass stage of the circuit using the same components you used to build the RC circuit earlier. 2. Build a bandpass filter based on your design. 3. Using 5 Volts from the signal generator, measure the frequency response, both the amplitude and the phase, and compare to the expected response. What this exercise does not show you, at least if you do the design correctly, is how things go wrong when you do not have the correct progression of input and output impedances. If you have time, you might want to try using R 1 = R 2 and C 1 = C 2 and see what happens to the response.

63 ƒ 4.5. ADDITIONAL PROBLEMS Additional Problems After completing this lab, you should be able to answer the following questions. 1. You measure the data shown in Figure 4.10 and plot it on a Bode plot as shown. (a) At approximately what frequency is the 3 db point? (b) What is the slope of the fall-off in db/decades? (c) In the fall-off region, how does the gain, G depend on the frequency f? 0 20db log( G(ω ) f Figure 4.10: The Bode plot for problem You build the filter circuit shown in Figure 4.11 in lab where you have chosen the resistor to have a value of 4.70 kω and the capacitor to be 339 pf. (a) For such a circuit, we talk about highfrequency and low frequency behavior. For this circuit, is f = 20 k Hz considered high-frequency or low-frequency? (b) What is the output impedance of our filter at its characteristic frequency? Give both the complex Z out and Z out. (c) Is this a high-pass or a low-pass filter? Justify your answer with some physics and mathematical arguments. v in ƒ ÿ C ƒ ò A R / ƒ ÿ ò v out Figure 4.11: The circuit for problem 2. B 3. You are given a black-box circuit with two inputs and two outputs. In the lab, you make the following measurements using your signal generator and your oscilloscope. (a) For an input voltage given as v in (t) = (3.00 V ) cos ( 628 s 1 t )

64 56 CHAPTER 4. RC, RL, AND RLC CIRCUITS: FREQUENCY DOMAIN RESPONSE you measure the output voltage to be v out (t) = (2.00 V ) cos ( 628 s 1 t ). At what frequency, f, did you perform this measurement? What is the (complex) gain at this frequency (express as magnitude and phase)? (b) For an input voltage given as v in (t) = (3.00 V ) cos ( s 1 t ) you measure the output voltage to be v out (t) = ( V ) sin ( s 1 t ). What is the (complex) gain at this frequency (express as magnitude and phase)? (c) Estimate the slope of the Bode plot from your measurements. (d) You now connect a 4.7 kω resistor across the output of your black box. For the same input voltage as in part (a), v in (t) = (3.00 V ) cos ( 628 s 1 t ), you measure the voltage across the resistor to be v out (t) = (1.00 V ) cos ( 628 s 1 t ). What is the magnitude of the output impedance of the black box at this frequency?

65 Chapter 5 AC to DC Conversion and Power Supplies Reference Reading: Chapter 4, Sections 4.5 and 4.6. Time: Two lab periods will be devoted to this lab. Goals: 1. Understand the use of diodes to convert AC signals with no DC component into oscillatory signals with appreciable DC components. 2. Understand the use of filter circuits to obtain relatively clean DC voltages. 3. Become familiar with the regulation of various constant voltage supply circuits and the advantages of each. 5.1 Introduction Almost any signal processing circuitry requires the establishing constant bias voltages. Starting with the 60Hz voltage supply from the power company, how do instruments obtain these various DC supply voltages? We will investigate a sequence of circuits for doing this. They all rely on non-linear elements that respond differently to different parts of the AC voltage signal Average and RMS voltages First, we need to establish some notation (briefly addressed in Lab 2). AC sinusoidal signals are frequently referred to in terms of their RMS voltages. RMS stands for root-mean-square or, more explicitly, the square-root of the average (or mean) of the squared voltage. Note that if v(t) = V 0 cos ωt, then if we take the average over an integer number of periods, we will get zero. For the case of a single period, we have that the average voltage is < v > = 1 T T 0 dt v(t), (5.1) 57

66 58 CHAPTER 5. AC TO DC CONVERSION AND POWER SUPPLIES which is < v > = 1 T T 0 ( ) 2πt V 0 cos dt, T where we recall that ω = 2π/T. This yields that which is zero. The RMS voltage is We recall that we can write that < v > = 1 ( ) T 2πt T T 2π V 0 sin T V rms = [ 1 T T 0 cos 2 x = 1 (1 + cos 2x), 2 0 dt V 2 0 cos 2 ωt] 1/2. (5.2) which means that we have or V rms = V rms = [ V0 2 T 2T 0 [ V 2 0 2T (1 + cos 2ωt) dt] 1/2, ( t + 1 ) T sin 2ωt 2ω 0 ] 1/2. The sin term goes to zero, and we are left with This can also be expressed in terms of the peak-to-peak voltage as V rms = 1 2 V 0. (5.3) V rms = V pp. (5.4) Thus, the 110 Volt power outlet (where the 110 Volts refers to the RMS value) corresponds to or v outlet (t) = 2(110V ) cos ωt, v outlet (t) = (155 V ) cos ωt. or the wall voltage has 310 Volts peak-to-peak. One justification for using RMS voltages is that the average power delivered to a resistive load is related to the RMS. We can see this by noting that the average power over one cycle is < P > = 1 T T 0 dt v2 (t) R, (5.5)

67 5.1. INTRODUCTION 59 which can be written as < P > = 1 R [ 1 T T 0 dt v 2 (t) ]. The integral is just the square of the RMS voltage, so we have that the average power per cycle is given as < P > = V 2 rms R. (5.6) As far as power dissipation is concerned, V rms acts the same as the corresponding DC voltage. While the oscilloscope displays the details of instantaneous waveforms, typical digital volt meters (DVM) such as the Metex meters read RMS voltages when set on AC Volts scales. The latter meters are only reliable for sinusoidal signals with frequencies in the vicinity of 60 Hz Transformer operation In this lab, you will use a transformer to generate a roughly 14 Volt (RMS) AC signal from which you will obtain various approximations to a constant DC voltage. While the transformer steps down the 110 Volt line voltage, the output can supply large currents! Be sure to wire and check your circuit before plugging the transformer in and be sure that all three output wires from the transformer are plugged into terminal posts on your proto-boards. The secondary side of the transformer is center tapped ; we will use one side and the center tap the other wire should just be plugged into a terminal post which is not wired to anything: ð ÿ ð ò ò center 14 V tap 14 V ƒ ƒ ò v i = 110 V Use this as output Figure 5.1: A transformer showing two inputs and a center tap on the output. In this lab, we use the center tap and one of the outer taps. One advantage of using a transformer (beyond the obvious reduction in voltage and, thus, danger) is that while the primary voltage oscillates relative to ground potential, the secondary can float to any necessary level (within the limits of insulation used inside the transformer). This is a useful feature for the measurements you will make on the diode bridge circuits used below. Note that when you measure a voltage signal using the oscilloscope, you are grounding a point in the circuit. You need to think before doing this: you may alter the functioning of the circuit significantly and you could also cause large currents to flow through circuit elements thus generating a characteristic odor and smoke! You can measure across floating elements more or less with impunity. The Metex meters, on the other hand, are not grounded so they can be connected anywhere in a circuit regardless whether it is floating or not Diode operation We will also use 1N4004 diodes in this lab to rectify our AC voltage. We recall from lab 1 that the I-V curve of a diode can be approximated as shown in Figure 5.2. There is a characteristic voltage, V d, know

68 60 CHAPTER 5. AC TO DC CONVERSION AND POWER SUPPLIES as the diode drop. If the voltage across the diode is smaller than V d, then know current will flow through the diode. If we forward the bias the diode, such that there is V d across it, then what ever current is necessary will flow to keep the voltage at V d. In this way, the diode acts as a one-way current valve. Current will flow when the diode is forward biased with a voltage of V d, and will not flow otherwise. I Vd V Figure 5.2: The I V curve for a diode is shown as the exponentially-rising curve in the plot. We approximate it as a vertical line at the the diode drop, V d. For voltages below V d, no current flows. Once the voltage across the diode tries to go above V d, whatever current is necessary to keep the drop at V d will flow through the diode. We can be more specific if we consider the simple circuit shown in Figure 5.3. Here we have a variable DC voltage supply connected to a resistor and a diode in series. If V A < V B, then the diode is said to be reverse biased and from our I-V curve in Figure 5.2, we see that no current will flow through the circuit. This means that V R = 0 and V D = V. ÿƒ ò ð ƒ ƒ ÿ R V ƒƒ ÿ ò V R A ð ƒ ÿ ƒ ƒ ÿ ò V D B Figure 5.3: A simple diode circuit with a variable input voltage. If V A > V B, but V < V d, then our I-V curve also indicates that no current will flow through the diode. Again, this gives us that V R = 0 and V D = V. Finally, in the case where V A > V B and V > V d, then our I-V curve indicates that current will flow through the circuit. In this case, we will have that the voltage across the diode will just be the diode drop, and the voltage across the resistor will be V D = V d V R = V V d. This means that the current through the circuit will be given by the voltage drop across the resistor as I = V R R

69 5.1. INTRODUCTION 61 or we have that I = V V d R. This latter case is known as forward biasing the diode. In this way, the diode functions as a current valve that only allows current to flow in one direction. When the diode id forward biased, current will flow, and in all other cases, it will not. When current flows, the voltage across the diode will just be a diode drop, V d, while in all other cases, the diode will have all of the voltage in the circuit across it.

70 62 CHAPTER 5. AC TO DC CONVERSION AND POWER SUPPLIES 5.2 Preliminary Lab Questions The work in this section must be completed and signed off by an instructor before you start working on the lab. Do this work in your lab book. 1. An ideal diode has a diode drop of V d = 0 V. If the voltage is above zero, current flows through the diode. If it is below zero, no current flows. Consider the situation where you use an ideal diode in the circuit shown in Figure 5.3 and then drive the circuit with an AC sinusoidal voltage. What is the shape of the output voltage across the resistor, v R, and the diode, v D as a function of time? Sketch these voltages as a function of time over one full cycle of the sine wave. 2. There is typically a non-zero voltage drop across a practical diode where the diode drop is typically V d 0.65 V. What will this do to the answer that you got in part 1? Sketch the resulting voltages for V d = 0.65 V assuming that the amplitude of the input voltage is larger than V d. 3. In section 5.4.5, you will use an electrolytic capacitor. These capacitors have a positive and negative side. Which side of the capacitor corresponds to the large flat line in the figure?

71 5.3. EQUIPMENT AND PARTS Equipment and Parts In this lab we will utilize the following equipment. This equipment is located at your lab station. 1. The Tektronix TDS 2012B digital oscilloscope. 2. Two P2220 probes for the oscilloscope. 3. One USB memory stick. 4. The Stanford Research Systems DS335 signal generator. 5. One BNC to alligator cable. 6. The Metex 4650 digital meter. 7. The Global Specialities PB10 proto-board (see Appendix A for a description). Note that this board should be part of the PRO-S-LAB kit that include a power brick and power bus as well. These latter two parts are not needed until lab 7. You will also need the following components in order to carry out this lab. It makes more sense to get them as you need them, rather than all at once before the start of the lab. 1. Four 1N4004 diodes. 2. One transformer. 3. One LM7805 Voltage regulator chip. 4. One 1 kω resistor. 5. One 10 kω resistor. 6. One 0.22 µf capacitor. 7. One 25 µf electrolytic capacitor. 8. Additional resistors and capacitors you choose to match your circuit designs. 5.4 Procedure Gotcha! 1. Do you want to use AC or DC coupling on your oscilloscope? If you are interested in seeing a DC offset, then you need to DC couple. If you want to only see the time-varying part of the signal, then you want to AC couple. 2. Recall from lab 2 that at very-low and very-high frequencies, AC coupling may attenuate your signals. 3. Are all of your grounds connected to the same point? Are you grounding out your circuit in the wrong place?

72 ƒ ƒ 64 CHAPTER 5. AC TO DC CONVERSION AND POWER SUPPLIES Transformer 1. Using your oscilloscope, observe the output waveform of the transformer. Note the frequency and amplitude. 2. Measure this same signal using your Metex meter. Is the Metex reading consistent with the observed waveform? Document what you observe in your lab notebook The Half-wave Rectifier ð ð v i ƒ ƒ ÿ ƒ ò R L ƒ ÿ ò v o Figure 5.4: A half-wave rectifier using a 1N4004 diode. The input voltage, v i, is the AC from the wall outlet. A simple series connected diode which blocks half the AC waveform leaves you with a finite DC or average voltage level. 1. Build the circuit in Figure 5.4 with your 1n4004 diode and R L = 1 kω. 2. Use your oscilloscope to observe the output waveform of the circuit shown in Figure 5.4 by measuring the voltage across the resistor. Question 5.1 Can you compute the average, or DC, voltage? Is what you see consistent with part (1) and with the diode curves you measured in Lab 1?

73 ƒ ƒ 5.4. PROCEDURE 65 Question 5.2 Use a load resistor of R L = 1kΩ to make your measurement. Draw a sketch of what you observe in your lab notebook (or capture a sweep and make a plot of the data) The Full-wave Rectifier ƒ ÿ ð ð v i ƒ ƒ ƒ ƒ ƒ ÿ ƒ ƒ ÿ ò ƒ ÿ ƒ ÿ ƒ R L ÿ ƒ ò vo Figure 5.5: A full-wave rectifier using four 1N4004 diodes. The input voltage, v i is the AC from the wall outlet. The diode bridge circuit shown in Figure 5.5 directs current always in the same direction through the load, R L. Question 5.3 Verify this statement by tracing the current path available when the top transformer terminal is positive (and negative) with respect to the bottom terminal. 1. Construct the circuit in Figure 5.5 using four 1n4004 diodes and a 1 kω resistor for R L. 2. You can observe the waveform by measuring the voltage across the load resistor, R L.

74 ƒ ƒ ƒ ƒ 66 CHAPTER 5. AC TO DC CONVERSION AND POWER SUPPLIES Question 5.4 What, roughly, is the DC, or average, voltage? 3. Confirm your expectation by switching the oscilloscope input to the AC coupled setting. How does this signal change when you use a 1kΩ vs a 10kΩ load resistor? 4. Draw a sketch of what you observe in your lab notebook (or capture) The Full-wave Rectifier With Filtering To smooth the output and better approximate a constant voltage, we can place a filtering or buffering capacitor across the output as shown in Figure Try using a filtering capacitor of C f = 0.22µF. 2. Next try a25µf electrolytic capacitor as your buffering capacitor. Be sure to observe the polarity here! ƒ ÿ ð ð v i ƒ ƒ ƒ ƒ ƒ ÿ ƒ ƒ ÿ ÿ ƒ ÿ ò ƒ ÿ ƒ C f R L ÿ ÿ ƒ ò vo 3. In each case, measure the ripple voltage (peak-to-peak fluctuation). Figure 5.6: A full-wave rectifier using four 1N4004 diodes, and an electrolytic filtering capacitor. The input voltage, v i is the AC from the wall outlet. Question 5.5 What is the relevant quantity which determines how constant the voltage is?

75 5.4. PROCEDURE 67 Question 5.6 Which resistance sets the characteristic time of this low-pass filter? Question 5.7 Do you want a small or a large capacitor? Why? Top View Output Gnd Input Input Side View Figure 5.7: The LM7805 voltage regulator pin out. In the (lower) side view, the pin closest to you is the Input The Integrated-circuit Regulator The simplest way to make a good DC supply for real circuits is to build a rudimentary DC supply such as the one in Section and then use an integrated circuit (IC) voltage regulator to stabilize it. Such a regulator is the LM7805 whose pin-out is shown in Figure Construct the circuit shown in Figure 5.8 using an LM7805 which is a 5 Volt supply regulator which is sketched in Figure 5.7. The diagram above looks at the 7805 from the labelled side, and the three pins are as labeled. We use this IC as a black box and just empirically note the quality of performance (the LM7805 costs $1.18). 2. How does the DC voltage vary with load? You probably own several power supplies of this sort in various pieces of electronics.

76 ƒ ƒ ƒ ƒ ÿƒ ð ð v i ƒ ƒ LM7805 ƒ ƒ ƒ ÿ ƒ ƒ ÿ ÿ ƒ ƒ ÿ ƒ ÿ in ƒ C f R ƒ L ÿ ÿ ƒ ƒ ÿ ƒ out ò v gnd o ò 68 CHAPTER 5. AC TO DC CONVERSION AND POWER SUPPLIES Figure 5.8: A full-wave rectifier with four 1N4004 diodes, an electrolytic filtering capacitor, and an LM7805 regulator chip. The input voltage, v i is the AC from the wall outlet. Question 5.8 How does the DC voltage vary with load i.e., characterize the voltage regulation?

77 ƒ ƒ 5.5. ADDITIONAL PROBLEMS Additional Problems After completing this lab, you should be able to answer the following questions. 1. (a) Consider the AC voltage given as v(t) = v 0 ( sin ωt), where v 0 and ω are positive constants of appropriate units. What is the average voltage as taken over three periods of input voltage? (b) The input voltage given above is fed into the diode-resistor circuit as shown in Figure 5.9. Assuming that the diode drop is V d = 0 V, make an accurate sketch of the input voltage and the voltage as measured across the resistor for three periods. v(t) ƒ ÿ ƒ ò R / ƒ ÿ ò Figure 5.9: The circuit for problem Consider the half-wave rectifier circuit shown in the left-hand circuit in Figure An AC input voltage is supplied to the input of the circuit such that v in (t) = v 0 cos ωt. (a) Assuming that the diode-drop voltage, V d, is small in comparison to v 0, sketch the input voltage and the voltage across the capacitor as a function of time over one period of the input voltage. (b) The capacitor will eventually charge up. When this finally happens, what will V A V B be? (c) We now modify the circuit by adding a second diode-capacitor stage as shown in the righthand circuit. In this case, both capacitors will eventually charge up. After this happens, what is V A V B? v in (t) A B ƒ ÿ ƒ ó ÿ ƒ ó C ƒ / ƒ ƒ v in (t) ƒ ÿ C ƒ ÿ ƒ ò A C / ƒ ÿ ƒ ÿ ò Figure 5.10: The circuit for problem 2. B

78 70 CHAPTER 5. AC TO DC CONVERSION AND POWER SUPPLIES

79 Chapter 6 Voltage Multipliers Reference Reading: Chapter 4, Sections 4.6 Time: One and a half lab periods will be devoted to this lab. Goals: 1. Understand how buffering capacitors can be combined with diodes to clamp a voltage to a DC level. 2. Understand how a half-wave rectifier combined with a buffering capacitor can be used to obtain a DC voltage from an AC input. 3. Understand how these elements can be combined to build a multi-stage voltage multiplier. 4. Study the limitations of voltage multipliers. 5. Understand when to use DC-coupling and when to use AC-coupling on the oscilloscope. 6.1 Introduction In this lab we will work with simple diode-based circuits to understand how to take an AC input voltage and produce a DC output whose voltage is larger than the amplitude of the input voltage. We will ultimately use this to build a Cockcroft-Walton voltage multipler, and then we will examine the output characteristics of this multiplier The Voltage Clamper The voltage clamper is a circuit that will add a constant DC offset to an AC signal. A simple example of this circuit is shown in the left-hand side of Figure 6.1 where the DC offset is created by charging up a buffering capacitor, C. Once charged, this capacitor will act as a DC voltage source. To understand how this circuit works, we start by assuming that the voltage drop, V d across the diode is zero We now take an input AC voltage v in (t) given as V d = 0 v in (t) = v 0 cos (ωt), (6.1) 71

80 ƒ ƒ ƒ ƒ ƒ 72 CHAPTER 6. VOLTAGE MULTIPLIERS v in (t) ƒ C / ƒ ƒ ÿ ò ƒ ÿ ò v out(t) v in (t) ƒ v 0 / ÿ ò ƒ ÿ ò v out(t) Figure 6.1: The left-hand circuit shows a voltage-clamper. After the capacitor charges up to the amplitude of the input voltage, v 0, current is no longer able to flow in either direction across the diode. The right-hand circuit shows what effectively happens after the capacitor is charge. The diode behaves as if it is not there and the capacitor looks like a DC voltage supply. which we can write in terms of the period T as ( ) 2πt v in (t) = v 0 cos. T With V d = 0, the capacitor will see a maximum potential across it of v 0, the amplitude of our input. As long as the period of the signal is short in comparison to the time it takes to discharge the capacitor, this will cause the capacitor to charge up so there is a voltage v 0 across it. The orientation of the diode will insure that the lower side of the capacitor is at a higher potential than the upper. Hence, the orientation of the electrolytic capacitor and the effective DC supply in Figure 6.1. This leads to an output voltage of the form ( ) 2πt v out (t) = v 0 + v 0 cos, (6.2) T where we have an AC signal of amplitude v 0 superimposed on a DC level V o of V o = v 0. We can see this by assuming that the lower side of the voltage source is at a higher potential than the upper side. Then the diode will be forward biased and current will flow up through the diode and capacitor. The lower side of the capacitor will be at a higher potential than the upper side. If the upper side of the voltage source now has the higher potential, then the diode will be reverse biased and no current will flow. Thus, to the extent that the time it takes to charge and discharge the capacitor is long compared to the period T, the capacitor will charge up, and in doing so the output voltage will be clamped to voltage of the capacitor. Such a rising voltage is shown in Figure 6.2 where we see the capacitor start to charge up at time t = 0, and then charge up over several periods of the input voltage. The rate at which the capacitor charges up is controlled by an RC time constant, τ RC. In the circuit in Figure 6.1, there is no obvious resistor in the circuit. However, we note that the AC supply driving the clamp has some output impedance, Z out. The magnitude of this Z out will serve as the resistance R in our circuit. If the circuit is driven by an input voltage of amplitude v 0 and the DC voltage sags to v s over one period of the input signal, then we can write that v s v 0 = e T/τ RC,

81 6.1. INTRODUCTION 73 Voltage ( v 0 ) V d Time ( T ) Figure 6.2: The output of a voltage clamper. At time t = 0 the capacitor begins to charge up, eventually pulling the DC level on the output up to v 0 V d. where we recall that the characteristic time is given as τ RC = RC. Thus, we can write that τ RC = T / ln ( vs v 0 ). (6.3) For the voltage to drop to no less than 95% of the input voltage, we must have that τ rc 20 T and for no less than 99% of the input voltage, τ rc 100 T. We now need to consider a real diode in which V d is not zero. If v 0 is large in comparison to the actual diode drop, V d, then this may be a reasonable approximation. However, this is not genrally true. We can start with our idealistic model and treat V d as a constant (typically 0.65 V ). Under this assumption, we would just expect that the DC level would go to V o = v 0 V d (6.4) and everything else that we did above is still correct. While this is a good first approximation, it is not completely correct. To be more precise, we saw that we could describe the I V curve of a pn-junction (or a diode) by the Shockley equation, ) I(V d ) = I S (e V d/(mv T ) 1. (6.5) In this expression, the thermal voltage V T is just V T = k BT e,

82 ƒ ƒ ƒ ƒ 74 CHAPTER 6. VOLTAGE MULTIPLIERS Current Operating point Vd Voltage Figure 6.3: The I-V curve of a diode following equation 6.5. and is approximately 25 mv at room temperature. The saturation current, I S is just a constant value and m is a constant typically between 1 and 2. We can solve equation 6.5 to give that ( ) Id V d m V T ln (6.6) In Figure 6.3 we show the expected I-V curve of a diode. There we see that the nominal voltage drop, V d is chosen to be an average for typical operating currents in the diode. As the capacitor charges up, the amount of current that can flow decreases. This in turn causes a logarithmic drop in the value of the diode voltage, V d, as we move down the curve in Figure 6.3. The actual V d will then be something smaller than our nominal value, and the capacitor will actually be able to charge up beyond our nominal expectations. This is indicated as the Operating point in Figure The Voltage Doubler The voltage doubler circuit adds a half-wave rectifier to the output of our voltage clamp from Section This rectifier then uses a second capacitor to buffer the output such that it will charge up to twice the input voltage, 2v 0. In the left-hand circuit in Figure 6.4 is shown the simple voltage doubler. Assuming that we have chosen reasonable values for our capacitors, the voltage clamper charges up to V 0, meaning that the point between the C 1 and the two diodes will have a voltage given as where the DC voltage level V 0 is given by equation 6.4. v in (t) ƒ ƒ C 1 / ƒ ƒ ÿ ÿ D D 1 2 ƒ ƒ ÿ ò C 2 ý ƒ ÿ I S v(t) = V 0 + v 0 cos ωt, (6.7) ò v out(t) v in (t) ƒ ƒ v 0 v d / ÿ ÿ D 2 ƒ ò C 2 ÿý ƒ ÿ ò v out(t) Figure 6.4: On the left is shown a voltage-doubler circuit. The first capacitor/diode pair (C 1 and D 1 form a voltage clamper, which then drive the half-wave rectifier formed by D 2 and C 2. Once C 1 charges up, it will behave like a DC voltage source of value. This also leads to a situation where D 1 no longer allows current to flow in either direction. This means that the circuit will behave like that shown in the right-hand schematic.

83 6.1. INTRODUCTION 75 When this happens, diode D 1 effectively stops conducting in either direction, so we can pretend that it is no longer present ( as we did in the right-hand side of Figure 6.1). Because C 1 is charged up to a voltage V 0, we can treat it as a DC voltage source. Thus we can draw the equivalent for our doubler as in the right-hand circuit in Figure 6.4. The diode D 2 will now conduct when the upper side of the voltage source is more positive than the lower side, and as we saw with the clamp. This means that the capacitor C 2 will charge up. It will eventually reach a point when it has a voltage of 2V 0 across it, with the upper face being more positive than the lower face. When this happens, the diode D 2 will no longer conduct in either direction. As such, we will be left with a constant DC voltage of 2v 0 across the capacitor C 2. Thus, the output will be a DC voltage whose values is twice the amplitude of the inputs AC signal. v out = 2 V 0. Taking into account the diode drop voltage explicitly, we have that v out = 2 (v 0 V d ). We now recall that as we saw with the voltage clamper, we do not see the full V d drop across the diodes, but only some fraction of it. While we have built a circuit that appears to have a DC level that is twice the input, in fact there are some issues which limit this circuit. In particular, the output impedance of the circuit tends to be fairly large and the voltage doubler cannot supply very much current to a load. We will investigate this further when we discuss the voltage multiplier in Section The Voltage Multiplier We can continue with the doubler circuit that we examined in Section by adding additional stages to the circuit. Such a circuit is shown in Figure 6.5 where the output labeled a corresponds to the doubler we saw earlier. There we saw that V a = 2 (v 0 V d ) where v 0 is the amplitude of the input voltage, v in (t), and V d is some fraction of the nominal voltage drop across one of our diodes. The second stage has an output at b and has a nominal output voltage of V b = 4 (v 0 V d ). The third stage has its output at c with nominal output voltage of V c = 6 (v 0 V d ), and if we were to continue this circuit to n stages, we would expect that output voltage V o would be V o = 2n ( v 0 V d ). (6.8) This type of voltage multiplier is known as a Cockcroft-Walton voltage multiplier and is named for its inventors, Sir John Douglas Cockcroft 1 and Ernest Thomas Sinton Walton 2. While the Cockcroft-Walton multiplier can be used to generate large DC voltages, it is rather limited in the current that it can deliver to its load. It also has an AC ripple on the nominal DC voltage level. 1 Sir John Douglas Cockcroft was a British physicist who worked with Ernest Rutherford in Manchester. He shared the Nobel prize in physics in 1951 with Ernest Thomas Sinton Walton for splitting the atomic nucleus. 2 Ernest Thomas Sinton Walton was an Irish physicist who together with SIr John Douglas Cockcroft developed the Cockcroft-Walton accelerator that won them the Nobel prize in 1951 for the splitting of the atomic nucleus.

84 ƒ ƒ ƒ ƒ ƒ ƒ ƒ ˆ ÿ ÿ ˆ ÿ ÿ ˆ ÿ ÿ xyyz C C C / ƒ ƒ ƒ ƒ ƒ ƒ ƒ ý ÿ ÿ ˆ ÿ ÿ ˆ ÿ ÿ ˆ ÿ C ƒ ò C C a ƒ ƒ ò xyyz c 76 CHAPTER 6. VOLTAGE MULTIPLIERS v in (t) ò b Figure 6.5: The Cockcroft-Walton voltage multiplier. Assuming that the multiplier is built using identical capacitors and diodes, the output voltage V o, will be smaller than that given in equation 6.8. It is typically written as the voltage delivered to a load, V L is given as V L = V o V drop (6.9) where V o is given in equation 6.8 and the voltage drop, V drop, is given by equation 6.8. V drop = Z C I L ( 4n 3 + 3n 2 n ) (6.10) In this expression, n is the number of stages in the multiplier and Z C is the magnitude of the impedance of one of the capacitors at the AC frequency f. Z C = The load current, I L, is the current drawn by the load on the output of the multiplier. In literature, one often sees equation 6.10 approximated with Z C = 1/(6fC). In addition to the voltage drop, the output also has an AC ripple whose amplitude, v r, is given as 1 ωc v r = Z C I L n (n + 1), (6.11) where as before, the number of stages in the multiplier is given as n. This ripple voltage is the result of the capacitors charging and discharging and is shown schematically in Figure 6.6. We can use equation 6.10 to characterize the output impedance of the multiplier. We have that the output voltage under load of the multiplier is which we can rewrite as V L = V o V drop, V L = V o Z C I L ( 4n 3 + 3n 2 n ). From this, we expect that the output impedance, R out, of the multiplier is given as R out = Z C ( 4n 3 + 3n 2 n ), (6.12) which increases rapidly (n 3 ) with the number of stages in the chain. We also saw that the ripple voltage increases as n 2 with the number of stages, thus without doing something additional, there is a very finite limit in the number of stages that make sense in such a voltage multiplier. Some discussion of tuning

85 ƒ ƒ ƒ ƒ ƒ ƒ 6.1. INTRODUCTION 77 Vout Vo Vdrop vr 0 T 2T 3T Time Figure 6.6: The output voltage of a Cockcroft-Walton voltage multiplier. The nominal voltage V o is given as in equation 6.8, the voltage drop under loading, V drop is from equation 6.10 and the voltage ripple, v r is given in equation The ripple voltage arises from the charging and discharing of the capacitors under load. the capacitors to improve this performance can be found in the literature 3. There, a more optimal solution is found when the the capacitors in Figure 6.7 are chosen based on the stage number, i. C 2i = (n i + 1) C C 2i 1 = (n i + 1) 2 C ƒ ÿ ÿ ÿ ÿ ÿ ÿ xyyz C 1 C 3 C 5 / ƒ ƒ ƒ ƒ ƒ ƒ ƒ ý ÿ ÿ ÿ ÿ ÿ ÿ ÿxyyz In such a configuration, the larger capacitors are in the earlier stages. v in (t) C 2 Figure 6.7: A more optimized Cockcroft-Walton voltage multiplier. C 4 C Switched Capacitor Circuits In the previous sections we have looked at ways of multiplying a AC voltage to produce a DC output. It would also be useful to be able to double a DC voltage directly. One way to do this is through circuits which use capacitors and switches. A simple example would be to charge two capacitors in parallel, 3 See for example the article by I. C. Kobougias and E. C. Tatakis in the IEEE Transactions on Power Electronics, Vol. 25, No. 9, page 2460 (2010).

86 ƒ ƒ ƒ ƒ }{ ƒ ƒ 78 CHAPTER 6. VOLTAGE MULTIPLIERS and then switch them so that the output views the capacitors in series, thus doubling the voltage. A common method to achieve this doubling is through charge pumping where a capacitor is charged up, and then switched into a mode where it can transfer charge to a second capacitor. In that light, we will look at the switched capacitor charge-pump voltage doubler as shown in Figure 6.8. V in ÿ ƒ ÿ C # p " ƒ ò C o ƒ ƒ ÿ ò Vo ÿ Figure 6.8: A switched capacitor charge-pump voltage doubler. The two switches can either both be to the left or both to the right, and while we show these as a mechanical style switch in the diagram, in reality they are a pair of transistor switches whose switching is controlled by an external clock. We can examine in detail the two possible states of the circuit, and show these explicitly in Figure 6.9 The left-hand picture shows the circuit when both switches are to the left, while the right-hand one shows both switches to the right. When both switches are to the left, the V in ƒ ƒ C C p o ƒ ÿ ò ÿ ƒ ÿ ò Vo ƒ V in ƒ ˆ C p ÿ ò ƒ C o ƒ ƒ ÿ ò Vo Figure 6.9: A switched capacitor charge-pump voltage doubler showing the two circuit configurations depending on how the switches are set. The left-hand circuit shows the capacitor C p being charged up, while the right-hand circuit shows the output capacitor, Co being charged. Note that C p is shown as an electrolytic capacitor to indicate which side is at a higher potential. capacitor C P will charge up until it has the input voltage across it. We have shown it as an electrolytic so we can see which side (the upper) of C P is at higher potential. In this mode, we also see that the output is just taken across the capacitor C o. When the switches move to the right, we are in a state where C o is being charged by both the input voltage V in and the charged up C P in series. This is similar to what we saw with the voltage doubler in Section where the charged capacitor will behave like a DC voltage supply. This means that C o will charge up to a voltage of 2V in. In this mode, we also take the output across C o. After a sufficiently long time, we will have that V o = 2V in. As noted above, the switches in these circuits are solid state based and controlled by a clock. This is typically accomplished by building an integrated circuit based device which has both the clock and the switches in it. External capacitors are then connected to this circuit. There are a rather large number of these available commercially. Here, we show how one of these is hooked up to form a voltage doubler in Figure The pin out here is based on the LM2681 chip, but the same sort of external connections apply to all of these. In looking at the specification sheets for these devices, they typically can also be used to cut a voltage in half, or to invert a DC voltage. It is also possible to chain several of these

87 ƒ ƒ 6.1. INTRODUCTION 79 together to obtain even larger multiplication of voltages. The interested reader is invited to consult the specification sheets for these devices 4. ƒ ð ÿ ýv + V o V in ò V ƒ C 2 ƒ ÿ o c+ g C 1 ƒ c g ÿý ÿ ƒ Figure 6.10: An integrated circuit voltage doubler with external capacitors and diode. The pin out shown is for the LM2681 switched capacitor voltage convertor. The input V + connects to the input voltage. The c+ and c inputs are for an electrolytic capacitor, C 1, while the g inputs both must be grounded. The output is taken from the V 0 terminal. 4 A very incomplete list of these include the LM2681, LM 2662 and LM2663 from Texas Instruments and the MAX1044, the MAX1682 and the MAX1683 from Maxim.

88 80 CHAPTER 6. VOLTAGE MULTIPLIERS 6.2 Preliminary Lab Questions The work in this section must be completed and signed off by an instructor before you start working on the lab. Do this work in your lab book. 1. Consider the voltage clamper in Figure 6.1 and assume that nominal diode drop, V d, is zero. Sketch the input voltage, v in (t) and the voltage across the diode, v out (t) over one period before the capacitor has started to charge. Sketch the voltage across the capacitor over the same time period. Be sure to account for the orientation of the capacitor in your sketch. Hint: Look at Figure Given the clamped voltage as in equation 6.7, sketch the voltage across the output capacitor, C 2, in Figure 6.4 before the capacitor starts to charge up. Make your sketch for one period of oscillation, T.

89 6.3. EQUIPMENT AND PARTS Given equation 6.10, estimate the number of stages n before the voltage drop is equal to the nominal voltage. Assume that n is large enough that you only need the leading term and express your answer in terms of v o, Z C and I L. You may also assume that the diode drop, V d is zero. 6.3 Equipment and Parts In this lab we will utilize the following equipment. This equipment is located at your lab station. 1. The Tektronix TDS 2012B digital oscilloscope. 2. Two P2220 probes for the oscilloscope. 3. A USB memory stick may be useful. 4. The Stanford Research Systems DS335 signal generator. 5. One BNC to alligator cable. 6. The Metex 4650 digital meter. 7. The Global Specialities PB10 proto-board (see Appendix A for a description). Note that this board should be part of the PRO-S-LAB kit that include a power brick and power bus as well. These latter two parts are not needed until lab 7. You will also need the following components in order to carry out this lab. It makes more sense to get them as you need them, rather than all at once before the start of the lab. 1. Eight 1N4004 diodes. 2. Eight 50 V, 1 µf electrolytic capacitors. 3. One 47 kω resistor. 4. One 100 kω resistor.

90 82 CHAPTER 6. VOLTAGE MULTIPLIERS 5. One 220 kω resistor. 6. One 1 MΩ resistor. 7. One 5.6 MΩ resistor. 8. Additional resistors and capacitors you choose to match your circuit designs. 6.4 Procedure Gotcha! 1. Is the DS335 set to be High-Z? 2. Is the voltage offset of the DS335 set to 0 V? 3. Do you want to use AC or DC coupling on your oscilloscope? If you are interested in seeing a DC offset, then you need to DC couple. If you want to only see the time-varying part of the signal, then you want to AC couple. 4. Recall from lab 2 that at very-low and very-high frequencies, AC coupling may attenuate your signals. 5. Are all of your grounds connected to the same point? Are you grounding out your circuit in the wrong place? The Diode I-V Curve In Figure 6.3 we schematically sketch the I V curve of a diode. Here we would like to accurately measure this curve over several orders of magnitude in current. When measuring current over such large ranges, one needs to be careful in trusting the current measuring ability of our multimeters. You may have noted in earlier labs that the current readings between different range settings on the meter yield inconsistent results. To avoid this problem, we will build a simple circuit where we place a resistor of known value in series with our 1N4004 diode such that the diode is forward biased. 1. Set up a simple series circuit with a 10 V DC input voltage and your diode in series with a resistor. Using your multimeter, measure the voltage across the resistor, V R, and across the diode, V D. 2. Select a reasonable sample of resistors going from 100Ω up to a few M Ω, and repeat your measurement. Be sure to measure the actual resistance. Uses these data to produce an I V curve for the diode. 3. You should be able to describe your I-V curve using the Shockley equation, 6.5. Estimate reasonable values for I S, m and V T and show that these do a reasonable job in describing your data.

91 ƒ ƒ ƒ ƒ 6.4. PROCEDURE 83 Question 6.1 For what current, I D, will the diode voltage, V d, be 0.65V? Question 6.2 What do you expect for V d if I D is only 1% of the value that gave os V d = 0.65V? The Voltage Clamper In this section, we will be building and measuring the behavior of the voltage clamp sketched in Figure We will use our DS335 to output voltages with amplitudes on the order of a few volts and a mid-range frequency such as f = 1 khz. v in (t) = v 0 cos (ωt) where v V. Initially, we will choose C = 1µF and take R = 47 kω to build the circuit in Figure v in (t) ƒ ˆ ÿ ÿ ò C R / ƒ ÿ ÿ ý ò v out(t) Figure 6.11: A voltage-clamper circuit.

92 84 CHAPTER 6. VOLTAGE MULTIPLIERS Question 6.3 With our choice of R and C, do we expect to be able to buffer the capacitor DC voltage? How quickly will the capacitor discharge compared to the period of the input voltage? 1. Using an input voltage of 5 V peak-to-peak, measure the output voltage across the resistor. Be sure to note the average DC level of this voltage, V o, and the amplitude of the AC component of the voltage, v r. 2. Repeat your measurements with several different resistance values and use this to estimate the output resistance of the clamper. Be sure to include a measurement with no resistor. 3. Using your data, estimate what V d is for your data. Question 6.4 Assuming that you are using a 47 kω resistor, what do you expect to happen in part 1 if you use a much smaller capacitor, say 0.01 µf? The Voltage Doubler The voltage-doubler circuit can be built by adding a second diode/capacitor stage to the voltage clamp in Section as shown in Figure In this circuit, we will take both capacitors to be 1 µ F and the diodes will be 1N4004s. We will choose various resistors and then examine the average DC level and the AC ripple amplitude at the output. 1. Build the circuit shown in Figure Using an input AC signal with a frequency of 1000 Hz and a peak-to-peak amplitude of 5 V, measure both the average voltage (DC level) and the amplitude of the voltage ripple for an open circuit (no resistor). Note that the Mean measurement function measures the average voltage, while the peak-to-peak measurement function can characterize the ripple voltage.

93 ƒ ƒ ƒ ƒ ƒ ˆ ÿ ÿ ÿ ò C / ƒ C ÿ R ý ƒ ÿ ƒ ÿ 6.4. PROCEDURE 85 v in (t) Figure 6.12: The voltage-doubler circuit. ò v out(t) 2. Measure the average voltage and ripple voltage with several different values of R ranging from 47 kω up to 5.6 MΩ. Question 6.5 For the 1 khz signal that you used, what is the output impedance, Z out of your voltage doubler? How does this compare to the impedance of one of our capacitors? 3. Using your 220 kω resistor, measure the DC voltage, V out, and ripple voltage for several input frequencies between 1 khz and 100 khz. Be sure to take sufficient points so that you can estimate the frequency dependence of your results. Question 6.6 Do you see the expected frequency response of the output voltage? The Voltage Multiplier We will now continue to add multiplication stages to our circuit in Figure 6.12 until we reach the threestage multipler shown in Figure As we did earlier, we will continue to use 1N4004 diodes and 1 µf

94 ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ 86 CHAPTER 6. VOLTAGE MULTIPLIERS capacitors. We are interested in characterizing the behavior of this circuit for an input signal where v 0 is 5.0 V and f is 1 khz. v in (t) v in (t) = v 0 cos (2πft), ƒ ˆ ÿ ÿ ˆ ÿ ÿ ˆ ÿ ÿ xyyz C C C / ƒ ƒ ƒ ƒ ƒ ƒ ÿ ÿ ˆ ÿ ÿ ˆ ÿ ÿ ˆ C C C ƒ ÿ xyyz ò R ÿý ÿ ò v out Figure 6.13: The voltage multiplier. 1 Build the voltage-multiplier circuit as shown in Figure As with the doubler circuit, use the assortment of resistors from 47, kω to 5.6 MΩ to characterize the average voltage and the ripple voltage for a 1 khz input frequency. 2 Determine the output impedance of the multiplier. 3 Repeat your measurements using a 5 khz and 10 khz input frequency. Characterize the output impedance for both of these frequencies. Question 6.7 If would like to be able to drive a 260 kω load with our multiplier and have the ripple voltage smaller than 1 mv, estimate the minium frequency we need to operate at?

95 6.5. ADDITIONAL PROBLEMS 87 Question 6.8 What would happen if we used a smaller capacitor such as 0.1 µf? 6.5 Additional Problems After completing this lab, you should be able to answer the following questions. 1. Based on the voltage drop in your voltage doubler and the Cockcroft-Walton multiplier, there is a limit to the number of stages that one can reasonably use in a multiplier. Estimate what this is from your data? 2. Make the same estimate from the voltage drop formula in the lab introduction. What assumptions do you need to make for this?

96 88 CHAPTER 6. VOLTAGE MULTIPLIERS

97 Chapter 7 Bipolar Junction Transistors, Emitter Followers Reference Reading: Chapter 5, Sections 5.1, 5.2 and Time: Three lab periods will be devoted to this lab. Goals: 1. Understand basic transistor operation 2. Understand the need for a biasing network and the design criteria for AC circuits 3. Demonstrate power gain, high input resistance, low output resistance 4. Understand the implication of power gain without voltage gain 7.1 Introduction Active circuits are ones which can yield gain in the sense of being able to yield greater power output than input. In most cases, more power can be delivered to a load by passing the signal through an amplifier than directly from a signal source. Obviously, the gained power has to come from somewhere and this is generally from a DC voltage supply (often called a D.C. power supply for this reason). We begin with a simple voltage follower circuit that provides an output voltage that follows the input voltage (i.e., is essentially equal to the input voltage). How can such a seemingly useless circuit have any function? Because it can be a power amplifier: because the follower s output impedance (essentially a resistance) can be quite low compared to that of the signal source, the follower can supply more power to a load than a high impedance source could. In Lab 8, you will examine the common emitter amplifier circuit; this can have both voltage and power gain. For both labs 7 and 8, we use a simple model for npn transistor operation. To understand the underlying principles requires an understanding of how electrons behave in crystals the subject of a course in solid state physics; in class, we will give a quick introduction. 1. The collector must be more positive than the emitter. This is clearly necessary in order for current to flow from collector to emitter. 2. The base-emitter and base-collector junctions behave like diodes: 89

98 90 CHAPTER 7. BIPOLAR JUNCTION TRANSISTORS, EMITTER FOLLOWERS VC IC Side View IB VB VCE=VC-VE C B E C B E VBE=VB-VE VE IE Bottom View Figure 7.1: Shown is information about the npn 2N2222 transistor. The left-hand picture shows the circuit schematic for the transistor. Current flows into both the base and the collector and out the emitter. The three pins are biased to voltage V C, V B and V E respectively. The right-hand images show drawings of two different packages for the transistor. The upper images are looking at the side of the transistor, while the lower images are looking at the bottom of the transistor. (a) When the base-emitter junction is reverse biased, the transistor is turned off and no current flows from collector to emitter. The base-emitter junction is like the handle of a valve it controls the current flow through the collector-emitter circuit. (b) When the base-emitter is forward biased and the base-collector is reverse biased, the transistor is in the active or linear operating range. A forward biased diode has a diode drop of 0.6 to 0.7 Volts (0.65 V). (c) When both junctions are forward biased, the transistor is saturated and, typically, V CE Volts. 3. Maximum values of I C and V CE cannot be exceeded without burning out the transistor. 4. If 1-3 are obeyed, then I C h F E I B = βi B. β (or h F E ) is roughly constant in the active or linear operating range. Typical values are in the range and can vary substantially from transistor-to-transistor even for a given transistor type. A good circuit design is one that does not depend critically on the exact value of β but only on the fact that β is a large number. Figure 7.1 provides some information on the 2N2222 switching transistor that we will be using in the lab. More information on transistor pin outs can be found in Appendix B. Figure 7.1 illustrates the definitions of transistor voltages and currents. Note that it is always true that In the active range, I E = I C + I B. (7.1) I E = (β + 1)I B I C, (7.2)

99 7.1. INTRODUCTION 91 the approximation holding for large β, and V B V E Volts. (7.3) You will apply these equations many times remember them! Also shown is a picture of the 2N2222 transistor as seen from the side with the leads. You should remember that the metal transistor can is usually connected to the collector be careful to not let wires touch the can! You can verify that a transistor is functional by checking the two diode junctions with an ohmmeter. With the positive (red) lead on the base of an npn transistor, you should see conduction to both emitter and collector; with the negative (black) lead on the base, you should not see conduction to either other lead. For the emitter follower, we will (in class) determined the input resistance of the follower circuit. If R E is the equivalent resistance from the emitter to ground, then we have that or in the limit of large β, we have that Similarly, we found that for the output resistance R in = (β + 1)R E, R in β R E. (7.4) R out = R s β + 1, R out 1 β R S (7.5) where R s is the equivalent output resistance of the source that is driving the follower. Hence, a large β helps make the input resistance high. Thus, the circuit draws only a small amount of current and therefore receives the maximum voltage signal from the source. Similarly, the output resistance is low which implies that the output voltage is independent of the load. We can draw large currents by the load without affecting the output voltage. When you see such statements as these, you should think of (and even draw) Thèvenin equivalent circuits; here, draw (i) the equivalent circuit of a source and the input of the transistor circuit and (ii) the equivalent for the transistor circuit output and a load justify the statements.

100 ƒƒ ƒ ƒ ƒ ƒ 92 CHAPTER 7. BIPOLAR JUNCTION TRANSISTORS, EMITTER FOLLOWERS 7.2 Preliminary Lab Questions The work in this section must be completed and signed off by an instructor before you start working on the lab. Do this work in your lab book. ð ƒ ÿ 4.7 kω ÿ V ƒÿ ÿ o 4.7 kω 470 Ω R ƒ ÿý L ÿ 12 V Figure 7.2: A voltage divider being used to supply the base voltage for an emitter-follower circuit. 1. Draw the voltage divider part of the circuit shown in Figure 7.2. Under the divider circuit, sketch the Thèvenin equivalent of the divider from the figure above. What are the numerical values for the Thèvenin voltage and resistance, V th and R th?

101 7.2. PRELIMINARY LAB QUESTIONS Draw the emitter follower part of the circuit shown in Figure 7.2. Under the follower sketch, draw the equivalent circuit that you see when you look into the base of the transistor. Assuming that for your transistor, β 100, what do you expect the relevant resistance in your equivalent circuit to be? 3. Now consider the entire circuit as shown in Figure 7.2 where the voltage divider is driving the follower circuit. What is the effect of the emitter follower on the output voltage of the divider (give a numerical value for the voltage)? 4. Draw the Thèvenin equivalent for the entire circuit as seen from the output of the transistor. You do not need to compute V th and R th, but EXPLAIN how you would measure them.

102 94 CHAPTER 7. BIPOLAR JUNCTION TRANSISTORS, EMITTER FOLLOWERS 7.3 Equipment and Parts In this lab we will utilize the following equipment. This equipment is located at your lab station. 1. The Tektronix TDS 2012B digital oscilloscope. 2. Two P2220 probes for the oscilloscope. 3. One USB memory stick. 4. The Interplex Electronics 1200CA-1 power brick and bus connector. 5. The Stanford Research Systems DS335 signal generator. 6. One BNC to alligator cable. 7. The Metex 4650 digital meter. 8. The Global Specialities PB10 proto-board (see Appendix A for a description). You will also need the following components in order to carry out this lab. It makes more sense to get them as you need them, rather than all at once before the start of the lab Ω resistor Ω resistor kω resistor. 4. One 2N 2222 npn switching transistor. 5. Additional resistors and capacitors you choose to match your circuit designs. 7.4 Procedure First, you will demonstrate the impedance transformer property of the emitter follower using just DC voltages. To take advantage of this same property, but applied to AC signals, requires some additional complications that you will learn about in Gotcha! 1. Is the DS335 set to be High-Z? 2. Is the voltage offset of the DS335 set to 0 V? 3. Do you want to use AC or DC coupling on your oscilloscope? If you are interested in seeing a DC offset, then you need to DC couple. If you want to only see the time-varying part of the signal, then you want to AC couple. 4. Recall from lab 2 that at very-low and very-high frequencies, AC coupling may attenuate your signals. 5. Are all of your grounds connected to the same point? Are you grounding out your circuit in the wrong place? 6. Have you reversed the emitter and collector pins on your transistor? 7. Did you measure β of your transistor to make sure that it is ok? 8. If you are using the power busses on your proto-board, have you bridged the gap in the middle?

103 ƒ ƒ ƒ ƒ ƒ ð ƒ ÿ 4.7 kω ƒÿ ƒÿ ò 4.7 kω V Ω ƒ ÿý ò 7.4. PROCEDURE V ð R L ð Figure 7.3: DC Emitter Follower Circuit. This circuit is an impedance transformer in that the I-V characteristic of the output terminals ( ) has a slope that corresponds to a smaller source resistance than does the I-V characteristic of the Voltage Divider Source by itself. Because the circuit delivers more power to a small load, R L, than the Voltage Divider Source would by itself, the emitter follower can have significant power gain DC Emitter Follower Use an emitter follower circuit to make a good voltage source out of a lousy one. You should recall from previous work what constitutes a good voltage source. The circuit in Figure 7.3 shows a voltage divider driving an emitter follower circuit. The large resistances (4.7 kω) in the divider mean that any load driven by the divider would need to have a resistance much larger than 4.7 kω, making this lousy voltage source. We are going to combine this with the transistor emitter follower to make a voltage source whose output terminals are indicated by the two open dots near V 0 in Figure 7.3. You should think of everything up to those dots as being the new and improved voltage source whose characteristics you want to measure. 1. First, in your notebook, draw the circuit with the input (the voltage divider) replaced by its Thèvenin equivalent. Draw the transistor circuit attached to this equivalent. Next, draw the same equivalent circuit of the voltage divider with the transistor circuit replaced by its equivalent as seen from the base; what is the value of the load resistance seen by the voltage divider? 2. On the same graph you will use for the emitter follower output, draw the expected I-V curve for the divider circuit; i.e., for the Thèvenin equivalent just drawn. Use axes that show the global behavior, going from zero to the maximum values of I and V. 3. Build the circuit shown in Fig You can use the on-board 12V power supply as the DC source. With multi-part circuits, it is always a good idea to build and test the circuit in sections. Follow this sequence: (a) Build the voltage divider first. Test the output voltage and verify that it is as expected. You might want to put a load resistor across the output to make sure your work above is correct. (b) Add the transistor and emitter resistor but keep R L =. Note that because the DC supply is such a good voltage source (constant voltage regardless of current being supplied), you can think of it as independently supplying 12 V to both parts of the circuit. (c) What is the voltage divider output now? Is this as expected? (d) Is V 0 the expected value?

104 96 CHAPTER 7. BIPOLAR JUNCTION TRANSISTORS, EMITTER FOLLOWERS (e) If your measurements for any of the above are puzzling, check the DC supply voltage is this being shorted out? Is the power turned on? Is it exactly 12 V? 4. Measure and plot, on the same axes as above, the I-V curve for the emitter follower output (do this by varying the load on your circuit in a way similar to that used in Lab 1). From this plot, determine the equivalent output resistance, R o, of the circuit and compare to equation Determine the answers to the following questions: Question 7.1 What is the power delivered to a load in the two cases (with and without the emitter follower) when R L = 500Ω? Question 7.2 How sensitive is this circuit to the precise value of β? Question 7.3 What would happen to the functioning of this circuit if we chose voltage divider resistors of 100kΩ (perhaps to reduce power consumption)?

105 ƒ ƒ ƒ 7.4. PROCEDURE 97 Question 7.4 What are the minimum and maximum input voltages this circuit can follow (given a fixed 12V supply at the collector)? AC Emitter Follower Before going further, you should understand how the circuit in Fig. 7.4 operates. What are the functions of C 1 and C 2? What do R 1 and R 2 achieve? Once you understand the design principles of this circuit, follow the steps below to select appropriate components for an audio amplifier. ð ƒ ÿ V CC R 1 ð vi ˆ ƒ ÿ C 1 R 2 ƒÿ Š ÿ ò vo C 2 R E R ý ƒ ÿ L ƒ ÿ ƒ ÿ ò Figure 7.4: The AC emitter follower circuit. 1. Follow the design procedure in the example at the end of section of the textbook to determine appropriate values of components for the audio amplifier circuit. Here, we are using the same V CC = 12 Volts but use I C = 10 ma instead of 1 ma. Be sure to record your calculations in your lab notebook. 2. Test the functioning of your circuit at, say, 1 khz to see how large an input voltage you can use with a large load resistor (say, R L = 10 kω). 3. Measure the frequency response from just below your designed cut-off frequency up to the highest possible frequencies. Do this using an input amplitude which is somewhat smaller than the maximum possible (say 5 V amplitude). Compare the results with R L = 1 kω and R L = 100Ω (just check a few relevant frequencies for these last tests, so you can map out the response in the region in which it is changing).

106 98 CHAPTER 7. BIPOLAR JUNCTION TRANSISTORS, EMITTER FOLLOWERS 4. From your frequency response, predict how this circuit would respond to triangle or square wave inputs. Try it for some appropriate period of the input wave (using a value of R L for which the circuit works well), and see if you are right. Try 5 or 10 khz waves, if the expected distortion isn t clearly visible, try higher or lower frequencies. Include a sketch of the resulting waveforms (or capture and plot it) and appropriate discussions in your lab notebook. 5. Test a design using different quiescent current, I C. Try 1mA and make minimal changes in the circuit. Question 7.5 Do R 1 and R 2 need to be changed? Explain your answer. Question 7.6 Test the circuit operation: can large AC signals still be passed? Does the low-frequency cut-off change? Is the high-frequency behavior still the same?

107 ƒ ƒ ƒ ƒ 7.5. ADDITIONAL PROBLEMS Additional Problems After completing this lab, you should be able to answer the following questions. 1. You have set up the emitter-follower as shown in the circuit in Figure 7.5. You have carefully chosen your transistor such that β = 100 and have selected R 1 = R 2 = 10 kω and R E = 100 Ω. You then use a DC power supply to bias the circuit, V CC = 10 V. (a) Based on your choice of R 1 and R 2, what voltage are you expecting to have at the emitter (V E )? (b) Based on your answer to part (a), what do you expect for the current I C and the power dissipated in the transistor itself? (c) You build the circuit as shown above, and then go and measure the voltage at the emitter, V E. Approximately what value will you measure? ð ƒ ÿ R 1 ÿƒ ƒÿ ò V E R 2 R E ƒ ý ƒ ý V CC Figure 7.5: The circuit for problem In lab, we built an emitter follower as shown in the circuit in Figure 7.6. One good choice of components would be R 1 = R 2 = 2.2 kω and R E = 470 Ω, and we can bias the circuit with V CC = 12 V. We are interested in using the follower for input signals in the f = 0.5 khz to f = 50 khz range. Answer the following questions assuming that the β of your transistor is 100. (a) What is a reasonable value to choose for the capacitor C? Justify your answer. (b) You would like to use your follower circuit to drive a low-pass filter whose input impedance is Z in = 100Ω. Will your circuit be able to do this? Justify your answer. (c) You are told that the input voltage is v in (t) = 4.75 V cos(6280s 1 t). Sketch the expected output voltage, V E + v out (t) over one period. ð ƒ ÿ R 1 ˆ ÿƒ ðv in C ƒÿ ò R 2 R E ƒ ý ƒ ý V CC V E + v out Figure 7.6: The circuit for problem 2.

108 100 CHAPTER 7. BIPOLAR JUNCTION TRANSISTORS, EMITTER FOLLOWERS

109 Chapter 8 Bipolar Junction Transistor: Inverting Amplifiers Reference Reading: Chapter 5, Sections and Time: Three lab periods will be devoted to this lab. Goals: 1. Learn to set up a common emitter voltage amplifier 2. Learn the limits: relatively low input resistance, relatively high output resistance, frequency response. 3. Learn AC biasing tricks to get higher gain. 8.1 Introduction The common emitter amplifier appears to be a subtle variation on the emitter follower studied in lab 6. The collector is attached to the supply through a resistor instead of directly and the output is taken from the collector terminal of the transistor instead of the emitter. The emitter may be connected directly to the ground. (Hence the name, common emitter, since the input and output signals share the common ground at the emitter.) As discussed in the text, this gives a large gain but has poor linearity, an input impedance that is a function of input voltage, and is difficult to bias properly. We will use the slightly modified inverting amplifier that includes a resistor R E between the emitter and ground as shown in Fig We will find that the gain of the amplifier can be controlled with proper selection of R E. In spite of the similarities, the behavior of this circuit is significantly different from the emitter follower: 1. We can arrange for significant voltage gain. 2. The output signal (that is, the AC signal) is inverted relative to the input. 3. The output resistance is quite a lot larger than that of the emitter follower. The gain, G is computed as follows: 1. The emitter voltage follows as before: V E = V B 0.65V. Thus, v E = v B. 2. v E generates an AC current i E = v E /R E = v B /R E. 101

110 ƒ ƒ ð ƒ ÿ V CC R C R 1 ð vi ˆ ƒ ÿ ÿ ò vo C 1 R 2 R E ð ƒ ÿý ƒ ÿ ò 102 CHAPTER 8. BIPOLAR JUNCTION TRANSISTOR: INVERTING AMPLIFIERS Figure 8.1: The inverting amplifier circuit. 3. Using i E i C, this AC current generates an output voltage v C = i E R C = v B R C R E. Thus, G = R C R E. (8.1) The minus sign indicates that when V B increases, V C decreases. This makes sense since V C = V CC I C R C and I C increases when V B increases. If we try to decrease R E toward zero to get higher gain, we find that the intrinsic emitter resistance, r E becomes important and limits the gain. r E accounts for the fact that our standard diode drop of 0.65 Volts is only an approximation. The drop, V BE, is actually a function of the current through the diode junction as you saw in Lab 1. Based on the I-V characteristic of a diode, the text argues that r E 25 mv I C near room temperature. For I C = 10 ma, r E = 2.5Ω (this means that for a 1mA change in current, V BE changes by 2.5 mv out of the roughly 0.65 Volt total drop). We should write R C G =. (8.2) R E + r E In deciding on component values, we need to change the base bias resistor values (relative to the emitter follower) in order to set the collector operating point (the collector voltage at zero AC input) near V CC /2; again, we do this so as to maximize the possible output voltage swing (which certainly cannot extend below zero volts or above V CC ). Recall that for the follower, we biased so that the emitter voltage (which was then the output) satisfied this requirement. Now we require that V C = V CC I C R C 1 2 V CC (8.3) or This means that we want And now we know that I C = 1 2 V CC R C I E = V E R E = G R C V E. (8.4) V E = 1 2 V B = V E Volts = 1 2 V CC G. (8.5) V CC G Volts. (8.6)

111 8.1. INTRODUCTION 103 This is a lower base voltage than we used for the follower which means that the base or input voltage won t be able to swing as far as in the follower case (without turning off the transistor). This is okay: we are building a voltage amplifier because we only have a small signal to begin with! The output resistance of this circuit (i.e., the Thèvenin equivalent resistance at the output) is just R C. You should always remember that the collector behaves like a current source and has large resistance (the I C -V CE characteristic curves are nearly horizontal; the current of the current source is controlled by the base-emitter voltage see section ). To get high gain, we want large R C, but we pay by having a large output impedance. In selecting R 1 and R 2, keep in mind that we want the base bias voltage to be fairly independent of the β of the transistor. To do this, we want the base bias circuit to yield the same voltage when attached to the transistor as it does all by itself. In other words (#1), we want to lose only a small fraction of the divider s current into the base. In other words (#2), the Thèvenin equivalent resistance of the bias circuit should be small compared to the input resistance of the base (this is the same logic we used for the follower). The base input resistance is as for the follower: R in = (β + 1) (R E + r E ).

112 104 CHAPTER 8. BIPOLAR JUNCTION TRANSISTOR: INVERTING AMPLIFIERS 8.2 Preliminary Lab Questions The work in this section must be completed and signed off by an instructor before you start working on the lab. Do this work in your lab book. After reading the Section 8.1 of your lab write-up, we want to determine some relevant component parameters. Assume that V CC = 12 V and that the gain, G = What voltage should we set V B at? 2. Based on this voltage, what ratio of R 1 :R 2 is needed to achieve this? 3. Choose the output resistance, R C to be 4.7 kω. What value of R E should we choose. Show that the intrinsic transistor resistance, r e, does not significantly affect the gain of your circuit. 4. Based on R E, select reasonable values of components for R 1 and R 2.

113 8.3. EQUIPMENT AND PARTS Equipment and Parts In this lab we will utilize the following equipment. This equipment is located at your lab station. 1. The Tektronix TDS 2012B digital oscilloscope. 2. Two P2220 probes for the oscilloscope. 3. One USB memory stick. 4. The Stanford Research Systems DS335 signal generator. 5. The Interplex Electronics 1200CA-1 power brick and bus connector. 6. One BNC to alligator cable. 7. The Metex 4650 digital meter. 8. The Global Specialities PB10 proto-board (see Appendix A for a description). You will also need the following components in order to carry out this lab. It makes more sense to get them as you need them, rather than all at once before the start of the lab Ω resistor kω resistor kω resistor. 4. One 2N 2222 npn switching transistor. The pin out for this transistor is reproduced in Figure Additional resistors and capacitors you choose to match your circuit designs. VC IC Side View IB VB VCE=VC-VE C B E C B E VBE=VB-VE VE IE Bottom View Figure 8.2: The npn transistor schematic symbol, notation, and lead configuration for the 2N2222 transistor.

114 106 CHAPTER 8. BIPOLAR JUNCTION TRANSISTOR: INVERTING AMPLIFIERS 8.4 Procedure Gotcha! 1. Is the DS335 set to be High-Z? 2. Is the voltage offset of the DS335 set to 0 V? 3. Do you want to use AC or DC coupling on your oscilloscope? If you are interested in seeing a DC offset, then you need to DC couple. If you want to only see the time-varying part of the signal, then you want to AC couple. 4. Recall from lab 2 that at very-low and very-high frequencies, AC coupling may attenuate your signals. 5. Are all of your grounds connected to the same point? Are you grounding out your circuit in the wrong place? 6. Have you reversed the emitter and collector pins on your transistor? 7. Did you measure β of your transistor to make sure that it is ok? 8. If you are using the power busses on your proto-board, have you bridged the gap in the middle? Inverting Amplifier Build a common emitter amplifier with a gain of G = 10 and an output resistance of R C = 4.7kΩ. Use a base bias circuit with an equivalent resistance about 50 times smaller than the input resistance seen at the base. Use V CC = 12V. As indicated below, build the circuit in a modular sequence and check each part before attaching additional pieces. As a reminder, Figure 8.2 shows the pin out for the 2N2222 transistor. 1. Measure the output voltage of your biasing voltage divider without the transistor attached. After attaching to the transistor circuit, measure the DC voltage at the transistor s base and confirm that it is within expectations. 2. Check V C. Is it what you planned (or within the expected range)? 3. Choose an input coupling capacitor large enough to generate a roll-off frequency (f RC ) of 20 Hz.

115 8.4. PROCEDURE 107 Question 8.1 What is the relevant resistance that determines this roll-off? Draw the relevant equivalent circuit and indicate element values. 4. For a 0.1 V peak-to-peak input voltage, v in (t), at a moderate frequency (f 1 khz), sketch (or capture on your scope) the voltages at the base, emitter and collector of the transistor: V B + v b (t),v E + v e (t), and V C + v c (t). 5. For a 0.1 V peak-to-peak input, measure the frequency dependence of the gain and plot your measurements on a Bode plot. Determine the 3dB points (provided you have the frequency range available). In measuring the output voltage, either use AC coupling on your scope or choose an appropriate output blocking capacitor. Question 8.2 Do you think the high frequency roll-off is due to the scope input impedance or is it intrinsic to the transistor circuit (this could include the possibility of stray capacitance in the circuit)? Draw the equivalent circuit for this measurement. 6. Pick a mid-range frequency and determine the input voltage dependence of the gain i.e., is G dependent on v in?. It may help here to view the output alternately using DC and AC coupling on the scope. Use AC to accurately see the signal amplitude and use DC to see the actual collector voltage relative to ground and the supply voltage.

116 108 CHAPTER 8. BIPOLAR JUNCTION TRANSISTOR: INVERTING AMPLIFIERS Question 8.3 What is the maximum input voltage that yields an undistorted output signal? What is it that limits the output? 7. Measure the output resistance of this circuit. Use a mid-range frequency and a mid-range amplitude. To do this, you need to measure two points on an I V curve for the output of the transistor. However, we are going to do this using an AC voltage. One point is the open circuit voltage, while to get a second point on the I V curve, we want to attach a 4.7 kω resistor from the output of the circuit to ground. We then measure the voltage across this known resistor. Question 8.4 Sketch the Thèvenin equivalent as seen at the output of the transistor circuit. If we just attached this resistor, what will happen to the DC voltage, V C? To avoid changing the gain and DC operating point of the circuit, we need to use a blocking capacitor between the output of the circuit and the resistor to ground. This is like what you did for the AC emitter follower. Chooses a sufficiently large capacitor such that it s impedance is small compared to 4.7 kω resistor at the frequency you are using.

117 ƒ ƒ ƒ 8.4. PROCEDURE 109 Question 8.5 Do you see the expected result? In other words, is the output impedance what you expect it to be? Inverting Amplifier With By-Pass Capacitor Now try boosting the gain by placing a by-pass capacitor across R E as shown in Fig. 8.3 (see discussion of Fig in the textbook). As in the previous measurement, this capacitor will not affect the DC operation of the circuit. However, at signal frequencies, the capacitor should effectively short out the emitter resistor R E and the gain becomes G = R C re. Measure the frequency response for this circuit and compare to the lower gain circuit studied above. Make sure that you try to measure both the low-frequency and the high-frequency 3 db points. ð ƒ ÿ V CC R C R 1 ð vi ˆ ƒ ÿ ÿ ò vo C 1 R 2 ÿ R E C ð ƒ ÿý E ƒ ÿ ò ƒ ÿ Figure 8.3: The inverting amplifier with a bypass capacitor. There are several points you need to be aware of before trying this circuit. Read through all four of these points and understand them before starting to the measurements in this section. 1. You have to be careful in determining what C E you need to achieve the desired time constant. The emitter by-pass capacitor sees R E in parallel with [r e in series with the input and biasing circuits]. At signal frequencies, this amounts to [r e + R s /β] r e, R s being the signal source resistance which is 50Ω in our case. Recall that r e 25/I C (ma). You will find that you need quite a large capacitor for the circuit to operate down to 20Hz. 2. The gain may be quite high. If G 200, then a 0.1V input (the minimum the DS335 will generate) would generate a 20V output. With a 12 Volt supply, this won t work. You will need to

118 ƒ ƒ ƒ ƒ ƒ ƒ 110 CHAPTER 8. BIPOLAR JUNCTION TRANSISTOR: INVERTING AMPLIFIERS attenuate the input signal by building an input voltage divider. Put the output of the DS335 into our divider and use the output of this new divider to drive your circuit. To build the divider, use R a = 100Ω resistor in series with R b = 10Ω resistor in order to maintain a low source resistance. This is shown in Figure 8.4. ðv i ð ƒ ÿ V CC R C R a R 1 ÿƒ ˆ ÿƒ ÿ òv o C 1 R b R 2 ÿ R E ƒ ð ƒ ÿ ƒ ÿý C E ƒ ÿ ò ƒ ÿ Figure 8.4: The divided input signal driving your bypassed amplifier. 3. When you have such a small input signal, you may find that the input signal is extremely noisy. If you study this carefully, you are likely to find that it is a 60 Hz signal that is coming in through your 12 V DC power supply. If this is a case, use the large DC supply that was used in lab 1 to provide the DC voltage. You will find that this is probably significantly less noisy. 4. Be sure to observe the proper polarity for the required electrolytic capacitor. Note: you can have better control of the AC gain by using the circuit shown in Figure 8.5. The bypass resistor, R b is some fraction of R E. In this configuration, only some of the emitter resistance is by-passed. ð ƒ ÿ V CC R C R 1 ð vi ˆ ƒ ÿ ÿ ò vo C 1 R 2 ÿ R b R E ð ƒ ÿý ƒ ÿ ò C E ÿ Figure 8.5: The inverting amplifier with a bypass capacitor and a bypass resistor. 8.5 Additional Problems After completing this lab, you should be able to answer the following questions. 1. You will be using a simple voltage divider to bias the base of an npn transistor as shown in the circuit in Figure 8.6. Power is to be supplied using a supply with V CC = 10 V and you are told that R 1 = 8kΩ and R 2 = 2kΩ. The emitter resistor is chosen to be be R E = 675 Ω and the

119 ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ 8.5. ADDITIONAL PROBLEMS 111 collector resistor is taken to be R C = kω. Answer the following questions based on this circuit. (a) Ignoring any loading down of the base that might occur due to R E, what is the base at the emitter of the resistor? (b) Under the same assumptions as in (1), what is the voltage at the collector, V C? (c) What gain, G, would you expect for this circuit? ð ƒ ÿ R 1 R C ÿƒ ÿ ò V C V CC R 2 ƒ ý R E ƒ ý Figure 8.6: The circuit for problem You have built the following inverter amplifier circuit as shown in Figure 8.7. Power is to be supplied using a supply with V CC = 10 V and you are told that the β of the transistor is 100. You also have R 1 = 8kΩ and R 2 = 2kΩ. The emitter resistor is chosen to be be R E = 675 Ω and the collector resistor is taken to be R C = kω. Answer the following questions based on this circuit. (a) Assuming that we want the input to pass 50 Hz signals, what would be a good choice for the value of the input capacitor C 1? (b) What is the maximum amplitude input signal, v in (t) that can be amplified without distortion by this circuit? (c) You now use this circuit to drive a second circuit whose input impedance is R L as shown in the right-hand circuit. Sketch the Thevènin equivalent circuit for the transistor driving the load. What are the values of R th and the DC V th in your diagram? (d) Using your DC equivalents from part (c) and the fact that R L = 3525 Ω, what is the current delivered to the load? ð ƒ ÿ R 1 R C ÿƒ ÿ òv ðv in out V CC C 1 R 2 ƒ ý R E ƒ ý ð ƒ ÿ R 1 R C ÿƒ ÿ ÿ òv ðv in out V CC C R 2 ƒ ý R E ƒ ý R L ƒ ý Figure 8.7: The circuit for problem 2.

120 112 CHAPTER 8. BIPOLAR JUNCTION TRANSISTOR: INVERTING AMPLIFIERS

121 Chapter 9 Introduction to Operational Amplifiers Reference Reading: Chapter 6, Sections 6.1, 6.2, 6.3 and 6.4. Time: Two and one half lab periods will be devoted to this lab. Goals: 1. Understand the use of negative feedback to control amplification 2. Understand the concept of slew rate (a) Be able to define slew rate (b) Be able to measure slew rate (c) Understand how finite slew rate puts limitations on the use of operational amplifiers 3. Be able to design and construct the following op-amp circuits: (a) Voltage follower (b) Inverting amplifier 4. Observe the effect of an op-amp s finite gain 9.1 Introduction In Chapter 6 of our text, we characterized the behavior of op-amps using two golden rules. These rules were based on a number of assumptions which we characterize as ideal op-amp behavior. Not surprisingly, these are only approximations to the actual behavior. In this lab, we will explore the limits of real op-amp behavior The Open-loop Gain of an Op-amp In Section 6.3 of the textbook, we noted that the open-loop gain, A 0, of an op-amp relates the output voltage to the difference of the non-inverted and inverted inputs as v o = A 0 (v + v ). (9.1) 113

122 114 CHAPTER 9. INTRODUCTION TO OPERATIONAL AMPLIFIERS We also noted that A 0 tends to be very large, so equation 9.1 needs to be modified to include the so-called rails given as V CC and V EE which are used to supply external power to the op-amp. This adds the following qualifications to our output voltage. v o = V EE if A 0 (v + v ) < V EE v o = V CC if A 0 (v + v ) > V CC However, we also saw in Section 6.4 of the textbook that the open-loop gain is actually frequency dependent and falls off at high frequency. Thus, we have A(f) in our equation which yields that v o = A(f) (v + v ). (9.2) This means that if the frequency is high enough, we can directly measure A(f) for sufficiently small signals. These small-signal measurements can the be used to determine the high-frequency open-loop gain, A(f), of an op-amp (i.e., the differential gain). However, there is some analysis necessary to see how we can accomplish this. As we walk through this here, it is important that you understand all the steps involved. þ ðv in ƒ ÿ òvo ƒ Figure 9.1: A simple op-amp voltage follower circuit. The output voltage of our op-amp is given by equation 9.2. The relation between the op-amp s open loop gain A(f) and the actual gain of the circuit G(f) depends on the negative feedback loop in the circuit. We will look at this in the case of a simple voltage-follower circuit as shown in Figure 9.1. In this circuit, the input signal v in is connected to the non-inverting input (v + ) of the op-amp. The output signal, v o, is fed back directly into inverting input of the op-amp, v. Thus equation 9.2 can be written as From this, we can write that the gain of our circuit is given as v o = A(f) (v in v o ). (9.3) G(f) = v o v in. Combining this with our earlier expression we have that the frequency-dependent gain is given as G(f) = A(f) A(f) + 1. (9.4) Since we experimentally measure the gain, G(f), it is convenient to invert this equation to express the open-loop gain, A(f) in terms of the circuit gain. This gives us that A(f) = G(f) 1 G(f). (9.5) Now, we need to keep in mind that both G(f) and A(f) are complex. To determine A(f), we will write G in terms of its magnitude G(f), and phase φ(f) G(f) = G(f) e jφ(f). (9.6)

123 9.1. INTRODUCTION 115 From this, we can write that A(f) A (f) = ( G e jφ ) ( G e jφ) (1 G cos φ j G sin φ) (1 G cos φ + j G sin φ). This can be simplified to yield that A(f) 2 = G 2 1+ G 2 cos 2 φ+ G 2 sin 2 φ 2 G cos φ and from this, we find that the open-loop gain is given by A(f) = G 1 + G2 2G cos φ. (9.7) The Gain of an Op-amp Amplifier In the previous section, we used an emitter-follower circuit to investigate the open-loop gain of an opamp. A slight variation on this is shown in Figure 9.2 where we ground the non-inverting input, and then connect the input signal to the inverting input via an input resistor, R i. The output signal is then fed back into the inverting input via a feed-back resistor, R f. Using the simple op-amp rules, we find that the gain of this circuit is given by ðv in G = R f R i. (9.8) R f ƒ ÿƒ R in ƒ ý ÿ òvo Figure 9.2: The inverting voltage amplifier circuit. Because of the limits in op-amp behavior, the simple analysis that yielded the above gain will need to be modified in a real-world measurement of the gain of the inverter circuit. To understand what you would see in measurements of the gain, we need to go beyond the zeroth order analysis for op-amps. In the calculations leading to equation 9.8, we assumed that the gain of our op-amp (A) was infinite, or very large. This led to the above gain for our circuit which we will refer to as G, so we have that G = R f R in. (9.9) We now admit that the op-amp s gain is not infinite, but we retain the approximation that the input resistance is still very high. Thus, we can approximate the op-amp behavior by saying that no current can flow into either input of the op-amp. From Figure 9.2, we have that v + = 0 as it is connected to ground. Now in this approximation, we will not apply our op-amp rule that v = v +, but rather note that there is some small, non-zero voltage,

124 116 CHAPTER 9. INTRODUCTION TO OPERATIONAL AMPLIFIERS v, at the inverting input. The output voltage, v o, is then given as the open-loop gain, A, times the difference in the input voltages Because v + is zero, we have that v o = A(ω) (v + v ). (9.10) This can be solved for the voltage at the inverting input to give us that v o = A(ω) v. (9.11) v = v o A(ω) where, A(ω) is the complex open-loop differential gain of the op-amp. We can also analyze the currents in the circuit. From the input, we have that (9.12) i in = v in v R in, (9.13) and since no current flows into the op-amp, all this current must go through the feed-back resistor to the output i f = i in. (9.14) The feed back current can be related to the potential difference across the feed-back resistor, and can be written as i f = v v o R f. (9.15) This is where we continue to assume that the input impedance is very large ( ). We can now substitute for our unknown v, and the collect all the terms that include v o. Doing so, we find ( Rin v in = v o + 1 R f A(ω) + 1 ) R in. (9.16) A(ω) R f We now note that the actual gain is defined as G(ω) = v o v in (9.17) and recalling our definition of G from equation 9.9, we find that ( ) A(ω) G(ω) = G. (9.18) A(ω) + G + 1 As long as A >> G, then we have that G = G, as we found from our simple calculation. However, as A becomes less than G, the gain, G becomes limited by the open-loop gain. We get which in our limit is G(ω) = A(ω) 1 + 1/G (9.19) G(ω) A(ω). (9.20) This is almost independent of the intended G when this number is large. This is the result you should observe at high frequency. What you have measured is G(ω) which should become equal to A(ω) at high frequency. You should see that each circuit becomes limited by A(ω) at a different frequency. The product of the infinite gain and the 3 db frequency is known as the gain-bandwidth product.

125 ƒ R f ÿƒ R in ÿ ò vo ƒ ý 9.2. PRELIMINARY LAB QUESTIONS 117 ð vin Figure 9.3: The inverting amplifier circuit. 9.2 Preliminary Lab Questions The work in this section must be completed and signed off by an instructor before you start working on the lab. Do this work in your lab book. 1. Write down the two Golden Rules of op-amp operation. 2. Look at Figure 9.3. What must the voltage at the negative input of the op-amp be? What is the voltage drop across R in? What is the voltage drop across R f?

126 118 CHAPTER 9. INTRODUCTION TO OPERATIONAL AMPLIFIERS 9.3 Equipment and Parts In this lab we will utilize the following equipment. This equipment is located at your lab station. 1. The Tektronix TDS 2012B digital oscilloscope. 2. Two P2220 probes for the oscilloscope. 3. One USB memory stick. 4. The Stanford Research Systems DS335 signal generator. 5. One BNC to alligator cable. 6. The Metex 4650 digital meter. 7. The Global Specialities PB10 proto-board (see Appendix A for a description). 8. The PRO-LAB power brick and bus connector (part of the PRO-PS-LAB kit). You will also need the following components in order to carry out this lab. It makes more sense to get them as you need them, rather than all at once before the start of the lab kω resistor kω resistor. 3. One 411 OpAmp 4. One 741 OpAmp 5. Additional resistors and capacitors you choose to match your circuit designs. 9.4 Procedure Gotcha! 1. Is the DS335 set to be High-Z? 2. Is the voltage offset of the DS335 set to 0 V? 3. Is the current limit turned to the maximum value on your DC power supply? 4. Do you want to use AC or DC coupling on your oscilloscope? If you are interested in seeing a DC offset, then you need to DC couple. If you want to only see the time-varying part of the signal, then you want to AC couple. 5. Recall from lab 2 that at very-low and very-high frequencies, AC coupling may attenuate your signals. 6. Are all of your grounds connected to the same point? Are you grounding out your circuit in the wrong place? 7. Have you supplied power to your op-amp (V CC and V EE )? 8. If you are using the power busses on your proto-board, have you bridged the gap in the middle?

127 9.4. PROCEDURE The 741 and 411 Op-amps For reference, the pin configuration for the 741 and the 411 op-amps is shown below. You will use the proto-board power supply to power the op-amp, we will have V CC = +12 V and V EE = 12 V. You should compare your results to the specifications for the op-amps available in your textbook. Offset v_ v No Connection V CC v out V EE 4 5 Offset Figure 9.4: The pin connections for the 741 and the 411 op-amp Voltage Follower Use a 741 op amp to build a voltage follower as in Fig Note that, as is conventional, the power pin connections, +V CC and V EE, are not indicated on the diagram (but you need to include them) and þ we use no connection to the offset null pins. ð vin ƒ ÿ ò ƒ vo Figure 9.5: The voltage follower circuit. Slew Rate: Start by investigating one of the serious limitations of many op-amps: the slew rate. The slew rate is the maximum rate at which the output voltage can change. (Typical units would be volts per microsecond.) The effect of an op-amp s slew rate limitation is illustrated for two output waveforms in Fig Measure the slew rate of the 741 by using a square wave input and observing the output of the follower. At an input amplitude of, say, V pp = 5 V, the output square wave will not change abruptly, but will change to the new value by a straight line with finite slope. The slope of the line gives the slew rate. You will have to adjust the DS335 square wave period (and scope time scale) to find where you can observe this phenomenon.

128 120 CHAPTER 9. INTRODUCTION TO OPERATIONAL AMPLIFIERS (a) slope = slew rate output if not slew-rate limited (b) slope = slew rate Slope limited by op-amp maximum slew rate Figure 9.6: Slew rate limitations illustrated for square wave and sinusoidal wave inputs to an op amp. Question 9.1 Are the slew rates on the rising and falling edge of the square wave the same? 2. To understand the connection between slew rate and frequency response, calculate the maximum rate of change of a sinusoidal voltage, v(t) = V cos ωt. Use this result to find the relation between amplitude and frequency for which this maximum rate of change equals the 741 s slew rate.

129 9.4. PROCEDURE 121 Question 9.2 What is the maximum frequency (in Hz) you can use without encountering slew rate distortion if the signal is 5 V peak-to-peak? If it is 1 V? If it is 0.1 V? 3. Make the same measurements for the 411 op-amp and compare to the 741. Gain: It is difficult to measure the open loop gain of even the 741 op-amp because it is so large. However, at high frequencies, the open-loop gain rolls off and becomes measurable. 1. Compare the input and output voltages a follower built using the 741 op-amp over the entire frequency range of the DS335. Use an input of V pp = 0.1 V. Make a Bode plot of the gain, G(f), and a plot of the phase shift, φ(f), between input and output signals. Question 9.3 Why might we want to use a small input voltage for this measurement? 2. Observe the effect of larger input voltages. You should see distortion in the output at high frequencies when the input signal exceeds the slew rate. 3. Repeat the previous measurements using the 411 op-amp. From the above small-signal measurements, you can determine the high-frequency open-loop gain, A(f) of the 741 (i.e., the differential gain), but some analysis is required. Refer to Section for details of this analysis. For both the 741 and the 411 op-amps, make a Bode plot of A(f) in the region where you can measure it from (9.5) or (9.7), when G 1 and φ 0, A is large and difficult to measure quantitatively) and determine the slope of the straight line that best fits the high frequency region of the results. Find the frequency, f T at which the magnitude of the open loop gain A(f) is unity.

130 122 CHAPTER 9. INTRODUCTION TO OPERATIONAL AMPLIFIERS Follower Input and Output Impedances: It is also difficult to measure either the input or output impedances of this circuit. Use the 411 op-amp for the following. You do not need to carry out these measurements using the To show that the output impedance is small, observe the gain at f = 1 khz with an output load of 10 Ω. Note that the maximum output current of the 411 is about 20 ma, so limit the output voltage to less than 200 mv. Question 9.4 or small? Can you calculate the output impedance from this measurement? Is it large 2. To demonstrate the large input impedance, insert an 8.2 M Ω resistance in series with the input and compare the gain at f = 1 khz to that measured with a direct input from the DS335. Question 9.5 What does this say about the input impedance of the follower? The Inverting Amplifier Here, you will construct and test two inverting amplifier circuits, one with gain, G = 10 and one with G = 100. The tests include determination of the DC gain (for the G = 10 case only) and a comparison of the frequency responses of the two circuits (these will also be compared to that of the voltage follower measured previously). You will use a fixed input resistance of 1 kω and the only the 741 op-amp. The zeroth-order analysis of the circuit shown in Fig. 9.7 goes as follows:

131 ƒ R f ÿƒ R in ÿ ò vo ƒ ý 9.4. PROCEDURE 123 ð vin Figure 9.7: The inverting voltage amplifier circuit. 1. The op-amp gain is infinite, its input resistance is infinite. Then, the feedback resistance must keep the inverting input at ground. Thus, i in = v in /R in = i f = v o /R f. The minus sign indicates that v o must be below ground for positive v in in order for the current to flow from ground (v ) to v o. 2. The above equations can be solved for the gain to yield that G = v o v in (9.21) G = R f R in. (9.22) 3. Of course, you want to use an input resistor which is larger than your source resistance. 4. Within the limitations of the op-amp to supply current and voltage, the output resistance is very low as before. Design and build the G = 10 amplifier: 1. Measure the DC output voltage as you vary a DC input voltage. Vary the input so as to make the output cover the full range of ±12V. The slope of this plot yields the DC gain. Question 9.6 voltages? Does your plot pass through the origin? Does the output reach the supply

132 124 CHAPTER 9. INTRODUCTION TO OPERATIONAL AMPLIFIERS 2. Measure and make a Bode plot of the frequency response of your amplifier (you only need to measure the amplitude response, not the phase shift). Keep in mind, and avoid, the slew rate limitation of the 741 op amp. Plot 20 log G(ω) on scales which will allow you to add the G = 100 measurements you will do next. Build the G = 100 amplifier: 1. Measure the frequency (amplitude) response of your amplifier. Add these data to the plot you began above. Your measurements are likely to show that the gain does not follow this ideal behavior, but rather what is discussed in Section Quantitatively compare your measurements with the expectations. Question 9.7 What is the gain-bandwidth product for each of your circuits from above? 2. Make a single Bode plot that contains the results for both your 10 and 100 circuits and the open-loop gain that you measured. Question 9.8 Discuss what you observe on this Bode plot. Does what you observe make sense in terms of the previous discussion?

133 9.5. ADDITIONAL PROBLEMS Additional Problems After completing this lab, you should be able to answer the following questions. 1. You have set up a simple follower circuit to measure the behavior of an op-amp in the lab. (a) Sketch a follower circuit that you can build to study the behavior of your op-amp. (b) You use a square wave as an input to your follower circuit and measure the output voltage. Figure 9.8 shows the input signal coming in at 5 V, and then dropping very rapidly to 0 V at a time of 0.6 µs. The measured output voltage is then shown as the dashed line. What is the slew rate of your op-amp? (c) You now use a sinusoidal input voltage v in which yields the sinusoidal output voltage v out as shown in the figure. Based on this data collected at a frequency of f = 500 k Hz, what is the open-loop gain, A(f) for your op-amp? Voltage [V] 5 vin vout Voltage [V] 1 0 vin vout Time [µs] Time [µs] Figure 9.8: Data to measure slew rates (left) and the open-loop gain (right) in problem You are given an op-amp with f T = 1 M Hz and told that the open-loop gain follows the standard 20 db/decade fall off. You use this op-amp to build a times one hundred inverting amplifier. (a) Sketch the circuit to carry out this amplification show the values of any external components that you will use. (b) What is the input, Z in, and output, Z out, impedance of your circuit? (c) At what frequency will the gain of your amplifier circuit hit the open-loop gain of the op-amp?

134 126 CHAPTER 9. INTRODUCTION TO OPERATIONAL AMPLIFIERS

135 Chapter 10 Operational Amplifiers with Reactive Elements Reference Reading: Chapter 6, Sections 6.5 and 6.6. Time: Two and one half lab periods will be devoted to this lab. Goals: 1. Be able to design and construct the following op-amp circuits: (a) Integrator (b) Differentiator (c) Logarithmic amplifier 10.1 Introduction All the circuits here are based on the inverting amplifier configuration of the last lab. However, we find here that we can make circuits that perform mathematical functions (integrators and differentiators) that are far superior to the passive circuits built in lab 4. To obtain the best functionality, we use the 411 op-amp. In Figure 10.1 we show a generalized inverting amplifier circuit, where impedances Z in and Z f replace the resistances R in and R f that we studied before. Through the same arguments as earlier, we have that the gain of this circuit is just G = Z f Z in. (10.1) In the following, we specify the two impedances as a resistor and a capacitor and study the resulting circuit behavior The Integrator We will first consider the simple integrating circuit shown in Figure For this circuit, the inverting input, v, is a virtual ground because the op-amp golden rules tell us v = v +. The second golden rule (no current into the inputs) tells us that the current through R in also goes through C f. Thus i = dq C /dt = v in /R in. Since Q = C f v o, we get 127

136 ƒ ƒ Z ÿƒ f ÿò v o ÿ ƒ ý 128 CHAPTER 10. OPERATIONAL AMPLIFIERS WITH REACTIVE ELEMENTS ð v in Z in Figure 10.1: Idealized circuit for the generalized inverting amplifier. or C f dv o dt v o (t) = 1 R in C f = v in R in (10.2) t 0 v in dt (10.3) This time domain treatment shows that the output is 1/(R in C f ) times the integral of the input voltage. It is also instructive to consider the behavior in the frequency domain. First note that a time-dependent signal can be written as the sum of sinusoidal signals ( ) v(t) = Re V N e jω N t. (10.4) N The integral of the signal has the form ( ) v(t)dt = Re (jω N ) 1 V N e jω N t. (10.5) N Thus, to form the integral of a general waveform, we need a magnitude response that scales as 1/ω and that has a 90 phase shift over the relevant frequency range. Since the gain of the generalized inverting amplifier (shown in Fig. 10.1) is ð v in G = Z f /Z in, (10.6) C ÿƒ f R in ÿò v o ÿ ƒ ý Figure 10.2: The idealized circuits for the integrator circuit.

137 ƒ INTRODUCTION 129 the gain of the circuit shown in Fig is just (jωr in C f ) 1, so we see that each term is weighted by the (jω N ) 1 factor required in (10.5) to give the Fourier components of the integral. This again shows that the output is proportional to the integral of the input with the same 1/(R in C f ) proportionality factor as above The Differentiator The gain of the circuit shown in Figure 10.3 is computed as before from the generalized inverting amplifier. G(ω) = Z f /Z in = jωr f C in (10.7) Using (10.4), dv dt ( ) = Re (jω N ) V N e jω N t, (10.8) N so to take the derivative, we need to multiply each Fourier coefficient by its frequency, ω, and introduce a 90 phase shift. The factor of jω in (10.7) shows that the circuit does exactly that. Thus the circuit in Fig is a differentiator. You may wish to prove to yourself (or see your class notes) that a time-domain treatment of the circuit gives the same results. ð v in R ÿƒ f C ÿò v in o ÿ ƒ ý Figure 10.3: The Idealized circuit for the differentiator circuit. Complications. In practice, both these idealized circuits suffer from a similar problem. For the integrator, we must realize that the input signal is likely to have a small DC offset. Even a very small DC current will charge up the capacitor and cause the op-amp to reach its maximum output voltage within a short time period. For a frequency domain treatment of this problem, remember the gain of the integrator is (jωrc) 1. Thus any non-zero DC input (which corresponds to ω = 0) will have infinite gain for an idealized op-amp. In reality, this means the op-amp output will reach its maximum voltage very quickly. A practical op-amp integrator circuit must be modified to keep the gain finite at low frequencies. Similarly, the idealized differentiator has a gain of jωrc that becomes large at high frequencies. This is both very difficult to achieve and makes the circuit subject to high frequency noise. A practical circuit will cut off the divergence of the gain at large ω so that the output is not dominated by high frequency noise. The op-amp open-loop gain, A(ω), will eventually reduce the gain at high frequencies. This implies that there is a peak in the gain somewhat like that in a resonant circuit. The circuits you build in the following sections will demonstrate, at least to some extent, how to cope with these problems.

138 ƒ 130 CHAPTER 10. OPERATIONAL AMPLIFIERS WITH REACTIVE ELEMENTS The Logarithmic Amplifier The circuit shown in Fig can be used to make a crude logarithmic amplifier. Such a circuit is a non-linear circuit which means that a sinusoidal input signal will not generate a sinusoidal output signal. Because of this, we cannot carry out a frequency-domain analysis, and instead are restricted to studying the circuit in the time domain only. To understand why the output behaves as the log of the input, remember that the diode s I-V curve can be approximated as where the thermal voltage, V T, is given as I = I S (e V/V T 1) V T = k BT e and is approximately 25 mv at room temperature. The saturation current, I S, is the small reverse current that flows when a diode is reverse biased. In fact, the above expression is not quite right. The correct expression was first obtained by Shockley and includes an emission coefficient m which varies in value between 1 and 2. The Shockley expression is then given as I = I S (e V/mV T 1). (10.9) For a forward-biased diode, we generally have that V > V T, so the exponential term is large in comparison to 1 and we can write (to high accuracy) that I = I S e V/mV T. (10.10) We can solve equation for the voltage drop across the diode as a function of the current through the diode, and then applying our op-amp rules, we can obtain an expression that relates the input and output voltages. ( ) vin v out = m V T ln (10.11) R in I S ƒ ð v i ÿ R i ÿ ò v o ÿ ƒ ý Assuming that we know V T, we can extract both m and I S from a measurement of this circuit. Figure 10.4: A logarithmic amplifier circuit utilizing a diode for feedback Preliminary Lab Questions The work in this section must be completed and signed off by an instructor before you start working on the lab. Do this work in your lab book.

139 10.3. EQUIPMENT AND PARTS Derive equation from equation and you basic rules of op-amp performance Equipment and Parts In this lab we will utilize the following equipment. This equipment is located at your lab station. 1. The Tektronix TDS 2012B digital oscilloscope. 2. Two P2220 probes for the oscilloscope. 3. One USB memory stick. 4. The Stanford Research Systems DS335 signal generator. 5. One BNC to alligator cable. 6. The Metex 4650 digital meter. 7. The Global Specialities PB10 proto-board (see Appendix A for a description). 8. The PRO-LAB power brick and bus connector (part of the PRO-PS-LAB kit). You will also need the following components in order to carry out this lab. It makes more sense to get them as you need them, rather than all at once before the start of the lab kω resistor. 2. One 411 OpAmp 3. One 741 OpAmp 4. One 1N 4004 diode. 5. Additional resistors and capacitors you choose to match your circuit designs.

140 132 CHAPTER 10. OPERATIONAL AMPLIFIERS WITH REACTIVE ELEMENTS 10.4 Procedures Gotcha! 1. Is the DS335 set to be High-Z? 2. Is the voltage offset of the DS335 set to 0 V? 3. Is the current limit turned to the maximum value on your DC power supply? 4. Do you want to use AC or DC coupling on your oscilloscope? If you are interested in seeing a DC offset, then you need to DC couple. If you want to only see the time-varying part of the signal, then you want to AC couple. 5. Recall from lab 2 that at very-low and very-high frequencies, AC coupling may attenuate your signals. 6. Are all of your grounds connected to the same point? Are you grounding out your circuit in the wrong place? 7. Have you supplied power to your op-amp (V CC and V EE )? 8. If you are using the power busses on your proto-board, have you bridged the gap in the middle? The 741 and 411 Op-amp Pinouts For reference, the pin configuration for the 741 and the 411 op-amps is shown in Figure Offset v_ v No Connection V CC v out V EE 4 5 Offset Figure 10.5: The pin connections for the 741 and the 411 op-amp Integrator As discussed above, in the frequency domain, integration amounts to division by jω. We do not want to integrate any constant or DC part of the input signal (or any output offset in the op-amp), so we set a maximum gain or cut-off to the (jω) 1 dependence. This is done by introducing the resistor R f in parallel with the feedback capacitor C f as shown in Fig For ωr f C f 1 the feedback impedance is (jωc f ) 1 so the circuit behaves as an integrator. For ωr f C f 1 the feedback impedance goes to R f, so the gain approaches R f /R i instead of diverging.

141 ƒ ƒ ƒ C ÿ f R f ÿ R in ÿ ò v o ÿ ƒ ÿ ƒ ý PROCEDURES 133 ð v i Figure 10.6: A practical integrator circuit including feedback resistor R f to introduce a low frequency cutoff. 1. Choose R f. Use an input resistance R in = 1kΩ. (Smaller values would reduce the input impedance and larger values would make the following steps more difficult.) Once R in is fixed, the DC gain is determined by the value of R f. If the gain is to decrease with increasing frequency, it is best to have large factor multiplying the (jω) 1 i.e., the low frequency gain should be large. Pick R f so that the DC gain is Choose C f. Suppose you want to integrate an input signal whose fundamental frequency is 50 Hz or greater. Choose an appropriate value of C f so that the circuit will act like an integrator down to about 50 Hz. Compute and sketch the expected form of the frequency response (magnitude) curve, G(ω) (at this point, you shouldn t have to do a complete calculation to sketch this curve!). 3. Build the circuit using the 411 op-amp. 4. Verify that the frequency response of the circuit goes as 1/f in the appropriate frequency range. Does your measured phase difference also agree with your expectations? Note that you can also think of this as a low pass filter but one with gain, in contrast to the passive RC circuit studied earlier. 5. Use a square wave input with a fundamental frequency above the 3 db point and show that the output resembles the integral. Try other available waveforms. What happens when the input signal frequency becomes too low? Question 10.1 In what ways is the performance of this circuit improved over the purely passive circuit that we studied in lab 3.?

142 ƒ ƒ R f ð v in ÿ R in C ÿ ò v in o ÿ ƒ ý 134 CHAPTER 10. OPERATIONAL AMPLIFIERS WITH REACTIVE ELEMENTS Figure 10.7: A practical differentiator circuit including input resistor R in to introduce high frequency cutoff Differentiator Differentiation corresponds, in the frequency domain, to multiplication by jω. Now we have increasing gain as the frequency increases. As you have seen before, the increasing gain will be cut off by the op-amp gain at some point. It is best to have the cut-off determined by external elements instead. High gain at high frequency may also cause slew rate problems for this circuit. By introducing the input resistor R in (Fig. 10.7), the gain at high frequencies is reduced to R f /R in. 1. Choose R in,c in, and R f. In this case, referring to the circuit in Fig. 10.7, we want to set the high frequency gain to be high. Set this gain to be 100 and the minimum input impedance to be 1 kω. Set the upper frequency for differentiation to be 5 khz (this is also the -3 db point of the high pass filter). Again, compute and sketch the expected shape of the frequency response. 2. Build the circuit shown in Fig using the 411 op-amp. 3. Measure the frequency response (magnitude and phase), over the relevant frequency range. Does the circuit work as designed? Discuss reasons for any deviations from your expectations. 4. Differentiate both a square wave and a triangle wave. For the triangle wave, quantitatively compare with the expected amplitudes of the derivative. Vary the fundamental frequency of the input waves and observe the circuit limitations at low and high frequencies. You may observe a ringing response to the square wave; compare the period of the ringing to the characteristic time determined by your frequency response curve. Question 10.2 In what ways is the performance of this circuit improved over degraded over the purely passive circuit that we studied in lab 3.? 5. Replace the 411 op-amp with the 741 op-amp and repeat your Bode-plot measurements from above.

143 ƒ PROCEDURES 135 Question 10.3 Is the performance of this circuit with the 741 consistent with what you would have expected? Explain why or why not Logarithmic Amplifier We will now assemble the circuit shown in Figure 10.8 to make a crude logarithmic amplifier. The 100 kω resistor from the non-inverting input to the ground helps make the circuit more stable, even though it appears to be doing nothing. If you circuit is working correctly, a plot of the output voltage versus the natural log of the input voltage should yield a straight line. ƒ 1N4004 ð v i ÿ 1 kω ÿ ò v o ÿ ƒ 100 kω ƒ ý Figure 10.8: The logarithmic amplifier circuit. 1. Build the circuit shown in Fig using the 411 op-amp. 2. Use your Metex meter and the small variable DC voltage source to measure the response of the circuit. 3. Make a plot of v out versus ln (v in ) and use this to extract values for the parameters m and I S in the Shockley equation.

144 ƒ 136 CHAPTER 10. OPERATIONAL AMPLIFIERS WITH REACTIVE ELEMENTS Question 10.4 Are the values that you extracted for m and I S reasonable? 10.5 Additional Problems After completing this lab, you should be able to answer the following questions. 1. Consider the circuit shown in Figure 10.9 which is built from four resistors and an op-amp. (a) In terms of v in, v out, R 1 and R 2, what is the voltage at the non-inverting input to the op-amp (v + )? (b) In terms of v in, v out, R 1 and R 2, what is input current to the the circuit (that current coming in the line labeled connected to v in )? (c) In terms of v in, R 1 and R 2, what is the output voltage (v out ) of the circuit? (Continue on the back if needed.) ƒ R ÿ 2 ðv in R 1 R 1 ƒ ƒÿ ƒ ÿ òvout R 1 ƒ ý Figure 10.9: The circuit for problem You are asked to build the op-amp circuit shown in Figure below. The circuit uses a pair of matched resistors, R, and a pair of matched capacitors, C, and for convenience, we define the characteristic frequency to be ω RC = 1 RC. (a) In terms of ω RC, what is the feed-back impedance, Z f of your circuit? Express your answer in the form Z f = R (a + jb) 1. (b) In terms of ω RC, what is the input impedance, Z i of your circuit? Express your answer in the form Z i = R (a + jb). (c) At ω = ω RC, what is the gain

145 ƒ ADDITIONAL PROBLEMS 137 of your circuit? Express your answer in terms of a magnitude G and phase φ G in the form G = G e jφ G. (d) In the limit where ω RC ω, what is the gain of your circuit? Express your answer in terms of a magnitude G and phase φ G in the form G = G e jφ G. (e) In the limit where ω RC ω 0, what is the gain of your circuit? Express your answer in terms of a magnitude G and phase φ G in the form G = G e jφ G. (f) Under what conditions would we need to worry about this circuit running into the open-loop gain of our op-amp? C ƒ ƒ R ðin R C ÿ ò v o ÿƒ ÿ ÿ v ƒ ý Figure 10.10: The op-amp circuit for problem 2.

146 138 CHAPTER 10. OPERATIONAL AMPLIFIERS WITH REACTIVE ELEMENTS

147 Chapter 11 The Transition from Analog to Digital Circuits Reference Reading: Chapters 6 and 7, Sections 6.8, 7.1, 7.2, 7.3 and Time: Two lab periods will be devoted to this lab. Goals 1. Be able to design and construct the following circuits: (a) A Summing Amplifier (b) A Digital to analog converter (c) A Transistorized logic switch (d) An Op-Amp Comparator and a Schmitt Trigger 11.1 Introduction In this lab, we will connect the analog world in which we have been working to the world of digital circuitry. For analog circuits, we are often concerned with the value of the voltage at an output. This voltage can be a function of both the frequency and the magnitude of the input voltage. For digital circuits, the inputs and outputs take on two discrete values. We associate these values with either a 0 for the lower voltage and an 1 for the higher voltage (also known as false and true ). These two levels are then used to represent information Digital Level Schemes As discussed in our textbook (see Section 7.4), there are several different level schemes for associating voltages with information. For the circuits that we build in this course, we will usually have components that ar 5 V CMOS. For this family, any output voltage that is less than 0.5 volts is interpreted as meaning 0, while any output voltage between 4.85 and 5.00 V is interpreted as 1. Voltage levels between these are not defined and will be avoided. The standard also defines the meaning of input voltages. These are a bit looser than the output with any voltage between 0 and 1.5 V being interpreted as a 1, and any voltage from 3.5 to 5.0 V is interpreted as a 1. In digital circuitry, each input or output of the circuit represents a bit of information. The bit can only represent information which can be categorized as 0 or 1, false or true or the answer to to questions such as Has a button been pushed? or Is a switch in the ON position? With the use of several 139

148 ƒ 140 CHAPTER 11. THE TRANSITION FROM ANALOG TO DIGITAL CIRCUITS binary bits, we can represent numbers. For example, three bits can be used to represent any number from 0 to 7, while four can represent numbers from 0 to 15. In the following we list the equivalents of 3-bit binary and decimal. 3 bit binary decimal Analog circuits can never be exact. For example, if you build an amplifier designed to produce an output voltage which is ten times its input voltage, the output will never be exactly ten times the input voltage. Furthermore, if you attempt to build two identical circuits, they will not produce exactly the same results because of small differences in the components. Digital circuitry does not have this problem. It is quite easy to build a circuit which takes a binary word as input and produces a binary output number which is exactly ten times the input number. If we build two identical (properly designed) circuits, they will produce identical results (we might find output bit 1 at 4.4V in one circuit and output bit 1 at 4.8V in the other circuit, but both of these represent TRUE or 1, so we consider this the same output) The Op-amp Adder Circuit An important starting point for us is an op-amp circuit that can add two inputs. An example of such a circuit is shown in Figure Two inputs, V 1 and V 2 are connected through resistors to the inverting input of the op-amp. The output can be shown (see Section of your textbook) to be which for the case of R 1 = R 2 = R f yields that V out = R f R 1 V 1 R f R 2 V 2, (11.1) V out = (V 1 + V 2 ). (11.2) Thus, we have a circuit that can add two input voltages together. We also note that this circuit can be extended to any number of input voltages, with the op-amp summing all of them. R 1 V V ƒ ó 1 ƒ ó 2 ƒ R 2 R f ƒ ƒ ÿ ò V out ƒ ý Figure 11.1: The simple summing amplifier The Digital to Analog Convertor We will now use our summing amplifier as the basis of a circuit that can convert a digital signal to an analog output. This circuit combines the the R 2R ladder that we saw in lab 1 to create a set of

149 ƒ ƒ INTRODUCTION 141 ð V 0 1 ÿ ÿ ƒ 2 V V 0 R R 2R 2R ý òý ƒ "ð òý ÿ ƒ ƒ ÿ2r ƒ ÿ ò ý V o 2R "ð Figure 11.2: A simple two-bit digital to analog converter. voltages that are each a factor of two smaller than the next. This is shown in the upper right part of the circuit in Figure 11.2 where the voltage at the two intermediate points are 1 2 V 0 and 1 4 V 0. We now use these two points as inputs to an adder circuit as shown in Figure Using a pair of switches to connect the input voltages to the adder, we can have four possible input voltages to our circuit. In the state shown in the figure, both inputs are connected to the adder through resistors 2R, and the same resistor is used for feedback. In this configuration, the output will be V o = 3 4 V 0. If we switch out the first input, then the output will be 1 4 V 0, and having only the first connected gives an output of V o = 1 2 V 0. Thus, depending on the switch settings, we can have analog output voltages of V o = 0, 1 4 V 0, 1 2 V 0 and 3 4 V 0. This op-amp circuit is known as a digital to analog converter or a DAC. It is also possible to build a circuit (with comparators) that will take an analog input and deliver a digital output. This reverse-dac is known as an analog to digital converter or simply an ADC The Transistor Switch We will now look at the building blocks that allow us to construct digital circuits. The first step in moving to digital circuits is to build a simple electronic switch which can represent a bit of information. To be useful this switch should yield one of two output voltages that are essentially equal in magnitude to the same two input voltages. That is, we want to process logical a 1 as one voltage and a logical 0 as another. We want to build logic circuits that combine inputs to yield answers to questions such as: Are all inputs high? (an AND circuit) or: Is at least one input high? (an OR circuit). A logical 1 should be the same voltage throughout the circuitry. ð V i V CC = 5 V R C ò V o R B ƒ ý Figure 11.3: A transistor is used to build a simple binary switch. The circuit shown here will invert the input. A high input signal will produce a low output, while a low input will produce a high output.

150 142 CHAPTER 11. THE TRANSITION FROM ANALOG TO DIGITAL CIRCUITS As an example, we will build a two-state transistor switch using a bipolar junction transistor. The circuit is either in the non-conducting state or off or in the fully-conducting saturated state, or on. In our circuit shown in Figure 11.3, an +5 V input voltage will produce a 0 V output, while a 0 V input will produce a +5 V output. Such a circuit is known as an inverter, as the output is the complement of the input. Similar switches can, and usually are built using FET/JFET/MOSFET transistors. We can also build more complicated logic circuits by using more than one transistor. A simple nan gate can be built as shown in Figure 11.4 where the two inputs, V a and V b are combined to yield the output, V o. If both the inputs are +5 V, then both transistors are conducting and the output is pulled to 0 V. If either transistor has a 0 V input, then the corresponding transistor is off and neither transistor will be able to conduct. This will leave the output voltage at +5 V. Thus we have a nand gate. To make an and gate out of this, we need to use a third transistor as an inverter to flip the output, feeding the output of our circuit into our transistor switch in Figure ð V a +5 V ó R C ò ÿƒ V o R B ƒ R B ƒ ý ð V b +5V ó R C ð V a R B ý ÿƒ ÿ ò ƒ V o ð V b R B ƒ ý Figure 11.4: The left-hand circuit shows a simple two-transistor nand gate while the right-hand circuit shows a nor gate built using two transistors. In addition to the nand gate that we described above, it is also possible to build a nor gate with two transistors. We show an example of this in the right-hand circuit in Figure In this circuit, either transistor having a high input will cause the output to go low. The output will only be high when both inputs are low, and both transistors are off. As with the nand we can turn the nor into an or by feeding the output into an inverter Comparators Simple Comparators Next, we want to be able to take an analog signal such as the output of some detector or sensor, and ask a binary question of it. In particular, has the signal reached some pre-set threshold level? This operation is performed with a comparator which we discussed in Section 6.8 of our textbook. As noted in our text, the simple comparator circuit is shown in Figure The reference voltage, V r, against which v in is compared, is set using the potentiometer. If v in is smaller than V r, the the output of the op-amp will be V CC, while is v in is larger than V r, the output will be V EE. In the left-hand circuit in Figure 11.5 is shown a simple op-amp based comparator circuit. In our textbook, we noted that the output of this simple comparator can be very sensitive to noise on the input signal. In particular, when the input signal crosses the threshold voltage, noise on the input may cause the output to rapidly jump back and forth between the two possible output stages. This noisy behavior may be undesirable, and in some situations detrimental to the equipment being controlled. Thus, we look for a more sophisticated solution that resolves this.

151 ƒ INTRODUCTION 143 ÿ ðv in ð in ÿ v V r V r R v V CC ó ƒ ÿ ó! ƒ ý òv out R v V CC ó ƒ ÿ ó! ƒ ý ƒ ÿ òvout Figure 11.5: The left-hand circuit is a simple op-amp based comparator circuit. The right-hand circuit shows the more sophisticated Schmitt trigger. R f The Schmitt Trigger One way to alleviate this noise issue is to use positive feedback to stabilize this situation. The positive feedback will accomplish two things. First, it will give us rapid output swings for slowly varying inputs and second, it will create a hysteresis in the circuit. This hysteresis will allows us to avoid multiple transitions due to noisy input signals. We accomplish this using the Schmitt trigger circuit shown in the right-hand side of Figure As discussed in our textbook, the positive feed back creates two different reference voltages depending on whether the output is V CC or V EE. When the input is falling, it must cross the lower reference voltage to switch states. When it is rising, it must cross the upper reference to switch. As long as the noise is smaller than the difference between the two reference voltages, the circuit will be immune from the noisy oscillations between states as it crosses the threshold. If we imagine that the potentiometer in our circuit is a voltage divider with R 1 and R 2, then the nominal reference voltage for the simple comparator is V r = R 2 R 1 + R 2 V CC. Using the positive feedback in our Schmitt trigger, and assuming that V EE = V CC, we can easily solve for the the two thresholds. If we define α = R 1 R 2 R f (R 1 + R 2 ), then we can show that the two thresholds are given as In the limit of α << 1, this simplifies to V a = V r α + α 1 + α V CC (11.3) V b = V r α α 1 + α V CC. (11.4) V a = V r + α V CC V b = V r α V CC, where we clearly see on threshold pushed up by αv CC and the other pulled down by the same amount.

152 144 CHAPTER 11. THE TRANSITION FROM ANALOG TO DIGITAL CIRCUITS 11.2 Preliminary Lab Questions The work in this section must be completed and signed off by an instructor before you start working on the lab. Do this work in your lab book. 1. Consider the voltage summing circuit shown in Figure What is the current through R 1, though R 2 and through R f? 2. For this circuit, what is the output voltage, V out? Explain why we would call this circuit an adder, in particular, consider in particular, the case in which R 1 = R 2 = R f. 3. Consider the transistor switch shown in Figure For an input of 0 V, the transistor turns off since V B = V E and the base-emitter junction is not forward biased. What is output voltage, V o = V C? 4. We now strongly forward bias the base-emitter junction by applying a 5 V input voltage. A 5 Volt input strongly forward biases the base-emitter junction. Assuming the transistor is conducting, what is the voltage at the base of the transistor, V B? What is the current into the base of the transistor, I B? 5. Assuming the transistor is in its linear operating range and that β 100, what would be the collector current? Given this current, what do we expect for the output voltage, V o = V C? 6. Clearly, the transistor cannot be in its linear range! The transistor reaches saturation where the collector-emitter voltage is small and the collector current is limited by R C rather than being calculated with the assumed β and I B. In saturation, what do we expect for the output voltage, V o = V C?

153 11.3. EQUIPMENT AND PARTS 145 Offset v_ v No Connection V CC v out V EE 4 5 Offset Figure 11.6: The pin connections for the 741 and the 411 op-amp Equipment and Parts In this lab we will utilize the following equipment. This equipment is located at your lab station. 1. The Tektronix TDS 2012B digital oscilloscope. 2. Two P2220 probes for the oscilloscope. 3. One USB memory stick. 4. The Stanford Research Systems DS335 signal generator. 5. One BNC to alligator cable. 6. The Metex 4650 digital meter. 7. The Global Specialities PB10 proto-board (see Appendix A for a description). 8. The PRO-LAB power brick and bus connector (part of the PRO-PS-LAB kit). You will also need the following components in order to carry out this lab. It makes more sense to get them as you need them, rather than all at once before the start of the lab. 1. Two 1 kω resistor. 2. Four 1% 10 kω resistors. 3. Five 1% 20 kω resistors. 4. One 411 OpAmp 5. Four single-pole, double-throw switches. 6. One 2N3646 npn transistor. 7. One 1 kω potentiometer. 8. Additional resistors and capacitors you choose to match your circuit designs. For reference, the pin configuration for the 741 and the 411 op-amps is shown in Figure 11.6.

154 ƒ 146 CHAPTER 11. THE TRANSITION FROM ANALOG TO DIGITAL CIRCUITS 11.4 Procedure Gotcha! 1. Is the DS335 set to be High-Z? 2. Is the voltage offset of the DS335 set to 0 V? 3. Is the current limit turned to the maximum value on your DC power supply? 4. Do you want to use AC or DC coupling on your oscilloscope? If you are interested in seeing a DC offset, then you need to DC couple. If you want to only see the time-varying part of the signal, then you want to AC couple. 5. Recall from lab 2 that at very-low and very-high frequencies, AC coupling may attenuate your signals. 6. Are all of your grounds connected to the same point? Are you grounding out your circuit in the wrong place? 7. Have you reversed the emitter and collector pins on your transistor? 8. Did you measure β of your transistor to make sure that it is ok? 9. Have you supplied power to your op-amp (V CC and V EE )? 10. If you are using the power busses on your proto-board, have you bridged the gap in the middle? The Summing Amplifier We want to build the two-input summing amplifier shown in Figure 11.7 using our 411 op-amp. We will use a DC source of 5 V for the +5 V input, while for For the 0 V and 1 V input, we will us our DS335 function generator to produce an appropriate square wave. Before starting, we also note that there is an obscure pathology in the interaction of the yellow Metex multimeters with the 411 op-amp. Under certain conditions, attempts to use one of the yellow multimeters to measure the DC output voltage of the 411 causes a wild instability in the 411 s output. This is visible if a scope is connected, and causes a net DC offset to be measured by the meter. The brown multimeters seem to work fine. +5V 0V, 1V ƒ ó ƒ ó R 1 ƒ R 2 R f ƒ ÿƒ ÿÿ ò v o ÿ ƒ ý Figure 11.7: The voltage summing circuit built using our 411 op-amp. Recall that for the op-amp to work, both V CC and V EE must be connected.

155 ƒ ƒ ƒ ƒ ƒ PROCEDURE Design your circuit so that you obtain an output square wave which alternates between 0 V and 5 V as the input varies from 0 V to 1 V. The zero-order analysis you carried out in the preliminary lab section is sufficient for you to determine the ratio of resistors R f /R 1 and R f /R Choose reasonable values for your three resistors, R 1, R 2 and R f. A good rule of thumb is that for inputs on the order of V olts, we want currents in milliamps. 3. Build the adder circuit shown in Figure 11.7 using a 411 op-amp and the component values that you selected above. 4. Set up your DS335 signal generator to produce a square-wave with a peak-to-peak amplitude of 1 V and a DC offset of 0.5 V. Prove to yourself that this is the desired input for your adder circuit. 5. Verify that the output of your circuit is a square wave that alternates between 0 V and 5 V. Also, show that when either input is unplugged from your circuit, you observe the expected output the output is a weighted sum of the inputs. Question 11.1 Does the 0 V output of your adder correspond to the 0 V input? A 4-bit Digital-to-analog Converter We will now use our summing amplifier in conjunction with an R 2R ladder to build the digital-toanalog converter as shown in Figure In this circuit, we will use mechanical switches to control the output voltage level, hence the term digital input. The switches are either on or off. These could also be computer-controlled switches, in which case this circuit could take the digital output of a computer, and then produce an analog voltage. +5 V R R R R ƒ ƒ ƒ ý ƒ 2R 2R 2R 2R 2R ƒ ÿ" ƒ ÿ" ƒ ÿ" ƒ ÿ" òð òð òð òð ƒ ý ƒ ƒ ý ƒ ƒ ý ƒ ƒ ý ƒ ýƒ 2R ÿ Figure 11.8: The digital to analog converter (DAC) circuit. ò V o

156 148 CHAPTER 11. THE TRANSITION FROM ANALOG TO DIGITAL CIRCUITS 1. Build the DAC circuit shown in Figure 11.8 using a 411 op-amp. Use precision 10 kω and 20 kω resistors to set up the R 2R ladder. The switches are single pole, double throw, where single pole means there is one input wire and double throw means they can be switched between two possible outputs. Our SPDT switches have been adapted so they plug directly into your proto-board. Question 11.2 Explain why it is crucial that when the switch is not connecting the voltage into the adder that it is connected to ground. Question 11.3 Be sure that you understand which pins are connected for each position of your SPDT switch. Sketch the orientation of the mechanical switch for the case of the lefthand output pin connected to the center pole, and for the right-hand output pin connected to the center pole. You may need to electrically measure this. 2. Measure the voltages along the top row of resistors where the 2R resistor drops to the SPDT switch. Are these voltages what you expect for the R 2R ladder? 3. Imagine that the right-most switch is the least-significant and the left-most switch is the mostsignificant bit of a four-bit binary number. Create a table of the 2 4 binary numbers (switch positions) and record the output voltage for each. Verify the DAC operation through these 2 4 settings Transistor Switch Now we will use a 2N3646 npn transistor to build the simple digital switch shown in the circuit in Figure Note that the β of this transistor is quite a bit smaller than that for the 2N2222 that we used in earlier labs. Measuring it on your Metex meter will give values in the range of 25 to 40. The operation of this inverting switch follows the follows the logic worked out in the preliminary lab questions. If the input voltage is 0 V, the output voltage will be +5 V, while if the input voltage is +5 V, the output voltage will be zero.

157 11.4. PROCEDURE 149 Question 11.4 Consider the case of V i = 5 V and assume that β = 25. If the transistor were in its normal operating state, what would you expect the ouput voltage, V o, to be? What does your answer imply about the operating state of the transistor? ð V i V cc = 5 V 1 kω ò V o 330 Ω ƒ ý Figure 11.9: A 2N3646 transistor used as a binary switch. 1. Build the circuit of Fig using a 2N3646 transistor. Use your adjustable DC supply for V i and the proto-board supply for V CC. 2. Measure V o for 0 and for 5 Volt inputs and compare to your answers to what you expect. 3. Somewhere between 0 V and +5 V input, the transistor is in its linear range. Here, the circuit is similar to the common emitter amplifier with R E = 0. This means the gain is quite high and a small variation in V i drives the output between the limits discussed above. By varying your DC input between 0 and +5 V, you can determine this range. Question 11.5 Over what range of input voltages does the output switch states? 4. Use your DS335 to produce a square-wave input that goes between 0 V and 5 V. Use the DC offset like you did in section Use this to determine how fast the transistor can go from 0 to 5 V and from 5 V to 0 V.

158 150 CHAPTER 11. THE TRANSITION FROM ANALOG TO DIGITAL CIRCUITS Question 11.6 How fast can this switch operate? Estimate the highest frequency for which the input will produce a square-wave output. Question 11.7 At very high frequency, you should see that there is a delay in the transistor transistor changing states. Is it associated with the output going high or the output going low? At what frequency does this delay become significant? Such delays are an intrinsic limitations of saturated logic bipolar junction transistor circuitry Op-Amp Comparator 1. Build the simple comparator shown in Fig using a 411 op-amp. In this circuit, an adjustable reference voltage V r is created using a potentiometer and the 411 op-amp is used to compare the input signal, V in, with the reference voltage, V r. 2. Check the behavior of this circuit by observing its output when a triangular waveform is used as the input (visualize both signals on the oscilloscope). Try varying V r. 3. Since there is no feedback network, the op-amp goes to negative saturation as soon as V in > V r and to positive saturation when V in < V r. Can you observe effects of noise on these transitions? Schmitt Trigger The output of the simple comparator from the last section is uncertain when V in V r. The circuit can be very sensitive to the exact values of these two voltages. In actual use, we need to worry about what

159 ƒ PROCEDURE ÿ 151 ð vin V r ò +12 V vout 1 kω ó ƒ ÿ ó! ƒ ý Figure 11.10: A simple comparator built with a 411 op-amp. The point labeled V r in the circuit is where we can measure the reference voltage of the comparator. happens as our input signal crosses V r. In many applications, the input signal may be varying slowly compared to the transition time of the circuit, and may be noisy. In this case, the comparator could output a series of short pulses as the transition voltage is crossed. This is undesirable behavior. Using positive feedback, we can build a circuit that minimizes this problem. Positive feedback generates a hysteresis in the circuit response. Once the output switches states, a small noise signal on the input will not be able to cause the output to switch back. This handy detector circuit is call the Schmitt trigger and shown in Figure ÿ ðv in V r +12 V 1 kω ó ƒ ÿ ó! ƒ ý ƒ ÿ òvout R f = 1 kω Figure 11.11: A Schmitt trigger comparator where the reference voltage can be adjusted using the 1 kω potentiometer. The point labeled V r in the circuit is where we can measure the reference voltage of the comparator. 1. Build the Schmitt trigger circuit shown in Fig Explore the behavior of this circuit using a triangular waveform for an input signal. Note how the reference voltage used to define the transition point for an increasing input signal is higher than the reference voltage for a decreasing signal. This is the characteristic of positive feedback used in the Schmitt Trigger. 3. Vary the reference voltage by adjusting your potentiometer and observe what happens with your triangular input voltage.

160 152 CHAPTER 11. THE TRANSITION FROM ANALOG TO DIGITAL CIRCUITS Question 11.8 Explain how this behavior can be used to avoid oscillations as a noisy input signal crosses the reference voltage level Additional Problems 1. If you were to reverse R 1 and R 2 in your summing amplifier circuit, what would the output voltage look like as a function of time? 2. If you were extending your DAC circuit, how many stages would you need to have 128 possible output levels? 3. For your Schmitt-trigger circuit, how large would the noise need to be on your input to negate the effect provided by the trigger circuit?

161 Chapter 12 Digital Circuits and Logic Gates Reference Reading: Chapter 7, Sections 7.4, 7.5, 7.6, 7.7 and 7.8. Time: Two lab periods will be devoted to this lab. Goals 1. Become familiar with the operation of simple logic gates. 2. Be able to correctly identify pins on an integrated circuit. 3. Be able to set up and use a flip-flop. 4. Understand what a switch de-bouncer does. 5. Be able to set up and use a 555 clock chip. 6. Be able to design and construct a digital counter. 7. Be able to construct a shift register circuit Figure 12.1: The pin numbering scheme on rectangular IC packaging. The tab as indicated by the dark oval in the diagram tags the end of the chip with the lowest and highest pin numbers Introduction In this lab, we will become familiar with logic gates and the use of more complicated logic circuits. We will also set up a clock circuit and use it to drive a counting circuit and a simple shift register. The logic gates that we will be using come in rectangular packages called dual in-line packages or DIPs as 153

162 154 CHAPTER 12. DIGITAL CIRCUITS AND LOGIC GATES shown in Figure The pin numbering scheme is standard over all such chips and is indicated in the figure. Not only will the IC have inputs and outputs related to the logic gates inside, it will also have an external power (V CC ) and ground connections. As with op-amps, these power connections are not typically shown in circuit diagrams, but are crucial to the operation of the chip Digital Logic As discussed in lab 11, we saw that digital signals can be expressed using a two-state logic system. This can be represented using two voltage levels, and then developing circuits that can process these signals. The basic elements of such circuits are logic gates that take several inputs and produce an output based on the underlying logic. In Figure 11.4, we showed how two of these, and nand and a nor, could be built using pairs of transistors. In this section, we will discuss the operation of various gates. The two basic gates are a logical and whose output is high if all of its inputs are high, and the logical or whose AND NAND OR NOR XOR XNOR Figure 12.2: The standard symbols for logic gates. output is high if any of its inputs are high. If we consider logic with two inputs, A and B, and an output O, then we write these two operations as for the and and as O = A B O = A + B for the or. We represent these as truth tables such as that given in Table It is also useful to have the complement of these. The complement is essentially the not operation, where a 1 becomes a 0 and a 0 becomes a 1. These complement gates are known as the nand and the nor gates. In our notation, we express the complement by placing a bar over the symbol. Thus, for the nand we have and for the nor we have O = A B O = A + B. We also show the results of this gate in Table Finally, in addition to the standard or inclusive or, we also also define an exclusive or, the xor. The xor will yield a high output if exactly one of the inputs is high. It aso has a complement known as the xnor. For the xor, we can write that O = A B, with the results for this operation listed in Table These logic gates also have standard electronic symbols for use in circuit diagrams. These are shown in Figure 12.2.

163 12.1. INTRODUCTION 155 A B A B A B A + B A + B A B A B Table 12.1: The truth table for an and, nand, or, nor, xor and the xnor gates. The first two columns are the inputs A and B. The next block show the output of the and/textscnand, followed by the or/nor and finally the xor/xnor The Set-reset Flip-flop Using logic gates, it is possible to build more complicated circuits that accomplish more sophisticated functions. A first step for us is the Set-Reset flip-flop, which we can associate with digital memory. The SR flip-flop can be built using two complementary logic gates as shown in Figure These circuits involve feeding the output of the gates back into the input of the other gate, and can be thought of as logical feedback. S Q R Q R Q S Q Figure 12.3: The left-hand circuit shows a set-reset flip-flop built using nand gates. The right-hand picture shows the flip-flop built using nor gates. Note that the S and R inputs are reversed relative to the two flip-flops. In Figure 12.3, the left-hand circuit shows an SR flip-flop built using a pair of nand gates. In order to determine the truth table for this circuit, we need to consider it as a circuit with four inputs and two outputs with a constraint between the inputs and the outputs. In this light, there are 16 possible input combinations of S, R, Q and Q. However, of these, only five give logically-consistent results. The five valid combinations are given as follows, where we note that the latter four combinations have Q and Q as the complement of each other. S : R : Q : Q = 0 : 0 : 1 : 1 = 0 : 1 : 1 : 0 = 1 : 0 : 0 : 1 = 1 : 1 : 1 : 0 = 1 : 1 : 0 : 1 We focus on these four latter states as the interesting states of the flip-flop and note that the latter two have the same input but different output. We can refer to this particular input combination as the hold state. If both inputs are high, the output stays the same. The other two states provide a mechanisms

164 156 CHAPTER 12. DIGITAL CIRCUITS AND LOGIC GATES for setting either of these states. Thus, we have the basis of digital memory. We can set the memory to either 0 or 1, and we have a mechanism to hold the value. We can also look at the SR flip-flop built using the nor gates in Figure This also has five valid states with four yielding outputs that are the complement of each other. S : R : Q : Q = 1 : 1 : 0 : 0 = 1 : 0 : 1 : 0 = 0 : 1 : 0 : 1 = 0 : 0 : 1 : 0 = 0 : 0 : 0 : 1 For this flip-flop, the state with two low inputs holds the output, and either the S or R line going high sets the output. Both of these are useful in more complicated circuits. In Table 12.2 is given a compact form of the truth tables for both of the SR flip-flops, where we have introduced the idea that some value of Q at the n 1 th step is transformed to Q n at the next step. We will utilize this notation in Section where we discuss additional flip-flop circuits. These two flip-flops are also referred to as the SR latch with the former known as the SR nand latch and the latter as the SR nor latch. nand based nor based Set Reset Q n Qn Set Reset Q n Qn 1 1 Q n 1 Qn 1 Hold 0 0 Q n 1 Qn 1 Hold Set Set Reset Reset Table 12.2: The truth table for the nand and nor-based SR flip-flops. In circuits, the SR flip-flop is often represented using a rectangular circuit symbol as shown in Figure As seen in the figure, the nand-based and nor-based SR flip-flops have their own symbols. The symbol for the nand-based SR is the same as the nor-based, except the inputs are negated. This makes sense from the two truth tables in Table 12.2 where is we complement the inputs to the nandbased flip-flop, it is identical to the ` nor-based one. This can also be easily shown from De Morgan s theorem. In addition to the set and reset inputs, an SR can have an additional input that enables the device. If this new input is not high, the flip-flop does not work. This may or may not be shown in circuit diagrams. BbRa0 ` AbRa0 R R S S Figure 12.4: The rectangular circuit symbols for a set-reset flip-flop. The left-hand symbol represents the nand-based flip-flop while the right-hand symbol represents the nor based flip-flop Clock Circuits Digital electronics does not normally sit in some fixed state, but rather performs logic operations on input to produce output. The rate at which these operations are performed is defined by an external clock. A typical processor chip for a computer has a rating that is in GigaHertz that indicates the clock

165 ƒ ƒ ƒ ƒ ƒ ƒ }{ ƒ INTRODUCTION 157 speed. While we will not be doing such high-speed electronics, we will set up a clock in this lab and then use its output to drive our circuits. We will build our clock using the so-called 555 timer chip. This is a very common chip whose pinout has been standardized over all vendors (shown in Figure 12.5). The basis of the 555 is a pair of Ground 1 8 V CC Trigger 2 7 Discharge Output Reset Threshold Control Voltage Figure 12.5: The pin-out of the 555 clock chip. comparators as shown in the circuit for the 555 in Figure These comparators compare the voltages of two different inputs with reference voltages inside the 555. A detailed discussion of how the 555 works can be found in section 7.6 in your textbook. The basic idea is to use an external RC circuit to define a characteristic time, τ RC, at which the clock ticks. However, we have somewhat more control in that we can also control what fraction of the clock period which is high and that which is low, f high and f low. ð 5kΩ ÿƒ ÿƒ ò ` 2 3 V CC 5kΩ ð xyyz ƒ ò AbRa0 R ÿ þ S 1 3 V CC 5kΩ ð xyyz ƒ ò ƒ ò ý ÿ ƒ V CC Threshold Trigger Control Reset Output Discharge Figure 12.6: The circuit inside the 555, showing the two comparators and RS flip-flop. This functionality can be achieved using two resistors and a capacitor which are hooked up externally to the 555 as shown in the circuit in Figure In terms of R 1, R 2 and C, it can be shown that the period of the clock is T 555 = ln(2) (R 1 + 2R 2 ) C. (12.1) The ln(2) comes from the exponential decay of an RC circuit and the fraction of the relevant characteristic time it takes to fall below some threshold. In addition to the period, we have the high and low fractions. These are given below, where the results are reminiscent of a voltage divider. f low = R 2 R 1 + 2R 2 (12.2)

166 ƒ ƒ ƒ ƒ 158 CHAPTER 12. DIGITAL CIRCUITS AND LOGIC GATES f high = R 1 + R 2 R 1 + 2R 2 (12.3) ð ÿ a0 V CC R 1 ƒƒ ÿ G ƒ ƒ 1a0 6 `OK IS 5 R 2 ƒÿ ÿ Q P }{!ao 2 IT ò 3 xyyyz 4 BbOD R C ý Clock Figure 12.7: A 555 clock IC in a circuit to produce a clock output signal with period T = (R 1 + 2R 2 ) C. The output is on the Clock line Other Flip-flops Two other flip-flop circuits are also in common use. Both of these are based in the SR flip-flop of Section , but include an additional ` feature of clocking. These devices go into a hold state when the clock pulse is low, and read their!a 1 input and process it when the clock pulse is high. It is also possible to build these to act on either a rising or a falling clock pulse. See Section of our textbook for more details on this. #a0 `!a 2 S BbP CbRa0 1D 1J C1 C1 1K R Figure 12.8: The rectangular circuit symbol for a JK flip-flop (left) and the D flip-flop (right). The JK Flip-flop The first of these is known as a JK flip-flop which has three inputs known as J, K and the clock, C. When the clock pulse is high, the J and K inputs are read and the output Q is produced. When the clock pulse is low, the flip-flop is in its hold state. We show the rectangular circuit symbol for the JK flip-flop in Figure More information on how the JK flip-flop works can be found in Section of our textbook. Here we only provide the truth table for the JK as in Table As with the SR flip-flop, there are set, reset and hold operations, but the JK flip-flop has an additional

167 12.1. INTRODUCTION 159 input state that complements the Q and Q outputs. This is known as the toggle state. We will take advantage of this in Section to build a counting circuit. CLK J K Q n Qn Comment 0 x x Q n 1 Qn 1 Hold Q n 1 Qn 1 Hold Set ReSet Qn 1 Q n 1 Toggle Table 12.3: The truth table for the JK flip-flop. In this case, the flip-flop responds to the falling edge of the clock pulse. The D Flip-flop A second type of flip-flop that is useful is the data flip-flop, or the D flip-flop. This flip-flop is also built on the SR flip-flop as discussed in the text, but has two inputs. The data input, D, and the clock input, C. The output is a copy of the data input when the clock is high and is in a hold state when the clock input is low. The symbol for the D flip-flop is shown in Figure 12.8 and we give the truth table as in Table CLK D Q n Comment 0 x Q n 1 hold Table 12.4: The truth table for the JK flip-flop. In this case, the flip-flop responds to the falling edge of the clock pulse. The D flip-flop is the basic element of a logic circuit known as a shift register as discussed in Section 7.9 of the textbook. A series of these can be strung together with data loaded in the left most one. The data then moves one flip-flop to the right on each clock pulse. This provides a mechanism for delaying the reception of information in a circuit by any desired number of clock pulses Using LEDs To Show Logic States The basic circuit to drive a light-emitting diode (LED) is shown in Figure 12.9 where the LED is connected in series with a resistor to a DC voltage supply. The LED is forward biased, with the anode more positive than the cathode. As with normal diodes, the LED can be approximated as having a voltage drop V d across it that is independent of the current, I d, in the circuit. Thus, the role of the resistor is to limit the current in the LED to make sure that it is not destroyed. Thus, the current is given by the voltage drop across the resistor, giving us that I d = V V d R.

168 ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ 160 CHAPTER 12. DIGITAL CIRCUITS AND LOGIC GATES I ƒ ú d ÿ ò ƒ ÿ ò V d R Typical red diodes have V d 2 V while for blue or violet LEDs it can be 2 4 V. V Figure 12.9: A forward-biased LED. The resistor is used to limit the current through the LED. In our digital circuitry, we will be using our +5 V as our voltage source, and we would like to limit the current in our circuit to be about 10 ma. For a red LED, we would find that R needs to be about 300Ω, so good choices woud the either 220 Ω or 330 Ω resistors. If we choose a blue LED, then choosing R 150 Ω is a better choice. We can now setup simple LED-based circuits that will light when the output is either high or low. We show simple examples of these in Figure where we have assume that we have used red or yellow LEDs in the circuits. The left-hand circuit will light the LED when the output is high, while the center circuit will light it when it is low. We can build a somewhat more sophisticated circuit as show in the right hand circuit where the red LED will light when the output is low and the green LED will light when it is high. ÿ ò ÿ ò 220Ω ý 220Ω 5V ñ red green ÿ ÿ ò Figure 12.10: Current-limiting resistors should be used in series with LEDs. In the left-had circuit, the LED lights when the output is high, while in the center circuit, the LED lights when output is low. The right-hand circuit will light the red LED when the output is low and light the green LED when the output is high. 220Ω 5V ñ 220Ω ý

169 12.2. PRELIMINARY LAB QUESTIONS Preliminary Lab Questions The work in this section must be completed and signed off by an instructor before you start working on the lab. Do this work in your lab book. 1. Verify that the five output states of the nand-based SR flip flop are correct. 2. Show that the time it takes to charge an RC circuit from 1 3 its maximum voltage to 2 3 its maximum voltage is given as ln (2) τ RC Equipment and Parts In this lab we will utilize the following equipment. This equipment is located at your lab station. 1. The Tektronix TDS 2012B digital oscilloscope. 2. Two P2220 probes for the oscilloscope. 3. One USB memory stick. 4. The Stanford Research Systems DS335 signal generator. 5. One BNC to alligator cable. 6. The Metex 4650 digital meter. 7. The Global Specialities PB10 proto-board (see Appendix A for a description). 8. The PRO-LAB power brick and bus connector (part of the PRO-PS-LAB kit). You will also need the following components in order to carry out this lab. It makes more sense to get them as you need them, rather than all at once before the start of the lab.

170 162 CHAPTER 12. DIGITAL CIRCUITS AND LOGIC GATES 1. Eight 220 Ω resistors. 2. Two 1 kω resistors. 3. Five 1% 20 kω resistors. 4. One 7400 nand chip. 5. One 7402 nor chip. 6. One 7473 or one 74LS107 jk flip-flop chip. 7. One SN LS164 8-bit shift register chip. 8. One 555 clock chip. 9. Eight LEDs. 10. Two single-pole, double-throw switches. 11. Additional resistors and capacitors you choose to match your circuit designs Procedure Gotcha! 1. Is the DS335 set to be High-Z? 2. Is the voltage offset of the DS335 set to 0 V? 3. Is the current limit turned to the maximum value on your DC power supply? 4. Do you want to use AC or DC coupling on your oscilloscope? If you are interested in seeing a DC offset, then you need to DC couple. If you want to only see the time-varying part of the signal, then you want to AC couple. 5. Recall from lab 2 that at very-low and very-high frequencies, AC coupling may attenuate your signals. 6. Are all of your grounds connected to the same point? Are you grounding out your circuit in the wrong place? 7. Have you supplied power to your integrated circuit chips (V CC ground)? 8. If you are using the power busses on your proto-board, have you bridged the gap in the middle? Logic Gates In this section we will verify the functioning of simple logic gates. The operation of logic gates are specified by truth tables as shown in Section In order to verify the operation of a gate it is necessary to measure the output for all possible combinations of inputs. In this section we will verify the truth table for the 7400 nand gate and the 7402 nor gate. The pin-outs for both of the chips are shown in Figure Note that the two chips are not pin compatible, the pin configuration for the two integrated circuits is different. We also note that both of these ICs that we use are so-called quad packs, meaning that they each contain four independent gates. We will only need to measure one of the four gates in each IC.

171 12.4. PROCEDURE 163 1A 1 14 VCC B 1Y 2A 2B 2Y GND Y 4B 1A 4A 1B 4Y 2Y 3B 2A 3A 2B 3Y GND VCC 4Y 4B 4A 3Y 3B 3A Figure 12.11: The pin out of the 7400 (left)and 7402 (right) chips. These each have four gates, with inputs A and B and output Y. Note that they are not pin compatible. While we could simply test these with a 5 V power supply and our Metex digital voltmeter (DVM), we will build a somewhat more sophisticated circuit including switches and LEDs for this. We will use a pair of single pole double throw (SPDT) switches to connect either +5 V or ground to the inputs of the gate as shown in Figure We also emphasize that for logic circuits, it is important that the inputs must satisfy the voltage levels associated with either a 0 or a 1. We cannot simply let an input float if we want 0 V, it must be connected to ground. +5V +5V Vo Figure 12.12: Two single-pole double-throw switches which are used to control the input to a NAND logic gate. The output is then measured to the right of the gate. 1. Modify the circuit in Figure to include LEDs to indicate the input and output states. 2. Build your circuit and verify the truth tables for both the 7400 nand gate and the 7402 nor gate. Question 12.1 Record your measured truth tables for the two gates here. Do your results agree with what is expected?

172 164 CHAPTER 12. DIGITAL CIRCUITS AND LOGIC GATES 3. In order to see how fast these ICs can operate as well as how clean the signals are at high frequency, replace one of the switches with your DS335 signal generator. Set the DS335 to produce a 5 V peak-to-peak, 2.5 V offset square wave and drive the circuit at high frequency. Tie the second input either to ground or to +5 V so that the DS335 switches the output. Look at the output on your scope to see when the gate has problems keeping up with the input. Question 12.2 Can you deduce a rough estimate for the maximum clock rate at which such circuits can be used? SR Flip-flops S Q R Q Figure 12.13: The nand-based SR flip-flop. 1. The circuit in Figure shows an SR flip-flop built using two nand gates. Modify the circuit to include switches that can connet the two inputs (individually) between 0 V and +5 V. Include LEDs in your design that will display the outputs Q and Q. 2. Build your circuit using the 7400 nand gate that we used in the last section. Recall that there are four gates on each chip. 3. Use your circuit to verify the expected truth table for the SR flip-flop. 4. You can use the switch set-up you used above to toggle the inputs to low and back to high. Verify the memory feature of this circuit and the ability to set outputs to a desired state. Write out the values of the four inputs to the two gates, for each of the four possible SET/RESET input combinations.

173 12.4. PROCEDURE 165 Question 12.3 Apply De Morgan s theorem to the circuit in Figure and sketch the resulting circuit. Is this the same as the nor-based SR flip flop? Question 12.4 same time? What happens when both the SET and RESET signals are present at the A Switch De-bouncer When we use a switch in a circuit, we nominally assume that its output will be a perfect step function. Either going from low to high or from high to low, and then remaining. Unfortunately, the mechanical nature of many switches leads to a situation where the process of mechanically opening or closing a switch actually causes the switch to bounce, and the output oscillates many times before settling in to the desired state. In many situations, this is not desirable. An RS flip flop can be used to de-bounce a switch. Once a RS flip-flop has changed states, it will not change back unless the other input is toggled. Because a switch does not actually bounce back and forth between the two inputs, we can use an RS flip-flop to ignore the bounce. Such a circuit is shown in Figure Build the de-bounce circuit shown in Figure and demonstrate that it does function as a switch. To see the de-bouncing effect, you can look at the input to the Set on one scope trace and the Q output on the other. Note what you observe in your lab book The 555 Clock Circuit Before proceeding, we note that you will be using the clock circuit in this part of the lab to drive the circuits in the next two sections. DO NOT DISASSEMBLE YOUR CLOCK CIRCUIT. It is also advisable that you try to build your clock circuit as close to one end of your proto-board as possible. Otherwise, you will run out of board real estate later in the lab. We will be setting up the 555-based clock circuit shown in Figure where we want to design our clock to have a period of about 1 s. The 555 clock chip that we will be using has the pin-out as shown in Figure It is also possible to get dual packs of these chips similar to the multiple gates we saw with out logic gates. In setting up the 555, we take V CC = 5 V. 1. The 1 s period of our circuit combined with equation 12.1 allows us to determine what (R 1 +2R 2 ) C must be. Taking several possible capacitor values such as a few µ F, tens of µ, F, hundreds of µ F

174 ƒ ƒ ƒ ƒ 166 CHAPTER 12. DIGITAL CIRCUITS AND LOGIC GATES ƒ ý +5 V 1 kω 1 kω +5 V ƒ ÿ ƒ ÿ ƒ ÿ ƒ R ƒ S õ ` BbRa0 Figure 12.14: An RS flip-flop used to de-bounce the output from a switch. Once the flip-flop changes state, it will remain in the new state, independent of whether the switch bounces. Q Q ð ÿ a0 R 1 ƒƒ ÿ G ƒ ƒ 1a0 6 `OK IS 5 R 2 ÿƒ ÿ Q P }{!ao 2 IT ò 3 xyyyz 4 BbOD R ƒ C ý V CC Clock Figure 12.15: A 555-based clock circuit to produce an output signal with period T = (R 1 + 2R 2 ) C. The output is on the Clock line. Ground 1 8 V CC Trigger 2 7 Discharge Output Reset Threshold Control Voltage Figure 12.16: The pin-out of the 555 clock chip. and thousands of µ F, determine what the sum of R 1 + 2R 2 must be. If we want to keep thus sum in the 10 kω range, what is the best choice for C? 2. We will now specify that the high fraction should be about twice the low fraction. This information

175 12.4. PROCEDURE 167 together with equations 12.2 and 12.3 will allow us to find the relative size of the two resistors in our circuit. 3. Based on the available capacitors in the lab, what we found above, select reasonable values for the resistors R 1 and R With your choice of (measured) components, build the circuit in Figure and measure its output. Does it have the expected period and high versus low fraction?. 5. Add an LED to the output of your clock chip (Figure 12.10) and let the lights flash! The Binary Counter In addition to the SR flip-flop, we also talked about the JK flip-flop. In this section, we will utilize the toggle state of the JK flip-flop to build a four-bit binary counter. However, rather than building our own JK flip-flop from gates, we will use a custom chip for this purpose. The 7473 chip is a dual-pack which contains a pair of edge-triggered JK flip-flops, where the falling clock edge triggers the flip-flop to read its input. In addition to the J, K and clock inputs, the 7473 chip also has a enable line labeled CLR. This line must be pulled high with +5 V to enable the flip-flop. Including the CLR line, the truth table for this chip is given in Table In Figure is shown the pin-out for our 7473 JK CLR CLK J K Q Q Comment 0 x x x L H Default 1 falling 0 0 Q n 1 Qn 1 Hold 1 falling Set 1 failing ReSet 1 falling 1 1 Qn 1 Q n 1 Toggle Table 12.5: The truth table for the 7473 JK flip-flop. This flip-flop responds to the falling edge of the clock pulse. flip-flop. 1CLK 1CLR 1K VCC 2CLK 2CLR J 1Q 1Q GND 2K 2Q 1J 1Q 1Q 1K 2Q 2Q VCC 1CLR 1CLK 2K 2CLR 2CLK A B Q0 Q1 Q2 Q VCC Q7 Q6 Q5 Q4 MR 2J 7 8 2Q GND 7 8 2J GND 7 8 CP Figure 12.17: (Left) The pin-out of the SN7473 JK-flip-flop. (Center) The pin-out of the 74LS107 JK-flipflop. The inputs and outputs of the first flip-flop all start with 1, while the for the second, they all start with 2. (Right) The pin-out of the SNLS164 8-bit shift register chip. For this chip, both the A and B inputs need to be high to set Q0. CP is the clock input and MR is the master reset. The outputs are Q0 through Q7.

176 168 CHAPTER 12. DIGITAL CIRCUITS AND LOGIC GATES 1. Build the circuit shown in Figure for a two-bit counter. Use your 555 clock circuit from earlier in the lab to provide the clock input to your circuit. Verify that your circuit counts to three as expected. + Q 0 + Q 1 J Q J Q input clock clk clk K K Figure 12.18: A two-bit binary counter built using JK flip-flops. This can easily be extended to more bits. 2. Modify your circuit to include at least two additional bits and demonstrate that the circuit does indeed count as expected. Question 12.5 maximum value? If you build a 12-bit counter, how long would it take for it to count to its 3. You use a switch, rather than your 555 to clock your counter. However, you would find that switches produce erratic output due to contact bounce as discussed above. The counter may see many logic pulses, rather than a single pulse, as the mechanical switch makes and breaks contact. This will lead to very erratic behavior. Such a circuit is one example where the de-bouncer discussed above can be used as input to the circuit. Such a de-bouncer circuit is commonly used on momentary push-button switches which change state when they are pressed and released The Shift Register A shift register is a circuit that shifts bits by one bit on each input clock pulse. Section 7.8 of your text book shows how a simple shift register can be built using D flip-flops. In this section, we will use an SN74LS164 chip which is an 8-bit shift-register. The pin-out for this chip is shown in Figure and it s truth table is given in Table The shift-register has four inputs and eight outputs. The clock input is labeled CP and there is a reset input labeled MR. If the reset is pulled low, then all of the outputs (Q0 to Q7) are set to zero. As long as the reset is held high, the shift register will clock the bits from lowest (Q0) to highest (Q7), with one shift on each clock pulse. Finally, there two inputs A and B allow one to set the lowest bit high. As long as one of these (A or B) is held low, Q0 will not be set. If both are high, then Q0 will go high on the next clock pulse.

177 12.5. ADDITIONAL PROBLEMS 169 Operating Inputs Outputs Mode M R A B Q0 Q1-Q7 Reset 0 X X Shift Q0-Q Q0-Q Q0-Q Q0-Q6 Table 12.6: The truth-table for the SN74LS164 8-bit shift register. If the reset line goes low, the chip is reset. If the reset is high, then the contents of Q0 to Q7 are clocked through the shift register. If both A and B are high, then Q0 is turned on during the clock pulse. 1. Design a circuit using the eight bit shift register chip which has an LED output connected to each of the Q outputs of the chip. In your circuit, connect the B input to +5 V and the use an SPDT switch to connect the A input to either ground or +5 V. It is advisable that you sketch the circuit which you want to build in your lab book before starting. You will also need to lay out the real estate on you circuit board carefully so that things fit. 2. Build your circuit using your 555 circuit from above to provide the clock input. Verify that data loaded in using the switch will shift through the chip Additional Problems 1. If you wanted to light two LEDs in series as an indicator, rather than a single LED, what value of a resistor should you choose? 2. If you wanted your 555 clock circuit to run at 1 khz, what are resaonable choices for the external resistors and capacitors? 3. Modify you JK-flip-flop counter such that the LEDs are on when the output is low and off when it is high.

178 170 CHAPTER 12. DIGITAL CIRCUITS AND LOGIC GATES

179 Appendix A The PB10 Proto-board A.1 Introduction Figure A.1: The PB10 proto-board used in our electronics course. All of our circuits in this course are built on a proto-board. In our case, it is the Global Specialities PB10, a picture of which is shown in Figure A.1. The board should be part of a kit that include both a power bus and an external power brick. This kit is currently sold as the PRO-S-LAB powered breadboard from Global Specialities. It is also possible to purchase the three parts separately as the PB10 proto-board, the Global Specialities PRO-S PS power supply and the Global Specialties PRO- S PC power connector. A somewhat more sophisticated powered bread board is the Global Specialities PB-204, which has significantly more real estate for circuits and integrated power supplies. In order to use the PB10 board, it is important to understand the internal connections on the board. 171

180 172 APPENDIX A. THE PB10 PROTO-BOARD In this appendix, we will walk through the internal connections and then give some hints on how to wire up our circuits. Before starting, we identify three classes of connections on the board. These are the three banana jacks at the top of the board, the four buses which are the top two and bottom two rows of the board, and the two blocks of connectors which encompass all the remaining connections on the board. These are discussed below. A.2 Connections on the PB10 Proto-board A.2.1 Banana Jacks The three banana jacks on the board, labeled V1, V2 and GND are not connected to any other part of the proto-board. However, the colored plastic unscrews exposing a metal core in the center of the jack. There is a hole through this core into which we can insert a wire, which is then held in place by tightening the plastic screw on the outside of the jack. Thus, we can make a solid electrical connection from the jack to any point on the proto-board using the wire we have attached. The jack itself is convenient for connecting external power and ground to the board. For example, we might use a pair of banana plug cables to connect our DC power supply to the V1 and GND banana jacks on our board, then use wires to bring these to the needed points on the board. A.2.2 The Buses The buses are four rows of connection points on the board that are tied together along the row. On this board, the horizontal connection is not made across the middle of the row. This means that each row is in fact a pair of buses. To be more specific, we look at the top row of connectors on the PB10 proto-board. The 25 connections on the left-hand side of the board (five blocks of five) are all connected together. Similarly, the 25 connections on the right-hand side of the board are also connected together. The is repeated for the second row from the top, and the bottom two rows on the board as well. These connections are sketched in Figure A Connectors Connectors Figure A.2: The connections of the buses on the PB10 proto-boards. The horizontal line through the buses indicate which holes are connected together. In using the buses, it is often convenient to have them extend along the entire row. In order to do this, we place a small wire jumper across the middle of the row to connect the two halves together. In using the board, it is often useful to have one of the top two rows connected to a positive DC voltage level, while one of the bottom two layers is connected to ground. A.2.3 The Connectors We refer to the remaining holes in the proto-board as normal connectors, or just connectors. Each column of five of these holes are connected together, with no connection made across the gap in the middle of the board. These connections are shown in Figure A.3. Thus, we have 128 blocks of five pins connected together for connecting circuit elements. You do not want to put both ends of a component in the same block of five holes, as this will short both ends together.

181 A.3. HINTS ON WIRING CIRCUITS ON THE PB10 PROTO-BOARD Rows Figure A.3: The connections for the connectors on the PB10 proto-boards. The vertical lines through the pins indicate which holes are connected together. A.3 Hints on wiring circuits on the PB10 Proto-board In building circuits on the PB10 proto-board, it is useful to minimize the number of external jumper wires that you use, and maximize the number of internal connections you use. This serves two purposes. First, it makes your circuit neater, which in turn makes it easier to debug if there is a problem. Second, the wire connections can be flaky, so minimizing their use can minimize potential problems in your circuit. We also noted above that it is often convenient to make one up the upper two buses a non-zero DC voltage, and one of the lower two buses ground. This provides a large number of connection points to these voltage levels, and can in turn minimize the use of jumper wires.

182 174 APPENDIX A. THE PB10 PROTO-BOARD

183 Appendix B Component Labels Components are labeled in a number of ways. Color codes are typical for resistors, while various combinations of numbers, letters and colors may be used for capacitors. In this section, we show some of the common methods of labeling components. This list is by no means comprehensive, and when in doubt about a particular component value, measuring it is always the right thing to do. As mentioned above, colors are used in labeling several different components. The color-to-number correlation is given in Table B.1. There are numerous poems and phrases in which the first letter of the color name is the first letter of a word, and the poem or phrase follows the 0-to-9 order in the following table. None of these phrases will be repeated here. Color Value Black 0 Brown 1 Red 2 Orange 3 Yellow 4 Green 5 Blue 6 Violet 7 Grey 8 White 9 Table B.1: The color-numeric correspondence in electrical components. B.1 Resistor Codes The most common usage of color codes is in labeling resistors. Typical resistors have four color bands as shown on the left side of Figure B.1. Precision resistors have a 5th colored band as shown in the right side of the figure. For a resistor with n bands, the first n 2 bands give the numerical part of the resistance, the (n 1)th band gives the power-of-ten multiplier, and the nth band gives the tolerance. Table B.2 shows how this works for four-band resistors, while table B.3 explains five-band resistors. A couple of resistor examples are shown in Figure B.2. The first has four bands: red-black-yellowgold. From Table B.2, we see that the first two bands give s 20. The third band says that we multiply this by 10 4 and the fourth band indicates that we have a 5% tolerance. The resistor is R = 200 kω (±5%). The second example is a 5-band resistor with purple-black-brown-red-brown. Table B.3 gives us the 175

184 176 APPENDIX B. COMPONENT LABELS Band Band Band Tolerance Band Band Band Band Tolerance Figure B.1: The left-hand diagram shows a normal resistor with 4 bands. The method for reading these is shown in Figure B.2. The right-hand diagram shows the coding on precision resistors. Table B.3 gives the rules for reading these. Color 1 st 2 nd 3 rd 4 th Black Brown Red Orange Yellow Green Blue Violet 7 7 Grey 8 8 White 9 9 Gold 10 1 ±5% Silver 10 2 ±10% (None) ±20% Table B.2: The meaning of each band in a normal (4-band) resistor. Color 1 st 2 nd 3 rd 4 th 5 th Black ±1% Brown ±.1% Red ±.01% Orange ±.001% Yellow Green Blue Violet Grey White Gold 10 1 Silver 10 2 Table B.3: The meaning of each band in a precision (5-band) resistor. numeric part from the first three bands as 701. The fourth band indicates we multiply this by 10 2 and the fifth band says that we have 0.1% tolerance. Thus R = 70.1 kω (±0.1%).

185 purple red red red brown brown red brown B.1. RESISTOR CODES 177 black yellow gold red red % 20 x 10 4 Ω = 200 kω (5%) black % 701 x 10 2 Ω = 70.1 kω (0.1%) black x 10 1 Ω = 200 Ω (20%) gold % 22 x 10 2 Ω = 2.2 kω (5%) Figure B.2: Examples of reading 4-band and 5-band resistors. Note that in the third example, the color of the fourth band is none.

186 178 APPENDIX B. COMPONENT LABELS B.2 Capacitors There are probably more ways of labeling capacitors than one can count. In this section, we go over a number of the labeling schemes that one may encounter in building circuits. As with any component, measuring it is probably the most accurate way to determine its actual value. Electrolytic capacitors tend to come in cylindrical cans. These capacitors have a definite parity with the positive terminal (anode) being labeled in some fashion. A mark may be printed on the capacitor, or there may be a band or ring around one end of the capacitor as shown in Figure B.3. The capacitor will also normally have its capacitance printed on the side in µf ; however, a 22 µf capacitor (for example) may be labeled as 22 M, where M is used to represent µf. In addition, the capacitor will have a voltage rating which indicates the maximum voltage at which the capacitor can operate. If one of these devices is hooked up backwards and subjected to a large voltage, one of the ends tends to remove itself from the the capacitor with a loud bang. + Crimp or band Figure B.3: An electrolytic capacitor. Capacitance is indicated in µf, while the end with the crimp or band is the positive end (anode) of the capacitor. Another type of capacitor is the ceramic disk capacitor. The are typically flat discs. A couple of typical labeling schemes for these are shown in Figure B.4. CCM XXM YYV Figure B.4: The ceramic capacitor on the left is labeled with three numbers as shown, CCM. The value of the capacitor is given as CC 10 M pf. The label 103 translates to pf, while 501 translates to pf. The capacitor on the right has both a capacitance and a voltage on it. The XXM is XX µf, while the voltage is given as Y Y V. You may also encounter tantalum electrolytic capacitors, seen in Figure B.5. Some of these are color-coded as shown in the figure, where Table B.4 shows how to interpret the colors on the capacitor.

187 B.2. CAPACITORS 179 Voltage and + Polarity Tolerance C C M + Figure B.5: A tantalum electrolytic capacitor. The capacitance can be written numerically on the capacitor in µf, or the color code in Table B.4 can be used. If the color code is used, the capacitance is in pf. Color Voltage Value Multiplier Black 4 0 Brown 6 1 Red 10 2 Orange 15 3 Yellow Green Blue Violet Grey 8 White 9 Table B.4: The color code for the tantalum electrolytic capacitors shown in Figure B.5. The capacitance is given in pf.

188 180 APPENDIX B. COMPONENT LABELS B.3 Semiconductor Labels Semiconductors are labeled with a combination of letters and numbers: XNYYYY with the letters and numbers having the following meaning. X The number of semiconductor junctions. For a diode, this is one. For a bipolar transistor, this is 2. N The device is a semiconductor. YYYY The identification number (order of registration) of the device. This also may includes a suffix letter that can indicate matching devices (M), reverse polarity (R) and modifications (A,B,C, ). An example is the 2N2222 transistor, for which there is also a modified version, the 2N2222A. A typical diode is the 1N4004.

189 B.4. DIODES 181 B.4 Diodes In a diode, the pin which is connected to the p-type semiconductor layer is the anode, while that connected to the n-type layer is the cathode, and it is crucial to know which one is which. The diode is said to be forward biased when the anode is at higher potential than the cathode, or reverse biased when the cathode is at higher potential. Figure B.6 shows a couple of typical diode packages on the left, while on the right are a couple of typical light-emitting diode (LED) packages. For the diode, the pointed end of the can, or the end with the stripe or band around it, indicates the cathode. In the LED, the shorter leg, or the side that has a flat spot on the base of the can, is the cathode. Zener diodes Cathode Anode Cathode Anode Cathode Anode Cathode Anode Figure B.6: Typical diode and light-emitting diode containers. Under forward biasing, the anode is at higher potential than the cathode. will probably have the breakdown voltage printed on the can as well. 5.6 would mean that the diode breaks down when it is reverse biased with 5.6 V. There may also be colored bands on a diode. This information codes the diode type. Two examples of this are shown in Figure B.7 while Table B.5 shows what each color means. The last band is always the suffix letter, with black indicating that there is no suffix. The remaining bands, reading away from the cathode, give the diode identification number. To get the full number, add 1N to the start of the code. In the examples, yellow-black-black-yellow-brown corresponds to 4004A. This is then a 1N4004A diode.

190 182 APPENDIX B. COMPONENT LABELS yellow black black yellow brown green yellow green black A N4004A 1N545 Figure B.7: Colored band labels for diodes. Color Digit Suffix Black 0 (none) Brown 1 A Red 2 B Orange 3 C Yellow 4 D Green 5 E Blue 6 F Violet 7 G Grey 8 H White 9 J Table B.5: The color codes used to identify diodes.

191 B.5. TRANSISTORS 183 B.5 Transistors The pin labels of typical bipolar transistors are shown in Figure B.8. While it is usually safest to double-check the pins on the transistor spec sheet, Figure B.8 does accurately describe a majority of these transistors. The base connection is in the middle. Most bipolar transistors will function, but not as well, if one reverses E and C in a circuit. E B C C E B Figure B.8: Typical pinouts for bipolar transistors. The three pins are the emitter (E), the base (B), and the collector (C). C B E

192 184 APPENDIX B. COMPONENT LABELS B.6 Integrated Circuits Typical ICs come in 8- and 14-pin packages. Figure B.9 shows the pin numbering scheme on a 14- pin package. The key identifying mark is the tab shown at the center of the right-hand side of the chip. Looking at the top of the package with the tab on the right, pin 1 is above the tab and the highest-numbered pin (14) is below the tab Figure B.9: The pin number scheme on a 14-pin IC package. Pin 1 is to the right of the tab, and pin 14 is to the left of the tab.

193 Appendix C Curve Fitting in Excel C.1 Introduction For many of the labs that in thus manual, we will need to fit theoretical curves to our measured data. While there are many computational tools that can do this, a very common one is to carry this out in Excel. This appendix will describe how this is done using a more recent version of Excel. Figure C.1: Enter your data into and Excel spreadsheet. C.2 Performing Linear Fits to our Data Enter the data into an Excel spreadsheet In the course of our labs, we will have collected some data. The example here assumes that we have measured the I-V curve of a resistor. The data we 185

194 186 APPENDIX C. CURVE FITTING IN EXCEL collected are as given in Table C.1 and we are told that the resistor is rated as 2 kω with 10% tolerances. The first thing that we will do is enter our data into an Excel spreadsheet. We show such a spreadsheet Voltage (V) Current (ma) Table C.1: The collected data for the I-V curve of a resistor, in Figure C.1. Note that to allow us to keep track of what we really have, we have labeled the two columns and made sure that the units are in the column labels as well. The signs are also important here. If the voltage is negative, then at least for a resistor, the current needs to be negative as well. Plot our data in Excel Now that we have the data in Excel, we would like to plot it. This is done by highlighting the data, then pulling down the chartmenu in Excel. We will select the Marked Scatter plot, which will allow us to perform later fits to our data. In Figure C.2 are shown the pull-down menu on a Mac for the charts and the resulting plot of our data in Excel. cc Figure C.2: Plot your data in Excel.

195 C.2. PERFORMING LINEAR FITS TO OUR DATA 187 Performing a linear fit For fittng a straight line to our data, we can use the trendline feature in Excel. If we right-click on one of the points in our plot, one of the pop-up menus will be for a trendline. With this menu as shown in Figure C.3, we select the linear fit. Then, as shown in Figure C.4, we return to this menu and select the options to show the results on our plot. The resulting plot with the overlaid fit is shown in Figure C.5. Figure C.3: Place a linear trendline on your data. Figure C.4: Put the fit parameters on your plot.

196 188 APPENDIX C. CURVE FITTING IN EXCEL Figure C.5: Your plotted data with the fit parameters.

197 C.3. PERFORMING GENERAL FITS TO OUR DATA 189 Comparison of results to data We are now ready for the most important part of this exercise, to compare our fit results with our expectations. The mathematical form that was fit is given as Our fit tells us that I(mA) = a V (V ) + b. a = ma/v b = ma, where we have made sure to indicate the units associated with these fit parameters based on the data we entered in Excel. The resistance is R = 1/a, but to get resistance, we need to write a = A/V, so R = 1953 Ω. Recall that we were told that our resistor was supposed to be 2000 Ω with 10% tolerances. That means that we should have expected a measured value in the range of 1800 Ω to 2200 Ω. Thus, our result is within the expected tolerance. C.3 Performing General Fits to our Data Enter the data into an Excel spreadsheet The example here assumes that we have measured the frequency response of a filter circuit. We set the frequency to typical values, then measured the input voltage, v in, and the output voltage v out of our circuit. The data we collected are as given in Table C.2. As before, we will enter our data into an Excel spreadsheet. However, in addition to simply entering f (Hz) v in (mv) v out (mv) Table C.2: The collected data for the frequency response of a filter. our date, we also add two computed columns. The first is the angular frequency, ω, which is computed at ω = 2πf. The second is the gain, G = v out /v in. We show such a spreadsheet in Figure C.6. Plot our data in Excel Now that we have the data in Excel, we would like to plot it. This is done by highlighting the data, then pulling down the chartmenu in Excel. We will select the Marked Scatter plot, which will allow us to perform later fits to our data. Once the plot is generated, we will want to change the horizontal axis to log-scale from linear. This is done by right-clicking on the axis, selecting

198 190 APPENDIX C. CURVE FITTING IN EXCEL Figure C.6: Data for our nonlinear fit. Format Axis, and then under options, click the log scale. In Figure C.7 we show the resulting plot of our data in Excel. In order to fit our data, we first need to decide what our fit function will be. For a low-pass filter, we expect that the magnitude of our gain will be G = (ω/ωrc ) 2, where our fit parameter is the characteristic frequency, ω RC. To be able to do the fit, we will need to define a variable omgrc. We do this by entering both the name and a value, 250, as shown in the bottom of Figure C.8. We then highlight both of these cells and select Insert from the top menu. On

199 C.3. PERFORMING GENERAL FITS TO OUR DATA 191 Figure C.7: Plot your data in Excel. the pull-down menu, we then select Name, and then select Define on the resulting menu. We can now create a predicted column using the formula =1/SQRT(1+(D2/omgrc)*(D2/omgrc)) We show this in Figure C.8. We now need to create a measure of how far apart our measured gain and predicted gain are. This is usually done with a χ 2 function. We create a new computed column that will contain the individual contributions to our χ 2. This is nominally χ 2 = n (G i (meas) G i (pred)) 2 i=1 where we square the difference between the measured and fit value, and then divide by our expected error in the gain. In this case, we do not have a good feel for the error in the gain. Probably the best thing that we can do is to estimate the error in the output voltage. We can assume that it is 5% of the measured value, but given the nature of our scope, it is no smaller than 1 mv. Thus, we might compute the error in the output voltage as =MAX(C2*0.05,1) and then the error in the gain as =MAX(C2*0.05,1)/B2 This then lets us compute a reasonable χ 2 as in the following. =(E2-F2)*(E2-F2)/(G2*G2) σ 2

200 192 APPENDIX C. CURVE FITTING IN EXCEL Figure C.8: Set up our prediction in Excel. Figure C.9: Set up our prediction in Excel. Finally, we need to have a cell that is the sum of the individual χ 2 contributions. Doing all of this, we get the spreadsheet as shown in Figure C.9. We would now like to solve this to find the best value of ω RC. To do this, we select the cell with the summed χ 2, then select the Data menu from the top bar. This brings up a Solver menu. This is the question mark that we see in Figure C.9. This brings up the menu in Figure C.10, where we have entered omegarc into the By changing variable cells box. We then

201 C.3. PERFORMING GENERAL FITS TO OUR DATA 193 click on solve. This will think for awile, after which the value of ω RC will be optimized at about 996 with the χ 2 minimizing at about 2. We can now plot our fit data by selecting the ω, measured G and predicted G columns and then making a new scatterplot. This is shown in Figure C.11.

202 194 APPENDIX C. CURVE FITTING IN EXCEL Figure C.10: Set up the solver in Excel.

203 C.3. PERFORMING GENERAL FITS TO OUR DATA 195 Figure C.11: Set up the solver in Excel.