TLP702 TLP702. Intelligent power module signal isolation Industrial inverters Motor drive 3 SHIELD

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1 TOSHIB PHOTOCOUPLER Gals IRED & PHOTO-IC Intelligent power module signal isolation Industrial inverters Motor drive.8±0. Unit in mm The Toshiba consists of a Gals light-emitting diode and an integrated high-gain, high-speed photodetector. The is suitable for isolating input control signals to intelligent power modules. This unit is a -pin SDIP. The is 0% smaller than the 8-PIN DIP and meets the reinforced insulation class requirements of international safety standards. Therefore the mounting area can be reduced in equipment requiring safety standard certification. The detector has a totem pole stage to provide both source and sink driving. The detector IC has an internal shield that provides a guaranteed common-mode transient immunity of 0 kv/μs. The is inverter logic type. For buffer logic type, the TLP70 is in line-up. 0.±0..8± ± 7.±0..7±0..±0. 9.7± Inverter logic type (totem pole ) Guaranteed performance over temperature : 0~00 C Power supply voltage :.~0 V TOSHIB -J Weight:0. g (typ.) -J Input current: HL = m (Max.) Switching time ( tphl / tplh) : 00 ns (Max.) Common-mode transient immunity : ±0 kv/μs (Min) Isolation voltage : 000 Vrms (Min) UL Recognized :UL77, File No.E79 Option (D) TÜV pproved : DIN EN077-- No.R00 Pin Configuration (Top View) :NODE :N.C. :CTHODE : : : Maximum Operating Insulation ltage : 890V PK Highest Permissible Over ltage : 8000V PK (Note) : When a EN077-- approved type is needed, Please designate Option(D) Construction Mechanical Rating Creepage Distance Clearance Insulation Thickness 7. mm pich standard type 7.0 mm (Min) 7.0 mm (Min) 0. mm (Min) 0. mm pich TLPXXXF type 8.0 mm (Min) 8.0 mm (Min) 0. mm (Min) Schematic I F + VF - Tr Tr I CC V CC I O V O Truth Table Input LED Tr Tr Output H ON OFF ON L L OFF ON OFF H 0. μf bypass capacitor must be connected between pins and. (Note )

2 bsolute Maximum Ratings (Ta = C) CHRCTERISTIC SYMBOL RTING UNIT Forward Current (Ta 8 C) 0 m Forward Current Derating (Ta > 8 C) Δ/ΔTa 0. m/ C LED Peak Transient Forward Current (Note ) PT Reverse ltage VR V Junction Temperature Tj C Output Current (Ta C) IO / m Output Current (Ta 00 C) IO./. m DETECTOR Peak Output Current IOP 0/ 0 m Output ltage VO 0.~0 V Supply ltage 0.~0 V Junction Temperature Tj C Operating Temperature Range Topr 0~00 C Storage Temperature Range Tstg ~ C Lead Solder Temperature (0 s) Tsol 0 C Isolation ltage (C, min., R.H. 0%, Ta = C) (Note ) BVs 000 Vrms Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook ( Handling Precautions / Derating Concept and Methods ) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Recommended Operating Conditions CHRCTERISTIC SYMBOL MIN. TYP. MX. UNIT Input Current, ON (ON) 7 m Input ltage, OFF VF (OFF) V Supply ltage (*) ( Note, Note ). 0 V Note: Recommended operating conditions are given as a design guideline to obtain expected performance of the device. dditionally, each item is an independent guideline respectively. In developing designs using this product, please confirm specified characteristics shown in this document. (*) This item denotes operating ranges, not meaning of recommended operating conditions. Note : Pulse width PW us,00pps. Note : Device Considered a two terminal device : pins, and shorted together and pins, and shorted together. Note : The detector of this product requires a power supply voltage () of. V or higher for stable operation. If the is lower than this value, an may be unstable. Be sure to use the product after checking the supply current, and the operation of a power on/ off. Note : ceramic capacitor(0. μf) should be connected from pin to pin to stabilize the operation of the high gain linear amplifier. Failure to provide the bypassing may impair the switching property. The total lead length between capacitor and coupler should not exceed cm

3 Electrical Characteristics (Unless otherwise specified, Ta = 0~00 C, =.~0 V.) CHRCTERISTIC SYMBOL TEST CIRCUIT CONDITION MIN. TYP. * MX. UNIT Input forward voltage VF = m, Ta = C..7 V Temperature coefficient of forward voltage ΔVF/ΔTa = m.0 mv/ C Input reverse current IR VR = V, Ta = C 0 μ Input capacitance CT V = 0 V, f = MHz, Ta = C 0 pf Logic LOW voltage VOL IOL =. m, = m V Logic HIGH voltage VOH IOH =. m, VF = 0.8 V = V.. = 0 V V Logic LOW supply current ICCL = m = 0 V Ta = 0~00 C V CC = V Ta = C = 0 V Logic HIGH supply current ICCH VF=0V Ta = 0~00 C = V Ta = C m m Logic LOW short circuit current IOSL = m = VO = 0 V 7 7 m Logic HIGH short circuit current IOSH VF = 0 V, VO = = 0 V 7-0 m Input current logic LOW Input voltage logic HIGH HL IO =. m, VO < 0. V 0. m VFLH IO =. m, VO >.V = V 0.8 V Input current hysteresis IHYS = V 0.0 m *ll typical values are at Ta = C. Isolation Characteristics (Ta = C) CHRCTERISTIC SYMBOL TEST CONDITION MIN. TYP. MX. UNIT Capacitance input to C S V = 0V, f = MHz (Note ).0 pf Isolation resistance R S R.H. 0%, V S = 00 V (Note ) 0 0 Ω C, minute 000 V rms Isolation voltage BV S C, second, in oil 0000 DC, minute, in oil 0000 Vdc

4 Switching Characteristics (Unless otherwise specified, Ta = 0~00 C, =.~0 V.) CHRCTERISTIC to logic LOW to logic HIGH Switching time dispersion Between ON and OFF SYMBOL tphl tplh tplhtphl TEST CIRCUIT 7 CONDITION MIN. TYP. * MX. UNIT = 0 m, CL = 00 pf = 0 V = 0 m, CL = 00 pf = 0 V = 0 m, CL = 00 pf = 0 V ns ns 0 ns Output fall time tf = 0 m, = 0 V 9 ns Output rise time tr = 0 m, = 0 V 7 ns to logic LOW to logic HIGH Common-mode transient Immunity at HIGH level Common-mode transient Immunity at LOW level tphl = 0 m 0 00 ns 8 tplh = 0 m 0 00 ns CMH VCM = 000 Vp-p, = 0 m, = 0 V, Ta = C 0000 V/us 9 CML VCM = 000 Vp-p, = m, = 0 V, Ta = C 0000 V/us *ll typical values are at Ta = C. TEST CIRCUIT : VOL TEST CIRCUIT : VOH 0.uF V OL I OL V VF V OH V 0.uF I OH TEST CIRCUIT : ICCL I CCL TEST CIRCUIT : ICCH I CCH TEST CIRCUIT : IOSL 0.uF I OSL TEST CIRCUIT : IOSH 0.uF I OSH

5 TEST CIRCUIT 7: Switching Time Test Circuit 0.uF CL 90% tp HL tp LH 0% VOH 90% CL: total capacitance tf.v.v 0% 0% tr VOL TEST CIRCUIT 8: Switching Time Test Circuit 0.uF CL kω V 0Ω.V 0% VOH VOL tp HL tp LH CL: stray capacitance of probe and wiring (to pf) TEST CIRCUIT 9: Common-Mode Transient Immunity Test Circuit SW B VCM uF 90% 0% VCM SW : I F=0m SW B : I F=m tr 7V tf 000V V CMH CML CM H = 800 (V) (V) CM = 800 tr ( μs) L tf ( μs ) CM H (CM L ) is the maximum rate of rise (fall) of the common mode voltage that can be sustained with the voltage in the high (low) state

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