Source: CERN, ÖAW

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1 Source: CERN, ÖAW

2 Real Time for Real-Time Networks Georg Gaderer Fachbereichskolloquium Hochschule Ostwestfalen-Lippe, Centrum Industrial IT

3 Course of Talk Introduction Applications for Synchronized Clocks Clock Synchronization Basics Clock Synchronization Protocols Clock and Oscillator Characterization Clock Synchronization in Wireless LANs Outlook

4 Introduction

5 Synchronization as Network Service Synchronization Network Reference clocks know correct time Daemons consult reference clock and Distribute time to clients

6 Synchronization vs. Syntonization Synchronization is the transfer of an absolute timescale to distributed nodes ideal result: same (absolute) notion of time in the system Syntonization is the transfer of a frequency to distributed nodes Ideal result: phase stable, but not mandatory aligned frequency in a distributed system

7 Clock Synchronization Principles Time is sent from sender to receiver Network delay deteriorates result Must be added to transmitted value Network delay must be measured Round-trip delay Time stamps are inserted in messages Node knows the communication delay Jitter deteriorates measurement It s 12:00 It s 12:00 t =? It s 13:02 It s 12:05 t = 02 It s 13:03

8 Various Approaches precision, accuracy 1ks 1s 1ms 1µs 1ns Clock synchronization accuracy in distributed systems LANs (SW) PLL Manual reading (clock tower) Manual reading (tel.) LANs (HW) GPS NTP 10 m 100 m 1 km distance internal clock synchronization C p (t) - C q (t) ε {p,q} external clock synchronization C p (t) - t ε p

9 Applications for synchronized Clocks

10 What for? Application Fields Distributed measurement systems Synchronized data sampling Distributed control systems Correlation of sensor signals Synchronization of actors Reliable data transmission Secure data transmission Avoidance of replay attacks Network access Basis for TDMA schemes

11 Three Dimensional Localisation with synchronized Clocks 3D localization in wireless networks Principle: differential delay measurements Advantage: unmodified mobile devices Requirement: exact arrival time measurements at access points (ns-range) Additional requirements: If location is safety critical: fault tolerance System validation: accurate models As much state of the art-reuse as possible

12 Network-based Control Systems Fieldbus/Ethernet means Sampling of data Network/processing time Introduction of (variable) delays Delays can be held constant with synchronized clocks Correlation of sensor/actuator actions Set value Controller Delay Sensor Actuator Controller Actuator Plant Delay Sensor

Large Scale Physics: CERN (The White Rabbit Protocol) Large-Scale Distributed Network Timing system is needed to control the magnets of the accelerator ring 2000 Nodes

13 Large Scale Physics: CERN (The White Rabbit Protocol) Large-Scale Distributed Network Timing system is needed to control the magnets of the accelerator ring 2000 Nodes Circumfence: 27km Hard Timing Requirements (100ps) Typical Example Emergency Shut off Energy in the beam has to be lead out controlled Time to react ~0,5-3s

14 Clock Synchronization Basics

15 A Brief History of Clocks Goal for Test and Measurement Industry for 2020 Maximum Uncertainty (per day) 1ps 1ns 1µs 1ms 1s Temperature Compensation Burning Candles (Alfred the Great {Saxonian King}) Maser Clocks NIST F-1 (fountain) First Cesium Clock Quartz Crystal Free Pendlum Clocks OCXO John Harrison s Clock Huygen Pendlum syn1588 Clock Synchronization (Ethernet) REMPLI Clock Synchronization (PLC) Standard PLC ClockSync Network Time Protocol (NTP) PhD around ks Stonhenge Hydro-mechanical (China) Year

16 Quality of Clocks Problem: Determine the local quality w/o reference Clock Accuracy Precision Time Interval Error TIE

17 Clock Metrology and Modeling: Clock CharacterizationDefinition of the Allan-deviation Definition of the Allan-deviation (ideal), using the fractional frequency error Estimators Frequency error samples Estimation using the fractional phase error

18 ALLAN-Deviation Typical Ranges

19 Oscillator Modeling Oscillators are the time base for todays clocks Various technologies Mechanical Quartz Quantum Effects Today typically quartz technology is is used For a proper design a model of the clock and the oscillators is needed

20 Oscillator Model Concept In order to model the Power Spectral Density of the oscillator noise:

21 In-System Metrology Often, an application needs to know the quality of its own synchronized clock Measurement to start application services Confidence for data collection and correlation As shown in [Lamport 1978] event ordering is no more possible after a certain deteroation Problem: Not directly observable due to cascaded structure A metrology in distributed systems is needed

22 Clock Synchronization Protocols

23 GPS

24 NTP - Network Time Protocol Structure Minimum-weight spanning tree of time severs Remote clock reading of all peer time servers Well engineered statistical algorithms for data filtering and clock selection

25 IEEE 1588 with HW Timestamping

26 State of the Art: Democratic approaches

27 Real-Live Aspects of Clock Synchronization

28 Adder Based Clock Structure

29 The perfect clock?! 0.05 Clock Offset asynchronos.fiss-oeaw.at vs. NTP Pool Offset (ms) Time before :00 (hours) 50 0

30 Measurements not (easy) simulateable effects

31 Master Group Concept Fault tolerant backbone: Mastergroup concept Fault tolerant clock agreement Possibly more expensive Enhanced hardware Better oscillators Fully IEEE1588 compliant slaves One dedicated node to act as a group speaker Presumably the switch

32 Hardware Measurements: Master Fault

33 Clock Synchronization in Wireless LANs

34 Synchronizing Clocks with WLAN Same idea as in Ethernet Attach to interface between PHY and MAC

35 Digital Receiver Design Analog demodulation with direct conversion Analog prefilter Sampler Matched filter Interpolator filter and decimator

36 Hardware Setup Altera StratixIIGX FPGA Board: WLAN PHY and MAC Signal Processing in the FPGA LAN interface to a network SMILE WLAN Signal Aquisition Board Demodulator ADCs, DAC PLL Control Functions in the FPGA

37 802.11b Matlab Receiver Model Sender: Data Source, Scrambler, M-DPSK Modulator, Barker Encoder, Raised Cosine Transmit Filter Channel: Additive White Gaussian Noise, Frequency and Phase Offset, Fractional Delay Receiver: Raised Cosine Transmit Filter, Timing Recovery, Phase Recovery, Barker Decoder, MDPSK Decoder, Descrambler

38 Timing Recovery Baseband Signal Function: Recover the timing information of the sampled complex signal x. Decimate x when it has its greatest magnitude. Principles: feedforward or error-tracking (or feedback, closed-loop) Selected design: Spectral line generating timing recovery operated in feedforward mode Sampler Matched Filter Interpolator Filter and Decimator Fixed Clock Nonlinearity (magnitude squared) Digital Filter -(1/2π)arg(.) Timing Recovery

39 Timing Recovery Supporting Timestamping Extreme requirements for localization: ns accuracy out of 1 µs symbols consisting of 91 ns raised cosine pulses Feasible solution: highly accurate calculation (18 bit), superior filtering, propagate timing through system Logic elements are triggered by enable pulses, but the Sub Symbol Timing (SST), containing the rounding error, must be carried along with these. Given a system clock frequency of 220 MHz, the enable pulse frequency is 4.54 ns. With 8 bit SST the granularity is 17.2 ps. 1 µs

Phase Recovery Removal of residual frequency and phase offset caused by imperfect matching between modulation and demodulation frequency Phase estimation: L 1 phase = arg ( M k = 1 With M=2 for BPSK,

40 Phase Recovery Removal of residual frequency and phase offset caused by imperfect matching between modulation and demodulation frequency Phase estimation: L 1 phase = arg ( M k = 1 With M=2 for BPSK, M=4 for QPSK, L= averaging window Formula is ambigious. Ambiguity can be removed under the assumption that phase jumps >π/m will not occur (unwrapping). Rotate complex signal by unwrapped phase (0<= phase<2π) x k ) M

41 Outlook

42 Conclusion and Outlook: asymmetric delays

43 Review of achieved goals PSynUTC IMAGINE ε-wifi REMPLI flex WARE CERN

44 Conclusion and outlook: Layer 2 clock synchronization Cross layer vs. Layer 2 implementation of clock synchronization

45 Conclusion and outlook: Open issues New physical layers Single layer synchronization Security aspects of clock synchronization Redundant networks Asymmetric delays Frequency distribution Clock-less master group speaker

Time transfer over a White Rabbit network

Time transfer over a White Rabbit network Namneet Kaur Florian Frank, Paul-Eric Pottie and Philip Tuckey 8 June 2017 FIRST-TF General Assembly, l'institut d'optique d'aquitaine, Talence. Outline A brief