MSI2001 USB2.0 High-Speed (480Mbps) Analog Switch

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1 \ General Description The MSI2001 is a dual-pole double-throw (DPDT) analog device aimed for fast signals switching applications of portable electrical devices. It is especially designed for high-speed (HS) USB2.0 (480Mb/s) applications including low- and full-speed USB signaling in mobile phones. The MSI2001 features low on-channel resistance with low on-channel capacitance allowing little attenuation and distortion during bi-directional HS signal routing. High crosstalk and off-isolation result in minimum noise interference with good signal integrity. Also the device features the wide bandwidth and very low current consumption resulting high performance in HS signal switching applications. The MSI2001 is available in Halogen-Free, RoHS compliant 10 pins, ultra small QFN & MSOP and can operate over -40 C to +85 C ambient temperature range. For more detailed information, please contact your local MagnaChip sales office in world-wide or visit MagnaChip s website at MSI2001 USB2.0 High-Speed (480Mbps) Analog Switch Features Applications ±8kV Human Body Model (HBM) ESD protection on all pins Low C ON : 7pF 3.6V DD Low R ON : 4.0Ω 3.0V DD -3dB bandwidth : 720MHz (Typ) Low supply current in standby mode (<1µA) and under wide control voltage range 2.6V DD ) High crosstalk : -45dB (Typ) Power-Off protection (V DD =0V) and Power-On protection (V DD 0V) on D+ & D- tolerate up to 5.25V V DD +0.3V signals can be handled under V DD supply voltage condition Halogen-free 10 leads QFN package & MSOP package USB2.0 Switching HS differential signals applications Portable devices (Cell phone, PDAs, Notebook Computers) Ordering Information Part Number Top Marking Ambient Temperature Range Package [mm] MSI2001QH S1U 1.4mm x 1.8mm x 0.5mm, 10 leads QFN -40 to +85 MSI2001MH S2U 3.0mm x 4.9 mm 1.1 mm, 10 leads MSOP RoHS Status Halogen-Free Typical Application V DD = V_BATT BASEBAND PROCESSOR USB TRANSCEIVER DA- DB- D- USB SOCKET CONNECTION EMBEDDED STORAGE MULTIMEDIA PROCESSOR USB TRANSCEIVER DA+ DB+ D+ 1

2 Pin Configuration /OEB V DD V DD pins QFN Package (Top View) 1 DB+ 7 1 DB- 6 2 D+ D- 10 pins MSOP (Top View) /OEB DA+ DA- GND Block Diagram D+ D- /OEB DA+ DB+ DA- DB- 2 9 DB+ D+ 3 8 DB- D- 4 7 DA+ GND 5 6 DA- Pin Description Pin Assignment /OEB D+, D- DA+/-, DB+/- VDD GND Description Output Enable Bar (Active Low) Select A/B Common Data Ports A/B Data Ports DC Supply voltage Input Pin Ground Pin Truth Table OEB Function X H Disconnect L L Select A port (D+/- =DA+/-) H L Select B port (D+/-=DB+/-) 2

3 Absolute Maximum Ratings (Note 1) Symbol Parameter Min Max Unit V DD DC Supply Voltage on VDD pin V V Input Voltage V V IN/OUT Input Voltage in D*, DA/B* DA/B+, DA/B V DD +0.3 V D+,D- when V DD > V DD +0.3 V D+,D- when V DD = V I IN/OUT In/Out Current in D*, DA/B* 50 ma ESD HBM (Note 2) 8000 MM (Note 3) 400 CDM (Note 4) 1500 T S Storage Temperature C Note 1: Stresses beyond the above listed maximum ratings may damage the device permanently. Operating above the recommended conditions for extended time may stress the device and affect device reliability. Also the device may not operate normally above the recommended operating conditions. These are stress ratings only. Note 2: ESD tested per JESD22A-114E. Note 3: ESD tested per JESD22A-115. Note 4: ESD tested per JESD22C-101. Recommended Operating Conditions Symbol Parameter Min Max Unit V DD Supply Voltage V V Input Voltage (Note 1) 0 V DD V V IN/OUT Input Voltage in D*, DA/B* 0 V DD V T A Operating Temperature C Note1: pin input must be held HIGH or LOW and it must not float during operation. V DC Electrical Characteristics All listed typical values are at 25 C unless otherwise specified. Boldface values indicate -40 C to +125 C of T J. Symbol Parameter Test Conditions VDD(V) Min Typ Max Unit V _H V _L Input High Voltage Input Low Voltage 3 V DD 3.6V 3.0 ~ V V DD = 4.3V V 3 V DD 3.6V 3.0 ~ V V DD = 4.3V V I Input Leakage Current 0 < V V DD µa I CC Quiescent Supply Current V = 0 or V DD, I IN/OUT = 0A µa I CCT Increase in I CC on V DD pin per Voltage V = 2.6V µa I LEAK OFF State Leakage Current on D±, DA±, DB± 0 < V D±, DA±, DB± 3.6V µa I OFF R ON R ON Power OFF Leakage Current on D± (See Figure 1) On-Resistance (See Figure 2) On-Resistance Match Between Channels (Note 1) V D+,D- = 4.3V µa V IN/OUT = 0.4V, I IN/OUT = 8mA Ω V IN/OUT = 0.4V, I IN/OUT = 8mA Ω R FLAT_ON R ON Flatness (Note 2) 0 < V IN/OUT 1.0V, I IN/OUT = 8mA Ω Note 1: R ON(MAX) = R ON (Channel1)-R ON (Channel2) Note 2: R FLAT_ON is defined as the difference between the maximum and minimum value of R ON measured over specified V IN/OUT range. 3

4 AC Electrical Characteristics (Note 1) All listed typical values are at 25 C unless otherwise specified. Symbol Parameter Test Conditions VDD(V) Min Typ Max Unit Time & Frequency t ON t OFF t PD_RISE t PD_FALL t BBM t SK(O) t SK(P) BW Turn-On Time (See Figure 3) Turn-Off Time Rise/Fall Propagation Delay (See Figure 4) Break-Before-Make Delay Time (See Figure 5) Output Skew between Switches (See Figure 4) Output Skew of same Switch (See Figure 4) -3dB Bandwidth (See Figure 6) Isolation & Crosstalk O IRR X TALK Capacitance Off Isolation (See Figure 8) Channel Crosstalk (See Figure 9) V IN/OUT = 0.8V, R L =, C L = 5pF, V _H = V DD, V _L = 0 V IN/OUT = 0.8V, R L =, C L = 5pF, V _H = V DD, V _L = ~ ns 3.0 ~ ns R L = R S =, C L = 5pF ns R L = R S =, C L = 5pF 3.0 ~ ns Skew between Switch 1 and Switch 2 R L = R S =, C L = 5pF Skew between Opposite Transitions in Same Switch 3.0 ~ ns 3.0 ~ ns R L = R S =, C L = 0pF R L = R S =, C L = 5pF 550 f = 240MHz, R L = R S = db f = 240MHz, R L = R S = db MHz C IN Pin Input Capacitance f = 240MHz pf C ON C OFF ON Capacitance (See Figure 9) OFF Capacitance (See Figure 10) Note 1: These parameters are not production tested: Guaranteed by design correlation. f = 240MHz pf f = 240MHz pf 4

5 Typical Operating Characteristics Eye diagram of MSI2001 Off Isolation Crosstalk 5

6 Test Diagrams I OFF V IN/OUT = 4.3 D* = 0 or 4.3V V DD = 0 0 < V IN/OUT 3.6V D* =0 or V DD Figure 1. l OFF & I LEAK test circuit V AB V DD = 3.0V B A V IN/OUT =0.4V D* 8mA V DD = 4.3V DA/B* I LEAK =0 & V DD for DA, DB selection R ON = V AB / 8mA Figure 2. R ON test circuit V DD = 3.6V V _H t rise, t fall < 5ns 0 < V IN/OUT V DD V OUT/IN R L C L V _L 50% Input =0 or V DD V V OUT 0.9xV OUT Switch Output 0V 0.1xV OUT t ON t OFF Figure 3. t ON, t OFF test circuit 6

7 D IN+ 0V 400mV D IN- DA OUT+ DA OUT- DB OUT+ 50% 50% t PD_RISE+_A 50% 50% t PD_FALL-_A t PD_RISE+_B 50% t PD_FALL+_A t PD_RISE-_A t PD_FALL+_B RISE-TIME PROPAGATION DELAY t PD_RISE+, t PD_RISE- FALL-TIME PROPAGATION DELAY t PD_FALL+, t PD_FALL- OUTPUT SKEW BETWEEN SWITCHES t SK(O) = t PD_RISE+/-_A - t PD_RISE+/-_B or t PD_FALL+/-_A - t PD_FALL+/-_B OUTPUT SKEW SAME SWITCH t SK(P) = t PD_RISE+_A/B - t PD_FALL+_A/B or t PD_RISE-_A/B - t PD_FALL-_A/B DB OUT- 50% t PD_FALL-_B t PD_RISE-_B Figure 4. Rise/ Fall propagation delay & Skew V DD = 3.6V 0 < V IN/OUT V DD V OUT/IN R L C L V DD 0 V V t BBM =0 or V DD V OUT/IN 50% 50% Figure 5. Break-Before-Make time 7

8 D- D* DA/B* Figure 6. -3dB Bandwidth D+ Signal In Signal Out Signal In Network Analyzer Internal Source Network Analyzer Internal Source Signal Out DA- DB- DA+ DB+ Figure 7. Off Isolation D- D+ Signal In Network Analyzer Internal Source Signal Out DA- DB- DA+ DB+ Figure 8. Channel Crosstalk 8

9 Capacitance Meter f = 240MHz Capacitance Meter DA* or DB* D* Figure 9. ON Capacitance DA* or DB* = 0V or V _H f = 240MHz D* = 0V or V _H Figure 10. OFF Capacitance 9

10 Physical Dimensions 10-Lead, 1.4mmX1.8mm Thin QFN Dimensions are in millimeters, unless otherwise noted. 10

11 Physical Dimensions 10-Lead, 3.0mmX4.9mm MSOP (Molded Small Outline Package) Dimensions are in millimeters, unless otherwise noted. Symbol Dimension (mm) Min Nom Max A A A b c D E E e 0.50 BSC L L Ref L BSC θ 0 8 θ DIV D NAME DATE TITLE MSOP10 PACKAGE DRAWING DES.BY Lewis. Park DWG.NO N/A APR.BY SD. Lee REV.NO 0 SHEET 1/1 SCALE NA UNIT mm 11

12 Worldwide Sales Support Locations U.S.A Sunnyvale Office 787 N. Mary Ave. Sunnyvale CA U.S.A Tel : Fax : americasales@magnachip.com U.K Knyvett House The Causeway, Staines Middx, TW18 3BA,U.K. Tel : +44 (0) Fax : +44 (0) europesales@magnachip.com Japan Osaka Office 3F, Shin-Osaka MT-2 Bldg Miyahara Yodogawa-Ku Osaka, Japan Tel : Fax : osakasales@magnachip.com Taiwan R.O.C 2F, No.61, Chowize Street, Nei Hu Taipei,114 Taiwan R.O.C Tel : Fax : taiwansales@magnachip.com China Hong Kong Office Office 03, 42/F, Office Tower Convention Plaza 1 Harbour Road, Wanchai, Hong Kong Tel : Fax : chinasales@magnachip.com Shenzhen Office Room 1803, 18/F International Chamber of Commerce Tower Fuhua 3Road, Futian District ShenZhen, China Tel : Fax : Shanghai Office Ste 1902, 1 Huaihai Rd. (C) Shanghai, China Tel : Fax : Korea 891, Daechi-Dong, Kangnam-Gu Seoul, Korea Tel : Fax : ~9 koreasales@magnachip.com DISCLAIMER: The Products are not designed for use in hostile environments, including, without limitation, aircraft, nuclear power generation, medical appliances, and devices or systems in which malfunction of any Product can reasonably be expected to result in a personal injury. Seller s customers using or selling Seller s products for use in such applications do so at their own risk and agree to fully defend and indemnify Seller. MagnaChip reserves the right to change the specifications and circuitry without notice at any time. MagnaChip does not consider responsibility for use of any circuitry other than circuitry entirely included in a MagnaChip product. is a registered trademark of MagnaChip Semiconductor Ltd. 12