Tile-TEK. Philips Digital Photon Counting User Manual. Version: 1.02, Date:

Transcription

1 Philips Digital Photon Counting Tile-TEK User Manual Version: 102, Date:

2 Philips Digital Photon Counting Pauwelsstrasse 17 D Aachen Germany

3 Contents I Introduction 11 1 General Operating Notes 13 2 Maintenance Service Cleaning 15 3 Connecting the PDPC-Tile-TEK 31 Placement of Electronic Devices 32 Connecting the Laptop 33 Connecting the Programmable Power Supply 34 Connecting the Base Unit 35 Connecting the DPC Tile Sensors II The Digital Photon Counter (DPC) DPC Sensor Types DPC3200 Die Sensor DPC3200 Tile Sensor 23 5 Principle of Operation 51 Event Acquisition 52 Trigger Logic 53 Validation Logic 54 Inhibit Memory 55 Bias Voltage 56 DPC3200 Event Processing 561 Timestamp Generation 562 Timestamp Skew Correction 563 Photon Count Saturation Correction 564 Event Filtering 57 RTL Refresh 58 DPC3200 SYNC Processing 581 Neighbor Logic 582 SYNC-IN/OUT Processing Koninklijke Philips NV Page 3

4 III Control Software: DPCShell 47 6 DPCShell 49 7 Files and Directories 51 8 General Command Structure 53 9 DPCShell Commands 91 Power Commands 92 Test Commands 93 Tile Commands 94 VBias Commands 95 Calibration Commands 96 Configuration Commands 97 Capture Commands 971 Coincidence Measurements 972 Measurement report Hardware Addresses Address Hierarchy Addressing Rules 69 11Advanced Configuration SYNC settings Controller SYNC settings 71 12Miscellaneous Scripts 77 13File Format Descriptions 131 Listmode File Format (ASCII) 132 Listmode File Format (binary) 1321 Header 1322 Data 133 Dark Count Map Format 134 Inhibit Map Format IV Analysis Tools and Utilities 87 14Dark Count Map Viewer 89 Page 4 Koninklijke Philips NV 2016

5 V Recipes: Best Practice Procedures 91 15Sensor Calibration Recipe 93 16Temperature Stabilization Recipe 95 17Skew Correction Recipe 97 18Use SYNC settings to configure hardware coincidence checking Use SYNC settings to trigger slave tiles by a master tile 101 VI Appendix 103 A FAQ: Frequently Asked Questions 105 Glossary 107 B Operating Conditions 109 C Mechanical Dimensions 111 C1 Tile-TEK Base Unit Dimensions 114 D Miscellaneous D1 Open Source Software D2 Service and Support Manufacturers Declaration of Conformity Document Change History 119 List of Figures 123 List of Tables 125 Koninklijke Philips NV 2016 Page 5

6 Publications Based on the PDPC-TEK For publications based on work executed on the PDPC-TEK, please: Cite this manual as: Philips Digital Photon Counting; Tile-TEK - User Manual v102; published Ask for permission before you use material (eg figures) from this manual Send a publication copy for review to pdpc-support@philipscom before submission, as it is stated in the TEK agreement Thank you! Page 6 Koninklijke Philips NV 2016

7 Please be aware that the PDPC Technology Evaluation Kit is designed for evaluation purposes only Sensor specifications, software and hardware interfaces, data formats, etc may be changed without prior notice This manual version refers to dpcshell version 065 and tile firmware version 159 Koninklijke Philips NV 2016 Page 7

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9 Conventions Used in this Manual Marks important information Marks warnings Ignoring this can disturb the system operation, damage the setup, or be dangerous Marks detailed technical information Gives answers to frequently asked questions (FAQs) Gives references to external documentation Koninklijke Philips NV 2016 Page 9

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11 Part I Introduction Koninklijke Philips NV 2016 Page 11

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13 1 General Operating Notes Please remember that the Philips Digital Photon Counter is a device to measure very small light intensities (single photons) High light intensities during operation (especially with applied bias voltage) may disturb the sensor operation and may even damage the sensor Please do not operate the sensor eg in full sunlight, but cover it to minimize disturbances by high light intensities The DPC tile sensors are very sensitive equipment, especially on the side of the glass plate, where the bond wires are located It is very easy to damage these bond wires, which will destroy the tile Avoid touching the tiles at these positions The DPC sensors should be handled with extreme care The tile sensors can be damaged by electrostatic discharge (ESD) Please take appropriate safety measures to avoid ESD damage by eg wearing an ESD wristband Please check the sensor temperatures at regular intervals A sudden temperature increase can indicate a hardware problem, eg caused by excessive currents Do not touch the sensors during operation It is advised to only use the enclosed power supply If you plan to use another power supply, verify that it matches the specifications mentioned in B Koninklijke Philips NV 2016 Page 13

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15 2 Maintenance 21 Service The product contains no user servicable parts Please contact the support if you experience malfunctioning The product fuse(s) should only be replaced when instructed by the support Replace only with fuses that match the base unit labeling 22 Cleaning For best performance the glass plate on top of the DPC tile sensor should be kept clean The DPC tile sensor should only be cleaned with a soft cloth or tissue Always wipe from the center of the DPC tile sensor in the direction of the tile edges, to minimize the danger of damage to the glass edges or bond wires Isopropyl alcohol or other chemicals may attack the glue between the glass pate and the sensor dies of the tiles, so they should be used carefully and sparsely for cleaning Koninklijke Philips NV 2016 Page 15

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17 3 Connecting the PDPC-Tile-TEK 31 Placement of Electronic Devices All devices should be placed on flat, dry, and stable surfaces The base unit and power supply should be positioned on their feet only Do not cover ventilation slits There should be a clearance of at least 5 cm to ensure proper air-flow The DPC sensors should be fixed on a stable surface during operation When they are operated upside-down or hanging from a mounting fixture it must be assured that they are properly fixed Only use the provided mounting holes to mount the sensors 32 Connecting the Laptop Use only the provided power supply to connect the laptop to a power socket Ensure that your local voltage and current ratings match the specifications printed on the power supply Koninklijke Philips NV 2016 Page 17

18 Never operate, when the power plug does not match your socket! Do not force power plugs into non-fitting sockets! Contact the support when the supplied power cables do not fit your local conditions The default username and password are: Login: pdpc Password: pdpc 33 Connecting the Programmable Power Supply Ensure that your local voltage and current ratings match the specifications printed on the power supply Verify that the voltage label on the back of the programmable power supply matches your local voltage supply Never operate, when the power plug does not match your socket! Do not force power plugs into non-fitting sockets! Contact the support when the supplied power cables do not fit your local conditions Use only the provided power cable to connect the programmable power supply to a power socket Consult the provided manual of the programmable power supply for details 34 Connecting the Base Unit Use only the enclosed power cable to connect the base unit to the programmable power supply Page 18 Koninklijke Philips NV 2016

19 Red plug: Positive output; 5 V (red socket; +) Black plug: Negative output; 0 V (black socket; -) Set the output of the programmable power supply to 5 V For safety reasons it is suggested to set the current limit to the value corresponding to the number of connected tiles given in table 31 Consult the provided manual of the programmable power supply for details The base unit is powered by enabling the output of the programmable power supply with the ON/OFF button Table 31: Approximate current settings for the base unit input voltage Connected Tiles Current Limit@5 V 1 ca 23 A 2 ca 32 A 3 ca 41 A 4 ca 50 A 35 Connecting the DPC Tile Sensors The sensors are not hot-pluggable Only connect/disconnect sensors, when the base unit is physically switched off! The four connectors for the DPC tile sensors are located on top of the base unit Koninklijke Philips NV 2016 Page 19

20 To connect a DPC tile sensor use the enclosed flat cable and connect it with the matching side to one of the tile connectors The flex should be directed outwards, ıe away from the base unit center Connect the other side of the flex cable to the back of a DPC tile sensor Use the cable fixture on the back of the tile frame to fix the flex cable Verify that the flex cable connectors are properly connected on both sides and not eg shifted by one pin line Page 20 Koninklijke Philips NV 2016

21 Part II The Digital Photon Counter (DPC) Koninklijke Philips NV 2016 Page 21

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23 4 DPC Sensor Types 41 DPC3200 Die Sensor The DPC3200 die sensor is the piece of silicon device performing the actual data acquisition and photon counting Each silicon die consists of four pixels (see figure 41), which contain the Geiger-mode cells (SPADs) and deliver the photon count values, and a twin Time-to-Digital-Converter (TDC) for timestamp generation As each cell can only detect one photon per acquisition, the number of cells per pixel also defines the maximum photon count value, eg the DPC3200 can count only up to 3200 photons between two cell recharge cycles The sensor operates autonomously by running through a configurable event acquisition sequence, which is started by an internal trigger The internal trigger signal defines the moment of timestamp generation (chapter 51) Four different trigger schemes (chapter 52) and a second, higher level validation threshold (chapter 53) can be used to suppress dark count events and to reduce the sensor dead time Per event the sensor generates four photon count values (one per pixel) and one event timestamp (out of two TDC values) The layout of a single die is depicted in figure 41 The four pixels are arranged in a 2 2 matrix They are further divided into four sub-pixels, which are used to configure the different trigger schemes (52) A die consists of 100 rows and 128 columns of single photon avalanche diodes 42 DPC3200 Tile Sensor The PDPC tile DPC3200 consists of 16 individual DPC3200 die sensors, arranged in a 4 4 matrix (figure 42) on the tile PCB The dies and bond wires are protected by a thin glass plate All dies on the tile sensor have been selected Table 41: Geometrical properties of the DPC3200 die sensor Physical Characteristics DPC3200 Cells per Pixel 3200 Cells per Sub-Pixel 800 Cell Size 594 µm 64 µm Active Pixel Area mm 32 mm Koninklijke Philips NV 2016 Page 23

24 bon d w ires (0, 99) (127, 99) sub-pi xe l 4 sub-pi xe l 3 sub-pi xe l 2 sub-pi xe l 3 sub-pi xe l 2 sub-pi xe l 3 row pixel 4 sub-pi xe l 3 pixel 1 74 sub-pi xe l 1 sub-pi xe l 4 sub-pi xe l sub-pi xe l 2 sub-pi xe l sub-pi xe l 1 31 sub-pi xe l 4 0 pixel 3 sub-pi xe l 4 pixel 2 24 sub-pi xe l bon d w ires (0, 0) (127, 0) column Figure 41: DPC3200 die sensor layout Page 24 Koninklijke Philips NV 2016

25 to have the same breakdown voltage, so only a single bias voltage supply is needed per tile An FPGA is located on the back of the tile sensor, which takes care of the configuration and synchronization of the individual sensor dies, and is also responsible for the sensor data post-processing, ie timestamp calculation, skew correction (optional), and photon count correction 1 (optional) A flash memory chip on the tiles stores calibration data and the inhibit maps (chapter 54) to disable individual cells on the sensor dies On the back of the tile PCB a temperature sensor is available, which, eg, can be used to adjust the bias voltage during operation to the current tile temperature The tile FPGA can be configured to, eg, remove unwanted events from the data stream (chapter 564), to block event forwarding via an external gate (chapter 582), or to send trigger signals to the die sensors (chapter 582 and 581) 1 eg to correct for saturation effects Table 42: Properties of the DPC3200 tile sensor Characteristics Number of Dies 16 (4 4) Outer Dimension ( ) mm 2 Thickness of Glass-Plate Max Event Rate 100 µm (+75 µm glue) 122 k cps per die This is the maximum event processing rate of the tile FPGA Koninklijke Philips NV 2016 Page 25

26 die cell row numbering (y) DPC bond wires die 3 die 7 die 11 die seen from top (glass position) die 2 die 1 pixel 2 pixel 1 pixel 3 pixel 4 die 0 die 6 die 5 die 4 die 10 die 9 tile connector die 8 die 14 die 13 die 12 y x cell column numbering (x) Figure 42: DPC3200 tile sensor layout Page 26 Koninklijke Philips NV 2016

27 5 Principle of Operation By default the sensors are operated on a 200 MHz clock, corresponding to a 5 ns clock cycle Timing values in this manual are given for this default clock, unless otherwise stated 51 Event Acquisition The DPC3200 sensors operate with an event based acquisition sequence, which is shown in figure 51 Each sensor operates independently from the other sensors, thus only die sensors that detect sufficient photons to reach the configured thresholds will start the acquisition sequence Due to the common system clock they share the same timing reference Ready State In the beginning the die sensor is in the Ready State, where the micro-cells are charged, and the sensor state machine is waiting for the start of the photon event The sensor will stay in this state until a trigger occurs There is no recharge of the micro-cells in this state, unless the RTL refresh option is enabled (chapter, 57), meaning that dark counts can accumulate over time until the trigger condition is reached Trigger The event acquisition is started by a trigger signal, which is generated internally when the configured trigger scheme is fulfilled (chapter 52) The sensors (5-40) ns (0-20) μs 680 ns (5-80) ns ready valid? yes integration readout recharge no Trigger Figure 51: Event acquisition sequence of the DPC3200 sensor for one event Koninklijke Philips NV 2016 Page 27

28 can also be triggererd externally via a SYNC signal, which is ORed with the internal trigger logic An external trigger will always overrule the validation logic The leading edge of the trigger signal defines the point in time when the timestamp is generated The chip needs 2 clock cycles (corresponding to 10 ns for the default 200 MHz system clock) to switch from the detection of the trigger signal into the validation interval As the trigger signal is asynchronous to the system clock, there is one additional clock cycle (5 ns) delay until the trigger signal is processed by the internal event acquisition In total there will then be a delay of (0 5) ns + 10 ns + <validation_interval_length> from the moment of trigger generation to the start of the following phase This is independent of the timestamp generation The timestamp will be taken at the exact moment of trigger occurrence! Validation Interval The validatation interval gives a second threshold to separate real photon events from dark counts After a trigger occured, the sensor waits for a configurable interval of (5 40) ns for more micro-cell discharges At the end of this interval it is checked if a configurable validation scheme is fulfilled (chapter 53), which will validate the event If this validation scheme is not fulfilled the event will be invalidated and the sensor will go directly to the recharge phase The validation interval will not be aborted, when the validation condition is fulfilled earlier The sensor will always wait for the full configured length Supported values for the validation interval are 5, 10, 20, and 40 ns Integration Interval After successfull validation the sensor enters the photon integration phase, which can be configured between (0 20) µs During the integration phase the sensor waits for more photons from this event The integration phase should be configured long enough to collect all delayed photons of this single photon event, eg from the decay of a crystal scintillation event or a laser pulse Page 28 Koninklijke Philips NV 2016

29 The integration interval can be seen as a simple idle period, where the sensor will just wait for more cell discharges Supported values for the integration interval are 0, 5, 15, 25, 45, 85, 165, 325, 645, 1285, 2565, 5125, 10245, and ns Readout After the integration interval is finished the sensor starts to read the state of the microcells row by row The processed row are already recharged during this phase The number of discharged cells is summed up on pixel level, giving one separate photon count value per pixel At the end of the summation process these four photon count values and the trigger timestamp are sent out from the sensor to the external data processing Cell discharges that happen during the readout phase are still counted, as long as they occur in cell rows that have not yet been read Recharge At the end of the acquisition sequence a global sensor recharge is done, and the sensor is ready for the next event acquisition The standard length of this recharge phase is 20 ns This recharge phase can technically be adjusted in length, but it is advised to keep it at the default value Longer or shorter intervals can disturb the acquisition process and lead to undesired side-effects For internal data processing purposes, the recharge interval is internally divided into the actual cell recharge of 10 ns and a 10 ns idle interval (holdoff) The length of these intervals should not be changed 52 Trigger Logic The trigger defines the moment, when the event timestamp is generated and the start of the acquisition sequence is initiated (delayed by ns) Koninklijke Philips NV 2016 Page 29

30 bond wires sub-pixel 1 sub-pixel 4 sub-pixel 2 sub-pixel 3 sub-pixel 2 sub-pixel 3 sub-pixel 1 sub-pixel 4 sub-pixel 1 sub-pixel 4 pixel 1 pixel 4 sub-pixel 2 sub-pixel 3 sub-pixel 2 sub-pixel 3 pixel 2 pixel 3 sub-pixel 1 sub-pixel 4 bond wires (a) DPC3200 division in sub-pixels (b) DPC3200 sub-pixel trigger logic Figure 52: DPC3200 trigger generation The die trigger is generated by one of the pixels, when the configured trigger scheme is fulfilled The individual sub-pixels fire at single photon level A configurable trigger scheme provides a stochastic threshold to suppress dark count noise events For this threshold the pixel logic can be adjusted, to only generate a trigger, when photons are detected in different sub-pixels (figure 52) Four different trigger schemes are supported for the DPC3200, which are based on different boolean interconnections of the four sub-pixels of a pixel (table 51) For example in trigger scheme 1 (1 st photon trigger) all sub-pixel triggers are connected via OR gates, thus one single cell discharge in any sub-pixel causes the corresponding pixel to generate the die trigger signal In trigger scheme 4 all sub-pixels are ANDed, thus each sub-pixel has to detect a cell discharge to cause a trigger generation Due to the nature of the trigger scheme, there is, with the exception of trigger scheme 1, no fixed photon count threshold to fulfill the trigger scheme Multiple cell discharges in the same sub-pixel will only be counted once by the trigger logic This means that there is only a minimum number of required cell discharges and an average number of (homogeneously distributed) cell discharges, that will generate a trigger The timing performance of the DPC3200 sensor will be better for lower trigger schemes, but the dead-time and power consumption can increase, due to more frequent dark count triggering It is advised to cool the sensor below room temperature for lower trigger schemes Page 30 Koninklijke Philips NV 2016

31 valid sp1 pixel valid sp4 RTL # : AND 1: OR 0: AND 1: OR 0: AND 1: OR 0: AND 1: OR : AND 1: OR 0: AND 1: OR 1 5 0: AND 1: OR valid sp2 3 pixel AND/OR valid sp3 sub-pixel 2 Figure 53: Validation logic of the DPC3200 sensor In table 51 simulation results of the cumulative trigger probability after the n th photon hit are shown for the different trigger schemes The die trigger can also be provided externally, which is eg utilized for neighbor logic operation (chapter 581) The external trigger is ORed with the internal trigger signal, so the acquisition sequence will start when any of the two trigger signals is given There is no direct way to disable the internal triggering 53 Validation Logic Similar to the trigger logic, the validation logic checks for a geometrical distribution of micro-cell discharges on the pixel If the required distribution is met at the end of the validation interval, the event will be validated, else it is invalidated The sub-pixel cell rows are grouped in row-trigger-lines (RTLs) For the DPC3200 each single row builds a RTL, giving 25 RTLs per sub-pixel These RTLs are combined in groups of three or four, and connected to a configurable boolean network as shown in figure 53 Once an RTL within a group detects a cell-discharge within the validation interval, the corresponding input of the Koninklijke Philips NV 2016 Page 31

32 Table 51: DPC3200 trigger settings (a) DPC3200 trigger schemes (spx: sub-pixel X, :OR, :AND) (Avg thresholds courtesy of Tabacchini, V et al; Probabilities of triggering and validation in a digital silicon photomultiplierl; Journal of Instrumentation; Vol 9; June 2014 (DOI: / /9/06/P06016)) Trigger Scheme Sub-Pixel Configuration Average Threshold 1 sp1 sp2 sp3 sp [(sp1 sp2) (sp3 sp4)] [(sp1 sp4) (sp2 sp3)] 233 (±067) 3 (sp1 sp2) (sp3 sp4) 30 (±14) 4 sp1 sp2 sp3 sp4 83 (±38) (b) Trigger probabilities for the DPC3200 Page 32 Koninklijke Philips NV 2016

33 connected logic gate is set to logic high The valid-signals of all sub-pixels are then fed into the top-level pixel gate This gate is configurable If this pixel-level gate generates a valid-signal within the validation interval, the event is successfully validated To configure the validation scheme, a 7 bit validation pattern defines if a specific gate acts as AND (0) or as OR (1) gate For example: Validation pattern 0x01 configures gate 0 as OR and gates 1 6 as AND 1 Validation pattern 0x00 configures all gates as AND (highest threshold) Validation pattern 0x55 configures gates 0,2,4,6 as OR, all other gates as AND Validation pattern 0x77 configures gate 3 as AND, all other gates as OR Validation pattern 0x7F configures all gates as OR (lowest threshold) So for the highest validation threshold one cell in each individual RTL group of a sub-pixel has to discharge to generate a valid-signal for the corresponding sub-pixel, while for the lowest threshold one cell discharge in any RTL group is sufficient Some pre-defined validation schemes are provided (table 52) to ease operation, but all other validation bit patterns are allowed Cells that were already discharged before and during trigger generation also contribute to the validation process This means that for higher trigger schemes the validation scheme is easier to fulfill, as already more cells are discharged when the sensor enters the validation stage As for the trigger schemes the validation schemes do not define an exact threshold, but the number of required photons depends on the distribution over the (sub-)pixel, ıe there is no difference for the validation network if one, two, or more cells within one RTL group are discharged This leads to a stochastic validation threshold, with a minimum and average number of cell discharges that are required to validate an event Simulation results for minimum and average threshold of the pre-defined validation patterns are given in table Inhibit Memory The DPC3200 has the possibility, to physically disable individual sensor cells, by writing the so called inhibit memory This feature is usually used to control the dark count rate of the sensor 1 Mentioned for illustration purposes only Koninklijke Philips NV 2016 Page 33

34 Table 52: Pre-defined validation schemes and simulation results for average and minimum threshold (Avg thresholds courtesy of Tabacchini, V et al; Probabilities of triggering and validation in a digital silicon photomultiplierl; Journal of Instrumentation; Vol 9; June 2014 (DOI: / /9/06/P06016)) Validation Scheme Validation Pattern Threshold (Average) Threshold (Minimum) 1 0x7F:OR x77:OR 47 (± 21) 2 4 0x55:OR 170 (± 62) 4 8 0x00:OR 53 (±15) x55:AND 54 (±19) x00:AND 132 (±40) 32 Theoretical minimum threshold is given by validation scheme number As can be seen in figure 54, the biggest contribution to the overall sensor dark count rate is caused by only a small percentage of the cells, eg it is common that about 10 % of the cells are responsible for (70 80) % of the dark count rate By disabling these high dark count rate cells, the overall sensor dark count rate is significantly reduced, with a relatively small reduction of the active sensor area The disabled cells are physically disabled by lowering their bias voltage below the breakdown voltage, thus they can not generate triggers anymore In the readout phase of the acquisition cycle, these cells will be counted as not discharged This inhibit memory also allows to measure the individual dark count rate of each single cell (dark count map), by only enabling a single cell on a pixel and measuring its event rate in complete darkness By repeating this measurement for all cells, the complete dark count rate distribution of a sensor can be measured, which can then be used to disable the high dark count rate cells with an inhibit map (figure 55) This method can also be utilized as a slow-scan imaging mode with cell size resolution, which may be useful to eg check crystal coupling When the full sensor area is not needed, it is advised to disable the unused sensor regions via a customized inhibit map, to lower the sensor dark count rate and power consumption Page 34 Koninklijke Philips NV 2016

35 10 8 Cumulated DCR cps Cumulated rate: 700%: kcps 800%: kcps 900%: kcps 1000%: kcps Percent enabled cells Figure 54: Cumulated dark count rate (@20 C) for a complete DPC3200 die sensor, with dark count rates for different percentages of enabled cells The dark count rate distribution is not expected to change over time, but external factors like radiation or mechanical stress can influence the dark count behaviour of single cells Thus it is advised to remeasure the dark count map from time to time It should always be measured at the temperature at which the final measurements will be performed 55 Bias Voltage The correct setting of the cells bias voltage is crucial for the successful operation of the photon detector If the bias voltage is set to low the photon detection efficiency (PDE) will decrease On the other side a too high bias voltage will cause higher dark count rates A too high bias voltage may damage the sensor Koninklijke Philips NV 2016 Page 35

36 Dark-count map (Median: Hz, Temp (avg): 114 C) rows columns (a) dark count map kcps Inhibited DCM kcps (b) inhibited dark count map Figure 55: DPC3200 die sensor dark count map without (a) and with (b) highest 10 % dark count rate cells disabled (white dots indicate disabled cells) Page 36 Koninklijke Philips NV 2016

37 The correct bias operating voltage V bias is given by V bias = V break + V excess, with the breakdown voltage of the cells V break, and the excess voltage V excess The breakdown voltage is a process parameter, and will be different for different sensors The die sensors on the DPC3200 are sorted to have the same breakdown voltage, so there is only one common bias voltage setting per tile sensor The default excess voltage is specified to be 30 V The sensor breakdown voltage shifts about +20 mv/ C It should always be measured at the temperature at which the later measurements will be performed 56 DPC3200 Event Processing Events that are sent out by the die sensor are collected by the tile FPGA and processed in frames A frame interval is of µs Each frame gets a successive frame number in the range from 0 to 255 For each event the tile applies the configured calibration data It also filters events with invalid timestamps and can be configured to discard events below a configurable photon count threshold (chapter 564) The default system clock runs at 200 MHz corresponding to a clock cycle of 5 ns A frame is formed by 16 bit clock cycles, ie, ns = µs 561 Timestamp Generation The tile uses the uncalibrated (raw) TDC timestamp data from the die sensors to generate a (corrected) calibrated timestamp with a bin width of 10 ns/9 bit = 10 ns/ ps This corrected timestamp is in reference to the current frame boundary To compensate for TDC drifts, due to eg temperature or voltage variations during the acquisition, the tile can dynamically adjust the TDC calibration over time (TDC autocalibration), thus giving better TDC performance for unstable measurement conditions For high sensor die event-rates above the maximum tile event processing rate (see table 42), events that have been collected later in a frame interval can not be processed by the tile FPGA anymore Koninklijke Philips NV 2016 Page 37

38 562 Timestamp Skew Correction Due to small signal runtime differences between individual dies and tiles in a measurement setup, the individual dies will see their TDC reference clock with a small individual offset (skew) This means that the generated timestamps will also show this offset (figure 56) For good timing performance this timestamp skew has to be measured and corrected, by adding or substracting the individual die timestamp skew to/from the generated event timestamp The magnitude of this timestamp skew depends eg on the runtime differences in the system clock distribution paths, the FPGA internal clock routing, and the measurement geometry For example, alone due the FPGA clock distribution the timestamp skew can be up to about 1 ns between dies on the same tile As firmware changes influence the signal processing inside the tile FPGA, the sensor die timestamp skew can change significantly between different tile firmware versions Thus the timestamp skew should be remeasured after each tile firmware update The timestamp skew has to be taken into account when a coincidence window is set during data acquistion or analysis Coincidence windows that are smaller than the system skew will result in many incorrectly removed events The DPC3200 tile can add the manually measured die skew automatically to the event timestamps during event processing 563 Photon Count Saturation Correction For higher photon count values, saturation effects start to play a bigger role, for example when the probability that multiple photons hit the same micro-cell during the same acquistion secquence increases As each micro-cell can only count one photon per acquisition sequence, later photons that hit the same micro-cell will not be counted (figure 57) For the digital photon counter this saturation effect can be corrected eg via the formula p = N ln(1 k N ), with N being the number of available active cells 2 on a pixel, k the number 2 This value depends on the number of inhibited cells on a pixel, and thus has to be checked when a new inhibit map is used Page 38 Koninklijke Philips NV 2016

39 Δt 1,2 Δt 2,3 events sensor #1 skew between sensors sensor #3 sensor #2 time correct skew events time Figure 56: Illustration of timestamp skew between different die sensors # discharged cells #active cells without saturation with saturation # photons Figure 57: Photon count saturation effect Koninklijke Philips NV 2016 Page 39

40 of discharged cells, and p the number of incident photons corrected for the pixel s photon detection efficiency The DPC3200 tile can technically apply this saturation correction online during the event processing For the PDPC-TEK it is however suggested to perform this correction offline during the data analysis, as then the effects of different saturation correction methods can be easier analyzed 564 Event Filtering In addition to the trigger and validation threshold, that both are handled directly on the die, other event filters exist, that can be used to remove unwanted events from the data stream This can be helpful to eg optimize the use of the available data transfer bandwidth by not transferring events that will be discarded in the later capture process anyway The available filter modes and allowed settings are shown in table 53 Filtered events do not contribute to the maximum event processing rate of the tile FPGA Table 53: Available event filter modes Filter Setting Filtered On Die TDC Filter on/off (default: on) Die Tile TDC Filter on/off (default: on) Tile Photon Count Threshold in powers of 2 (default: 1) Tile TDC Filter The TDC filter removes events with invalid TDC timestamps from the data stream It is preferable to filter these events directly on the die For normal operation it is advised to leave both TDC filters enabled Invalid TDC values can occur, when the die is triggered during the die TDC reset, which happens immediately after the recharge phase This can especially occur for very high trigger rates Photon Count Threshold Filter The photon count threshold filter can be used to remove events, where the photon count value of all pixels for an event is below the configured threshold This can be useful to remove eg dark count noise events from the data stream Page 40 Koninklijke Philips NV 2016

41 57 RTL Refresh For higher trigger schemes 3 the pixel is prone to generate a false trigger by accumulating dark counts over a long period of time Therefore an experimental fast recharge mode is available, that recharges full cell rows (row-trigger-lines; RTLs 4 ) in a sub-pixel after a short period of time if none of the four pixels generated a die trigger This so-called RTL refresh checks all row trigger lines once each 10 ns and compares them against the global die trigger In case a RTL has triggered, but no die trigger was generated after 20 ns, the respective RTL is immediately recharged Enabling the RTL refresh option increases the power consumption by about 150 mw per sensor tile With the current design it is not possible to adjust the refresh timings The RTL refresh setting is known to be problematic for some configurations, thus it has to be tested individually if enabling it improves performance By default it is suggested to have it disabled Known Side-Effects When the RTL refresh is enabled, the collected photon count histograms may show higher noise levels and spiky structures This is especially true for high dark count rates, due to eg a high sensor temperature During the cell refresh there is a chance that photon bursts are generated by photo-emission in the sensor, which can appear as events with maybe around photons in the data file Depending on the chip settings and temperature this effect can lead to effectively higher (noise) eventrates, than without RTL refresh 3 The RTL refresh can by principle not work for the 1 st photon trigger 4 One RTL corresponds to one single cell row Koninklijke Philips NV 2016 Page 41

42 Trigger SYNC-OUT* validated SYNC-OUT* (5-40) ns (0-20) μs (5-80) ns 680 ns ready valid? yes integration readout recharge Trigger Timestamp SYNC-IN* (all valid) no * DPC only Figure 58: SYNC-IN / SYNC-OUT of a single DPC3200 die sensor 58 DPC3200 SYNC Processing 581 Neighbor Logic The sensor dies on the DPC3200 tile can be configured to force an event acquisition cycle on neighboring dies, although these dies did not detect enough photons to start their own acquisition sequence This feature can be useful if the expected light distribution covers multiple dies, with a high light intensity in the center and lower intensities in the surrounding regions, eg when large monolithic scintillation crystals are used that cover multiple dies With this neighbor logic mode, the dark count suppression threshold, by means of trigger and validation schemes, can be set to a relatively high value, thus reducing unwanted dark count events and sensor dead-time As long as one die ( master die ) detects enough photons to fulfil the trigger and validation criteria, the neighbor dies ( slave dies ) will be forcefully triggered to start their acquisition sequence This neighbor trigger (SYNC) will override the configured trigger and validation settings on the slave dies So even the low light intensities in the outer event regions can be collected and added to the central photon count values during later analysis The SYNC-IN and SYNC-OUT signals of the DPC3200 die sensor (figure 58) are used for this functionality The SYNC-IN is an external trigger, that is combined (ORed) with the internal trigger, and is always validated The SYNC-OUT signal can be configured to be sent when a trigger occurred, or when a successful event validation from the pixels is detected On tile level the tile sensor is divided into 8 die SYNC groups (figure 59) A SYNC-OUT trigger from one master die can be configured to trigger (via the SYNC-IN of the slave dies) the die in the same sync group, and either 1 the dies in the vertical and horizontal adjacent sync groups or Page 42 Koninklijke Philips NV 2016

43 die 3 die 7 die 11 die 15 die 2 die 6 die 10 die 14 die 1 die 5 die 9 die 13 die 0 die 4 die 8 die 12 Figure 59: Sync groups and example for neighbor die triggering on a DPC3200 sensor The example shows the forced triggering of dies for a master event on die 4 (full tile triggering disabled) 2 all other dies on the same tile The master die will generate a SYNC-OUT signal of 10 ns length, as soon as trigger and validation thresholds are reached, not at the end of the validation interval Thus the time between master die trigger and submitted SYNC-OUT signal may vary between 0 ns and the full validation interval duration Due to signal processing and runtime on the tile sensor there is a delay between the SYNC-OUT signal from the master die and the SYNC-IN signal received by the slave dies This delay is about 5 7 ns for dies in the same sync group, ns for dies in other sync groups A neighbor logic event will appear in the timestamp sorted listmode file as individual events with 1 the master event with master die timestamp, 2 the event from the die in the same SYNC groups as the master die, with an about 5 7 ns delayed timestamp, Koninklijke Philips NV 2016 Page 43

44 3 the events from the remaining dies, with their individual timestamps that are about ns delayed compared to the master timestamp For timing analysis the timestamp of the master die should be taken For coincidence measurements with enabled neighbor logic, the coincidence window must be chosen large enough to collect also the events from the slave dies, so it should be set to 25 ns In order to have a fast generation of the SYNC-OUT signal on the die, the SYNC-OUT generation and validation process are working asynchronously In some occasion, when the validation threshold is reached very late during the validation interval, this may lead to the generation of a validated SYNC-OUT although the die already invalidated the event and is already recharging In this case only the slave dies will acquire the event, but the master die will be missing Events like this must probably be discarded in the later analysis Slave dies, that are currently in the recharge interval will ignore the SYNC from the master die, which will lead to events where not all expected dies are present This may be a common situation, because the outer dies may only see small photon numbers, which can trigger the die but may often be invalidated, bringing the die directly into the recharge cycle As the master SYNC will arrive up to 20 ns delayed it can arrive exactly during this recharge phase It is strongly recommended to increase the validation interval length to 40 ns to compensate for the master SYNC delay Neighbor logic events that have single dies missing should either be corrected for the missing information (eg by interpolation) or discarded during analysis Although all external trigger signals on the slave dies will be validated, the validation interval will not be skipped The slave dies will perform the full acquisition sequence Page 44 Koninklijke Philips NV 2016

45 Figure 510: SYNC-IN path of the tile sensor Figure 511: SYNC-OUT path of the tile sensor 582 SYNC-IN/OUT Processing SYNC-IN The SYNC-IN path of the tile sensor is shown in figure 510 It can be used to 1 trigger all dies on the tile externally, or 2 provide a gate signal, which will discard all events that are forwarded when the gate signal is not present It can be chosen to either use the direct gate signal, or to use an on-tile window generator, which can be configured to transform SYNC-IN pulses into gate windows of programmable delay and width SYNC-OUT The SYNC-OUT path of the tile sensor is shown in figure 511 The SYNC signals coming from the different SYNC groups on the tile (see chapter 581) can be forwarded to the external data processing A coincidence window can be configured, which will check for a number of SYNCs from different SYNC groups within a given coincidence window A window generator transforms the SYNC-OUT signals in square signal windows of configurable width Koninklijke Philips NV 2016 Page 45

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47 Part III Control Software: DPCShell Koninklijke Philips NV 2016 Page 47

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49 6 DPCShell DPCShell is a console based Linux program for the control, configuration, and operation of the PDPC-TEK setup To start the program open a terminal window on your control PC and enter the command dpcshell Calling dpcshell with the option -l enables logging All input-and output lines of the terminal are saved in a log-file The log file can be found in the directory dpc_data/log/ This manual version refers to dpcshell version 065 and was tested with tile firmware version 159 The PDPC-TEK base unit has to be connected and switched on, before the DPCShell program is started The log-file is overwritten every time the DPCShell program is started Koninklijke Philips NV 2016 Page 49

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51 7 Files and Directories Configuration and calibration data is stored in the directory dpc_data, in the home directory of your user account dpcshellini Global configuration file tile_data/ Directory of sensor specific information and calibration data tile_<serial_nr>/ Directory of individual tile configuration data dcmdpct Last dark count-map inh_mapdpct Inhibit map for sensor upload inh_map_dcmdpct Inhibit map generated from dark count-map inh_map_maskdpct (optional) Inhibit map mask, to permanently disable selected cells on the sensor test_tdc_rawdpct Result from the last TDC test (raw mode) vbreakdpct Result from the last breakdown voltage scan vbreak_logdpct Log of previous breakdown voltage scans capture_data/ Default output directory for measurement data capturedpct Event listmode file (text format) capture_summarydpct Summary report of measurement status_infodpct Status log of setup parameters (voltages, temperatures, etc) scripts/ (optional) User scripts directory cmd/ (optional) Custom user commands directory Koninklijke Philips NV 2016 Page 51

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53 8 General Command Structure DPCShell commands consist of one or more command keywords, separated by spaces An overview of all available commands can be displayed with the help command Most commands support additional options, starting with a single dash for short (single-letter) options, and a double dash for long options Available options can be displayed by calling the command with the --help option Additionally some commands allow to address specific hardware, eg one specific tile sensor, by giving an optional address after the command keywords The addressing syntax is explained in section 10 EXAMPLES Show all available commands: DPC-Shell: help Display information about connected sensors: DPC-Shell: tile info Print the help of the calibrate inhibit command: DPC-Shell: calibrate inhibit --help Koninklijke Philips NV 2016 Page 53

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55 9 DPCShell Commands Not all available commands are given in this manual For an extensive list the DPCShell help command should be used 91 Power Commands power up Sets operating voltages and initializes the system Detects and initializes connected sensors power up has to be called once, when the system was physically switched off before power down Disables connected sensors and initializes operating voltages Should be called before physically switching off the system power show Shows current voltages and currents 92 Test Commands Some test routines are provided to check the correct operation of the connected sensors test jtag Checks the configuration chain of the tile sensors The configuration inputs and outputs of sensor dies on a DPC3200 tile are daisy chained, meaning that a single interruption of this chain will affect all following sensor dies Koninklijke Philips NV 2016 Page 55

56 The most common reason for problems with the configuration chain of the tile sensors are damaged bond-wires When this is the case you will observe that the JTAG test reports [OK] up to a specific die number and [ERROR] for all following dies test tdc Tests the TDCs of the sensor dies by triggering the sensors via external delay loops By default the TDC test is done in corrected mode Use --raw to test the tdc in raw mode test sam Tests the inhibit memory of the sensor dies by writing and reading special data patterns Only the sensor die memory that stores the inhibit maps is checked here It is not checked whether the micro-cells are correctly disabled test spi Tests the flash memory on a tile sensor by writing and reading random data patterns to unused memory locations 93 Tile Commands The tile commands are used for direct operations on the DPC3200 sensors tile info Print information about connected tiles, eg tile temperature, serial number, Page 56 Koninklijke Philips NV 2016

57 tile revision, tile firmware version PARAMETERS --trigger Show current trigger and event rates When the tile sensors are currently not capturing, the displayed trigger and event rates refer to the last measurement tile update Update the firmware of the tile sensor Timestamp skew can change between different firmware versions, thus a new skew measurement should be done after a tile firmware update 94 VBias Commands The bias voltage commands determine the correct operating bias voltage and can be used to adjust the bias voltage On startup the software will set a low bias voltage in the range between 5 and 10 V, to avoid accidental tile activity due to high light intensities It will automatically set the final operating bias voltage when needed, eg when a measurement is started When the bias voltage is set above the sensor breakdown voltage, the sensors will be sensitive to light! vbias scan Increases the tile sensor bias voltage, until a cell breakdown is detected, which gives the breakdown voltage for this tile sensor at the current temperature Koninklijke Philips NV 2016 Page 57

58 The sensors should be in a completely dark environment for this measurement Background light can influence the correct measurement of the breakdown voltage The measured breakdown voltage is stored in the corresponding tile directory (see chapter 7) It should be remeasured when the current tile operating temperature changes vbias adjust Adjust the currently set bias voltage according to the current tile temperature, assuming a shift of +20 mv/ C (see chapter 55) This adjustment should only be used for small temperature changes For larger changes a new vbias scan should be done PARAMETERS --excess Configure the excess voltage between 10 V and 36 V EXAMPLES Lower the excess voltage to 25 V vbias adjust --excess 25 For excess voltages above 30 V the internal voltage level VDDA, which is the voltage supply of the cell logic (inhibit, recharge, etc), has to be increased This is handled by the software automatically However it should be noted that this is driving the sensor out of the specified operating range, thus it is advised to monitor the sensor parameters (eg temperature, IDDA, IBIAS, ) more thoroughly Page 58 Koninklijke Philips NV 2016

59 For excess voltages below 30 V VDDA could in principle be reduced, to reduce power consumption and thus heat dissipation This is not handled by the software automatically, but has to be configured manually Please contact PDPC support if you intend to do this VDDA must always be larger than the excess voltage A minimum distance of about 02 V between these voltages should be kept By default the software keeps a distance of 03 V vbias reset Reset the bias voltage to a low value, making the sensors insensitive to light 95 Calibration Commands These commands calibrate the setup for optimal performance calibrate voltage Measures the slope of the Tile-TEK base unit bias voltage converters Disconnect the tile sensors before calling this command! Under normal circumstances it should only be necessary to call this command the first time, when a new base unit is used measure dcm Measure a dark count map of the sensor (see chapter 54) The sensors should be in a completely dark environment for this measurement Koninklijke Philips NV 2016 Page 59

60 Attached scintillation crystals may produce random light pulses due to background radiation or their own radioactive emission This can disturb the correct dark count map measurement A measurement of the correct breakdown voltage for the current tile temperature must be available (see chapter 94) PARAMETERS --frames Specify the number of frames, for which each cell should be measured (default: 100) For lower temperatures (causing less dark counts) it may be necessary to increase the measurement time per cell to gain sufficient statistics This can be checked by looking for cells that did not give any counts during the dark count map measurement (see chapter 14) EXAMPLES Measure an extended dark count map for 1000 frames measure dcm --frames 1000 calibrate inhibit Operate on the tile sensor inhibit memory (see chapter 54) PARAMETERS --generate[=<percent>] Generate an inhibit map from the last measured dark count map by disabling <percent> % of the highest count rate cells on per die sensor (default: 10%) --upload -f [<filename>] Upload the generated inhibit map to the tile flash memory Optional: Load inhibit map in given filename (without any processing or masking) Page 60 Koninklijke Philips NV 2016

61 --download -f [<filename>] Download the inhibit map from the tile flash memory to the tile directory on the PC Optional: Download to given filename --show Show information about the inhibit map stored in the tile flash memory --clear Clear the inhibit map from the tile sensor flash memory --enable Enable all cells on the die sensors (non-permanent) --disable Disable all cells on the die sensors (non-permanent) --activate Load inhibit map from tile flash memory to sensor dies A current dark count map measurement must be present, to generate the correct inhibit map An inhibit map that is uploaded to the tile flash memory, is permanently stored and automatically loaded to the sensor dies on startup EXAMPLES Generate and upload an inhibit map with 10% of the highest dark count rate cells disabled (default) calibrate inhibit --generate --upload Generate and upload an inhibit map with 20% of the highest dark count rate cells disabled calibrate inhibit --generate=20 --upload Upload a custom inhibit map calibrate inhibit --upload -f custom-inhibitdpct A custom inhibit map will be ANDed with the inhibit map generated from the dark count map measurement The resulting map will have 1 the cells that are disabled in the mask, and 2 the cells with the highest dark count rates disabled Koninklijke Philips NV 2016 Page 61

62 calibrate tdc Calibrate the die sensors time-to-digital-converters (TDCs) PARAMETERS --generate Generate the TDC calibration data from the last measured dark count map measurement --upload Upload the generated TDC calibration to the tile flash memory --download Download the TDC calibration from the tile flash memory to the tile directory on the PC --clear Clear the TDC calibration from the tile flash memory EXAMPLES Generate and upload the TDC calibration from the last dark count map measurement calibrate tdc --generate --upload The TDC calibration routine utilizes the statistical nature of the timestamp distribution during a dark count map measurement Thus a current dark count map measurement must be present, to generate the correct TDC calibration data A TDC calibration that is uploaded to the tile flash memory is permanently stored and automatically applied to the timestamp values from the sensor dies 96 Configuration Commands config set Set basic acquisition parameters (see chapter 51) Page 62 Koninklijke Philips NV 2016

63 PARAMETERS --trigger <trg_scheme> Set the trigger scheme --validation <val_scheme> Set the validation scheme --val-pattern <pattern> Set a validation pattern --val-len <nsec> Set the validation interval length in nano-seconds --int-len <nsec> Set the integration interval length in nano-seconds --rtl-refresh <on/off> Enable/disable the RTL refresh --nlogic <on/off> Enable/disable neighbor logic --nlogic-val-sync <on/off> Enable/disable the validated SYNC for neighbor logic operation --nlogic-full-tile <on/off> Enable/disable full-tile neighbor logic EXAMPLES Configure trigger scheme 4 and validation scheme 16 config set --trigger 4 --validation 16 Set and validation interval of 20 nsec config set --val-len 20 Set a custom validation pattern config set --val-pattern 0x22:AND Configuration settings are reset to default values with the next power up command config show Show the currently configured settings config save Save the current configuration settings A directory and filename can be given using option -f [<filename>] Koninklijke Philips NV 2016 Page 63

64 config load Loading configuration settings from file using the option -f [<filename>] config reset Restore configuration settings to factory defaults config filter Configure the tile event filtering (see chapter 564) PARAMETERS --tdc-filter <on/off> Enable/disable the TDC filter (die and tile) --pcount-thresh <pcount> Set a photon count threshold (=0 to disable filter) --show Show the current filter settings 97 Capture Commands capture Starts the data acquisition and collects the event data PARAMETERS --nframes <num_frames> Set the data acqusition length in frames --output <dirname> Set the output directory (default: see chapter 7) --coinc Store only coincident events The USB communication between TEK base-unit and PC limits the event transmission rate The available bandwidth is shared between the data packets from all tiles and dies, thus the bandwidth per die can be increased by disabling unneeded dies via customized inhibit maps Page 64 Koninklijke Philips NV 2016

65 capture activate Start a data acquisition without collecting the data It is good practice to start the data acquistion before the actual data collection is initiated, to let sensor temperature stabilize (see chapter 16) capture deactivate Stop a data acquistion that was started with capture activate 971 Coincidence Measurements To remove unwanted single events (eg noise) from the captured data files, event collection can be limited to events that occur within a given coincidence window The software will then check the timestamps of the received events Starting from the event with the lowest timestamp in a frame it will check for other events with a timestamp within the given coincidence window Only if events from at least configurable number of different tiles or a configurable number of different dies are collected these events will be saved Other events will be discarded To collect only coincident options the following parameters for the capture command exist: Option Meaning Example --coinc Coincidence window in --coinc 10 <window_nsec> nano-seconds (default: no coinc) --coinc-tiles <num_tiles> Number of different tiles requested in a coincidence (default: 2) --coinc-tiles 3 --coinc-dies <num_dies> Number of different dies requested in a coincidence (default: 2) --coinc-dies 6 Technical Notes Coincidence sorting is currently done online in software on the acquisition PC This means all events will be transferred from the base-unit to the PC Non-coincident events will then be discarded Coincidence events that span over frame boundaries will not be recognized Koninklijke Philips NV 2016 Page 65

66 In raw mode (not recommended) coincidence detection is performed on an uncalibrated timestamp, thus the accuracy is limited (< 5 ns) The event counter will increase with each coincidence by 1, regardless of the number of single events within this coincidence 972 Measurement report After a measurement information about trigger rates, collected events, etc are printed (see Table 91) The meaning of the printed information is described in Table 92 This information is also stored together with the captured data in the acquisition directory Page 66 Koninklijke Philips NV 2016

67 Table 91: Data presented after a measurement Finished measurement: Collect time: sec Captured frames: (equiv sec) Lost packets: Captured single events: Frame reading errors: 0 Synchronization errors: 0 Summary tile 2 =============== Processed frames: (equiv sec) Detected Triggers Processed Events Collected Events Die # Rate (khz) # Rate(kHz) # Rate (khz) ====+============+===========+=========+=========+==========+============ Sum Avg Koninklijke Philips NV 2016 Page 67

68 Table 92: Measurement report information Measurement information Collect time Captured frames Lost packets Captured single/ coinc events Frame reading errors Synchronization errors Time span for which the measurement was running(measured on the PC from the start of data collection to end of data collection) Number of frames stored in data file Packets that were lost on the way from the tile to the PC due to limited bandwidth Number of single or coincident events (depending on mode) In coincidence configuration each coincidence is counted as one event and contains multiple single events Error count for packets that got corrupted during transmission from tile to PC Should under normalcircumstances be 0 If a high number of frame reading errors are observed the cable connection betweentile and base-unit should be checked Erroneous frames are discarded during capture Error count indicating lost synchronization betweendifferent tiles eg frame reading errors will probably generate synchronization errors Tile/die information Processed frames Detected triggers Processed events Collected events Number of frame data packets processed by the tile FPGA Trigger counter value on each die Events processed by tile FPGA These are the validated events received from the single dies Due to bandwidth Limitations the maximum achievable rate will be 120 khz per die Events collected by the PC Limited by USB communication bandwidth Page 68 Koninklijke Philips NV 2016

69 10 Hardware Addresses Some commands support to operate on selected hardware devices only, eg it may be desired to recalibrate only some specific sensors or to upgrade the firmware of a selected tile sensor For these commands an optional address pattern can be given, which will limit the operation on the selected device(s) 101 Address Hierarchy Controller The (main) controller/base-unit is the hardware device to which the sensors are connected It is connected directly to the control PC Tile The individual tile sensor 102 Addressing Rules Hardware addresses are constructed according to the following rules: On each hierarchy level the existing hardware is enumerated, starting with address number 1 The hierarchy level is separated by : A missing tile address is will be parsed as all tiles (this is not working for the controller address) (eg 1: means all tiles on module 1 ) By default all tiles on all controllers are adresses, ıe by skipping the specific address number all tiles connected tiles are addressed This default address can be changed with the command set default address EXAMPLES Tile-TEK: Address tile 3 on the first controller 1:3 Koninklijke Philips NV 2016 Page 69

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71 11 Advanced Configuration 111 SYNC settings The advanced SYNC settings of the PDPC-TEK system allow a powerful and flexible trigger signal distribution, which can be used to eg: Forward trigger signals from the tile sensor to an external connector on the base-unit, trigger tiles via the external base-unit connector, use an external signal as gate, to only forward events from the tile sensors when this gate signal is applied, setup hardware coincidence configurations between multiple tiles, or an external sensor Configuration of these SYNC settings is done for multiple logical functional units: On Tile level: SYNC-IN: signal received by the tile (trigger, gate, disabled) SYNC-OUT: signal sent out by the tile (trigger, coincidence between SYNC groups) In the control unit: SYNC-IN: signal from tiles and/or external connector SYNC-OUT: signal to tiles and/or external connector SYNC-EXT: external connector 1 input/output SYNC-GEN: sync generator in the base unit 112 Controller SYNC settings The SYNC logic on the control unit is shown in figure 111 It controls the distribution and combination of tile SYNC-OUT signals, signals from the external connector (SYNC-EXT) and the internal sync generator (SYNC-GEN) 1 The external connector is the SMA connector labeled Laser Trg on the base-unit Koninklijke Philips NV 2016 Page 71

72 SYNC-IN The SYNC-IN unit accepts signals from selectable tile connectors and the external connector The tile SYNCs can be fed into a coincidence checking unit and a configurable window and delay generator The external signal is also fed into a window and delay generator The resulting signals can be combined with a boolean AND or OR Again a following windows and delay unit can be configured to define the output signal For fast signal processing a direct path exists, which has no coincidence checking or window/delay generators SYNC-EXT The external SYNC connector can be configured as input or output for SYNC signals When used as output it can be selected if it should output a copy of the signal going to the tile connector, or the output of the SYNC generator SYNC-GEN The SYNC generator can be configured to generate a configurable number of SYNC signals per frame The length of these SYNC signal windows is configurable The SYNC generator will only start operation when the dataacquisition is started (200 MHz clock enabled) SYNC-OUT Via SYNC-OUT configuration it can be selected which SYNC processing branch should be forwarded to the tiles: Fast direct branch, window generation branch or external sync connector Page 72 Koninklijke Philips NV 2016

73 Figure 111: Possible configurations of the controller SYNC units Table 111: Procedure for tile sync settings Command config sync tile Option Description Example --in-mode <off/gate/trigger> --in-win-gen <on/off> --in-win-delay <delay_ns> --in-win-len <len_ns> Select usage of tile SYNC-IN --in-mode gate Enable/disable use of window generator --in-win-gen on Delay in ns for the window generator --in-win-delay 0 ( in steps of 10) Length of generated window in ns ( in steps of 10) --in-win-len 50 --out <on/off> Enable/disable tile SYNC-OUT --out on --out-pulse-len <len_ns> --out-coinc <num_syncs> --out-coinc-win <len_ns> Length of generated SYNC-OUT pulse in ns (0 35 in steps of 5) --out-pulse-len 10 Required number of SYNC from --out-coinc 2 SYNC groups (0 7) Length of coincidence window --out-coinc-win 10 in ns (5, 10, 15, 20) Koninklijke Philips NV 2016 Page 73

74 Table 112: Procedure for Controller SYNC-EXT settings Command config sync ext Option Description Example --show Show current settings --show --dir <in/out> Select direction of SYNC connector --dir in --source Only When used as output: Select --source generator <generator/tile> if output from SYNC generator, or a copy of the SYNC forwarded to the tiles should be outputted Table 113: Procedure for Controller SYNC-GEN settings gen Command config sync Option Description Example --switch <on/off> Enable/disable SYNC generation (Note: Only running during acquisition) --switch on --num-syncs <num> Generate <num> SYNCs per frame --num-syncs 3 --sync-len Length of generated SYNC in ns --sync-len 10 (0,5,10,, ) Table 114: Procedure for Controller SYNC-OUT settings out Command config sync Option Description Example --show Show current settings --show --source/-s <direct/window/ generator> Select SYNC branch, that should be forwarded to the tiles --source window Page 74 Koninklijke Philips NV 2016

75 Table 115: Procedure for Controller SYNC-IN settings Command config sync in Option Description Example --show Show current settings --show --tile-pos --tile-in <on/off> --tile-num <num_tiles> --tile-delay <delay_ns> --tile-len <len_ns> --ext-in <on/off> --ext-delay <delay_ns> --ext-len <len_ns> --both --comb-delay <delay_ns> Enable input for given tiles (Note: Do not enable empty positions!) Enable/disable processing of tile SYNC branch) Configure number of tiles for coincidence check Delay of tile SYNC in window branch in ns (0,5,10,, 1275) Length of tile window in SYNC window branch in ns (0,5,10,, 1275) Enable/disable forward of external SYNC Delay of ext SYNC in window branch in ns (0,5,10,, 1275) Length of ext window in SYNC window branch in ns (0,5,10,, 1275) Require tile AND ext SYNC(Overrides tile-in and --ext-in) Delay of combbined SYNC in window branch in ns (0,5,10,, ) --tile-pos 1,2 --tile-in on --tile-num 2 --tile-delay 10 --tile-len 5 --ext in off --ext-delay 10 --ext-len 5 --both --comb-delay 10 --comb-len <len_ns> Length of combbined SYNC in window branch in ns (0,5,10,, ) --comb-len 5 When --both is not given, the tile and ext SYNC branch are by default ORed Koninklijke Philips NV 2016 Page 75

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77 12 Miscellaneous 121 Scripts The DPCShell program features the possibility to define simple batch scripts, which can be used to execute operations that are performed on a regular basis To define such a script create the directory ~/dpc_data/scripts and create a text file which includes the commands that should be executed when the script is called The name of the text file defines the name which is used to call the script Call the script in the DPCShell by prepending to the script filename EXAMPLES 1 Create the text file short_test in ~/dpc_data/scripts with content: test tdc test jtag test sam 2 in the DPCShell 3 The commands given in the short_test file are now executed line by line No variables, loops, etc are supported The commands are just executed as they are given in the script file Koninklijke Philips NV 2016 Page 77

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79 13 File Format Descriptions 131 Listmode File Format (ASCII) The text-based output files start with 12 header lines providing information about the measurement, followed by 13 columns of data The validated events are stored in CSV-format Coincidence events can be recognised by their common event_id (column 12) Table 131: Header format of text-based output Line Description Remark 1 File format version 2 Date/time of measurement 3 Information and configuration of tile 1 4 Information and configuration of tile 2 5 Information and configuration of tile 3 6 Information and configuration of tile 4 7 empty 8 empty 9 Number of captured frames 10 Coincidence settings 11 Measurement mode 12 Description of data columns Header lines are started with # Koninklijke Philips NV 2016 Page 79

80 Column Type Table 132: Data format of text-based output Description 1 Integer Tile number 2 Integer Die number 3 Integer (8-bit) Frame number 4 Integer Delay 5 Integer (24-bit) Timestamp in TDC bins (1 bin = 10 ns/512) 6 Integer Number of photons detected at pixel 1 7 Integer Number of photons detected at pixel 2 8 Integer Number of photons detected at pixel 3 9 Integer Number of photons detected at pixel 4 10 Float Temperature C 11 Integer Status 12 Integer Event ID (coincidence events share ID) 13 Integer Frame counter Page 80 Koninklijke Philips NV 2016

81 132 Listmode File Format (binary) 1321 Header Name Bytes Remark Header byte 2 =0xFFFF Version 4 Measurement mode 1 0: Corrected mode 1: Raw mode Requested number of frames 4 Requested number of events 4 Requested collection time 4 In seconds Requested measurement time 4 In seconds Coincidence window 4 Given in fine-counter bins Coincidence mode 1 0: Singles measurement, 1: Coincidence measurement Requested no of tiles per coinc 4 Requested no of dies per coinc 4 Quiet option for measurement 1 Start time 4 In Unix epoch Number of tiles 1 Following tile information is repeated for tiles 24 Name Bytes Remark Tile 1 serial 16 Character array Tile 1 version 4 Tile 1 type 4 Trigger config tile 1 4 Validation config tile 1 4 Validation interval tile 1 4 Integration time tile 1 4 Koninklijke Philips NV 2016 Page 81

82 1322 Data Name Bytes Remark Event marker byte 1 0xFF: New event (coincidence/single), 0xFE: Next event inside coincidence Frame sequence 4 Frame number 1 Status 1 Debug information Tile number 2 Die number 1 Photon count pixel 1 2 Photon count pixel 2 2 Photon count pixel 3 2 Photon count pixel 4 2 In corrected mode Name Bytes Remark Timestamp 4 In raw mode Name Bytes Remark CC1 4 CC2 4 FPGA_CC 4 FC1 4 FC2 4 Page 82 Koninklijke Philips NV 2016

83 133 Dark Count Map Format General Notes The dark count map format is a text based, comma-separated-values (CSV)) file It can contain dark count maps for multiple dies Comment character is a hash: # First line of the file gives the file type ID (eg #DPC-DCMAP-V20 for dark count map version 20) End of header is marked with #> and comma separated column descriptions Cell numbering is based on the order described in figure 41 Header In the header section several keywords may appear to describe the measurement They are given as <keyword>:<value> (see table 133) Data Data is stored in CSV format Column content is described in table 134 Table 133: Header keywords for dark count map and inhibit map Keyword Description Note Serial Serial number of tile/sensor optional Type Sensor type (DPC ) optional Dimension Date dark count map dimension as <num_dies> x <cols_on_die> x <rows_on_die> Date of measurement/file generation in format: %YYYY-%MM-%DD, %HH:%MM:%SS if <num_dies> is omitted, a single die is assumed optional Koninklijke Philips NV 2016 Page 83

84 Table 134: Data column description for dark count map files Column Description Data type ID Die ID or number integer Col Cell column on sensor die integer Row Cell row on sensor die integer Frame Number of frames this position was integer measured for Counts Counts acquired during measurement integer Temp Temperature in C during measurement of this cell float EXAMPLES #DPC-DCMAP-V20 # Serial: 1293 # Type: DPC # Dimension: 16 x 128 x 100 (dies x cols x rows) # #> ID, Col, Row, Frames, Counts, Temp 0, 0, 0, 10000, 6654, , 1, 0, 10000, 5683, , 2, 0, 10000, 10500, Inhibit Map Format General Notes The inhibit map format is strongly based on the dark count map format, so except for the data columns the same rules apply here Header See chapter 133 Data See table 135 Page 84 Koninklijke Philips NV 2016

85 Table 135: Data column description for inhibit map files Column Description Data type ID Die ID or number integer Col Cell column on sensor die integer Row Cell row on sensor die integer Switch Indicates if cell will be enabled integer (=1) or disabled (=0) Note Not specified rows will be set to disabled EXAMPLES #DPC-IHMAP-V20 # Serial: 224 # Type: DPC # Dimension: 16 x 128 x 100 (dies x cols x rows) # Date: , 15:15:53 # #> ID, Col, Row, Switch 0, 0, 0, 1 0, 1, 0, 1 0, 2, 0, 0 0, 3, 0, 1 Koninklijke Philips NV 2016 Page 85

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87 Part IV Analysis Tools and Utilities Koninklijke Philips NV 2016 Page 87

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89 14 Dark Count Map Viewer For display and first analysis of the acquired dark count maps the commandline program dpc_dcm_view is provided It supports the display of dark count maps, corresponding inhibit maps, the cumulated dark count rate, and the dark count rate histogram for each die of a tile sensor (see figure 141) To display a dark count map go to the corresponding tile directory in a Linux command terminal (cd ~/dpc_data/tile_data/tile_<serial>) and call the program with the dark count map file usually dcmdpct as argument It will display the dark count map of the first die on the tile By pressing <ENTER> in the displayed window the next dark count map in the given DCM file will be shown PARAMETERS --help Show the program help --inhmap=<file> Display the inhibit map overlay --die=<die_nr> Display the DCM for a single die only --dir=<dirname> Automatically use the default dark count and inhibit map from the given directory --hists Enable the histogram plot --save=<file> Save the generated plots to a PDF file --min=<rate> Lower boundary of the plotting range in k cps --max=rate Upper boundary of the plotting range in k cps EXAMPLES Display the dark count map and inhibit map overlay for the tile with serial number #1234 dpc_dcm_view --dir=~/dpc_data/tile_data/tile_1234 Display an arbitrary dark count and inhibit map dpc_dcm_view dcm_20degcdpct --inhmap=my_ihmapdpct Koninklijke Philips NV 2016 Page 89

90 10 8 Dark-count map (Median: Hz, Temp (avg): 114 C) 100 rows columns Cumulated DCR Dark-count Analysis tile MP2A , die Inhibited DCM DCR Histogram kcps cps Cumulated rate: 700%: kcps 800%: kcps 900%: kcps 1000%: kcps # Cells Percent enabled cells cps Figure 141: Example of a dark count map plot for a single DPC3200 die sensor (Left-Top: dark count rates per cell; Right-Top: Inhibit map overlay with inhibited cells in white; Left-Bottom: Cumulative dark count rate of the full sensor die; Right-Bottom: dark count rate histogram) Page 90 Koninklijke Philips NV 2016

91 Part V Recipes: Best Practice Procedures Koninklijke Philips NV 2016 Page 91

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93 15 Sensor Calibration Recipe For good performance the sensor tiles have to be calibrated before first use As temperature variations influence the behavior of the sensor TDCs and the dark count rate, the calibration procedure should always be performed at a stable operating temperature For optimal performance the sensor calibration procedure should be repeated when the operating temperature of the sensors is changed, by more than about 3 C, the sensors were exposed to mechanical stress, eg due to frequent temperature cycling, the sensors were exposed to higher than usual radiation doses, a general perfomance degradation is noticed It is suggested to repeat the calibration procedure on a regular basis PROCEDURE 1 Place the sensor in a dark environment The temperature should be the same as the one that will be used for later measurements 2 Scan for the correct bias voltage: vbias scan 3 Start a dark count map measurement: measure dcm Koninklijke Philips NV 2016 Page 93

94 For low sensor temperatures it may be necessary to extend the length of the dark count map measurement (see chapter 95) 4 Generate the inhibit map: calibrate inhibit --generate 5 (optional) Check the acquired dark count and inhibit map with the dpc_dcm_view utility 6 Upload the generated inhibit map: calibrate inhibit --upload 7 Generate and upload the TDC calibration: calibrate tdc --generate --upload See chapters 94, 95, and 14 for details Page 94 Koninklijke Philips NV 2016

95 16 Temperature Stabilization Recipe For an optimal measurement the tile temperature should be kept stable during the acquisition A temperature increase of the die sensors leads eg to a higher breakdown voltage a and a higher dark count rate a The breakdown voltage shifts about +20 mv / C It is strongly suggested to stabilize the sensor temperature via external cooling eg a Peltier cooler, or a fan and a cooled environment Even with a good external temperature regulation the sensor temperature can increase when a measurement is started, due to higher power dissipation on the sensors caused by the event processing This temperature increase depends on (among others) the count rate, ambient temperature, sensor configuration (eg trigger and validation settings), and the stability of the external cooling system It is advised to let the sensor temperature stabilize before the actual data acquisition is started To achieve this, the tile can be put into capture mode before actually acquiring data In this mode the tile will acquire and process events as usual, but the events are not sent to the acquisition PC, which allows to check for a temperature increase and re-adjust the bias voltage accordingly After the tile temperature has stabilized the real capture process can be directly started PROCEDURE 1 Check the tile temperature: tile info 2 Activate the tile capture mode: Koninklijke Philips NV 2016 Page 95

96 capture activate 3 Observe the temperature increase by calling tile info regularly 4 As soon as the tile temperature is stabilized adjust the bias voltage to the new temperature: vbias adjust 5 Repeat step 3 and 4 until the tile temperature and bias voltage do not change anymore (2 or 3 iterations should normally be sufficient) If the tile temperature does not stop increasing, stop the capture mode (step 7) and check your cooling 6 Start your measurement with the capture command 7 Deactivate the tile capture mode: capture deactivate See chapters 94 and 97 for details Page 96 Koninklijke Philips NV 2016

97 17 Skew Correction Recipe PROCEDURE Here a coincidence measurement between two tile sensors is assumed, but the same procedure can be applied to measurements with more sensors 1 Perform a coincidence measurement with a large coincidence window 2 Group the event timestamps based on events belonging to a single photon burst, eg caused by a gamma quantum or a laser pulse 3 Bin all timestamp differences t i,j for each pair i,j of participating sensors in a histogram This should give a Gaussian distribution of timestamp differences as illustrated in figure 56 Extract the mean of all Gaussian distributions This gives the skew between each sensor pair 4 From the extracted skews select one sensor as reference, eg the one with highest timestamps: t 0 skew = 0 5 Get the skew values t 0,i of the pairs containing this sensor and use these values on your measurement data to correct your timestamps by adding t 0,i to the timestamps of each sensor i Koninklijke Philips NV 2016 Page 97

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99 18 Use SYNC settings to configure hardware coincidence checking The SYNC settings of the tile and control unit (see chapter 111) can be used to set up coincidence selection in hardware, which has the advantage over (standard) software coincidence checking that noise events can be directly discarded before they are transmitted via the USB interface It can thus help to decrease the number of events lost due to the relatively slow readout of the PC The disadvantage is its complex and difficult configuration In contrast to software coincidence selection it does not work by comparing the die timestamps with each other, but by generating gate signals from die triggers (SYNCs), which define intervals during which the tile will forward (or discard) acquired events Due to signal skew and propagation delays the correct adjustment of timings can be tricky Maybe the biggest disadvantage is, that due to the fact that the hardware coincidence selection relies on the forward of die triggers, the dies have to be configured in such a way that always the two dies within one SYNC group share their trigger signal (compare chapter 581) Thus each die trigger will generate an unvalidated event on its SYNC group neighbor The basic idea behind the configuration is to use the fast SYNC signal generated by the dies (usually validated, compare chapter 581) to generate a gate for the delayed event processing of the tile FPGA The delay of the tile FPGA event processing is caused by eg later transmission of event data from the die, ie after the integration interval, (depends on the configured integration interval), and processing delays inside the tile FPGA (few hundred ns) The SYNC signal from the dies will be forwarded to the base unit (tile SYNC- OUT board SYNC-IN) where coincidence checking, delay and window generation can be performed The generated window will be fed back to the tile(s) (board SYNC-OUT tile SYNC-IN), where it is used to gate the events Notes In the following example procedure a validation length of 40 ns and an integration interval of 645 ns is used The given delay and gate lengths will be different for other settings and/or hardware configuration, etc and have to be determined individually There is usually not much benefit from setting the hardware selection limits as strict as possible, as they will be more sensitive to small changes Koninklijke Philips NV 2016 Page 99

100 of the acquisition parameters then A better approach is to set them just as strict that only a few or no frames are lost during during data readout, and do the finer coincidence checking in software or offline after the measurement Procedure 1 The external SYNC connector (Laser Trg) on the base unit (SYNC-EXT) will not be used in this example To be sure that it does not interfere with our configuration we configure it as output This has also the possible advantage that we are able to monitor the signals that are sent to the tile(s) on an oscilloscope for debugging config sync ext -d out -s tile -S First we have to determine the correct gate delay and width to be configured on the base unit 2 Forward the die SYNCs/triggers to the base unit For now we do not check for coincidences on the tile, but request to send a SYNC from the tiles as soon as one SYNC groups generates a SYNC (Note: Dies in the same SYNC group will share their trigger SYNC now) config sync tile --out on --out-pulse-len 5 --out-coinc 1 3 Measure the single event rate (Processed Events) on the tiles Be sure the event rate is well below saturation (< 120 khz) If the event rate is already saturated it will be difficult to monitor variations, so adjust trigger and/or validation settings if this is the case capture -f 100 -q 4 Enable the gating option on the tiles (window generation will be done in the base-unit): config sync tile --in-mode gate --in-win-gen off -S 5 Re-check the event rates As currently no gate is provided you should observe triggers, but the processed event rate should be 0 khz capture -f 100 -q 6 Forward the gate from the base unit to the tile(s): config sync out --source window -S 7 The base unit has to accept the tile SYNC from the selected tiles and generate a gate signal Here we assume tiles on position 2 and 4 We start with a very large window and a small delay to be sure we do not filter any events for now Also no coincidence checking is done here: Page 100 Koninklijke Philips NV 2016

101 config sync in --tile-in on --tile-pos 2,4 --tile-num 1 --tile-delay 0 --tile-len 0 --comb-delay comb-len S 8 Re-checking capture rates should still be similar as in step 3 9 Now iteratively increase the comb-delay (gate delay) and decrease the comb-len (gate width) parameter Observed event rates should still be stable Compare from time to time with the event rates acquired with tile gating off (config sync tile --in-mode off) The event rates should stay similar with gating on and off eg after several iterations your SYNC-IN configuration could look similar to this: config sync in --tile-in on --tile-pos 2,4 --tile-num 1 --tile-delay 0 --tile-len 0 --comb-delay comb-len As the gate delay and width are now configured (remember that this parameters will change when you adjust eg the integration time!) coincidence detection is now realized by defining when the gate is generated in the base unit eg to require events from both tiles we adjust the tile-num parameter above, which defines from how many tiles the base-unit has to detect a SYNC within a clock window of 5 ns: config sync in --tile-num 2 11 To adjust the coincidence length between the tiles the tile SYNC output window can be adjusted, eg: config sync tile --out-pulse-len To make a selection on events where a minimum number of SYNC groups on a tile participated the tile SYNC-OUT can be configured to require SYNC signals from multiple SYNC groups within a given window eg to require SYNCs from 3 SYNC groups within 10 ns: config sync tile --out-coinc 3 --out-coinc-win 10 In the acquired list-mode data there should be now a coarse pre-selection of coincident events on tile and die basis, which can be used to make a finer, timestamp based selection during analysis 181 Use SYNC settings to trigger slave tiles by a master tile The SYNC settings can be used to generate a trigger signal on one master tile and use this signal to trigger one or more slave tiles Koninklijke Philips NV 2016 Page 101

102 Technical Notes There is no (direct) way to disable the internal trigger of the sensors, so the slave tiles will be triggered by external and internal triggers External triggers will always be validated There will be a considerable delay between the trigger generation on the master tile and trigger reception on the slave tiles, which may be to big for many applications In any case it should be checked by checking timestamp differences between master and slave(s) Procedure In this procedure it is assumed that tile no 2 is the master tile and tiles 3 and 4 the slave tiles 1 The base unit has to be configured to accept SYNCs from the master and forward them to the slave tiles Accept SYNC-IN from the master: config sync in --tile-in on --ext-in off --tile-pos 2 1: Select direct SYNC-OUT path (faster than window path): config sync out --source direct 1: Copy SYNCs to ext connector (optional for monitoring): config sync ext --dir out --source tile -S 1: 2 Then the master tile has to be configured to sent the SYNC signal to the base unit No tile SYNC-IN, only SYNC-OUT for master: config sync tile --in-mode off --out on --out-pulse-len 5 1:2 3 Slave tile have to accept the SYNC as trigger No tile SYNC-OUT, SYNC-IN as trigger for slaves: config sync tile --in-mode trigger --out off 1:3,4 The trigger signal that are sent to the slave tiles can be monitored on the external Laser Trg connector with eg an oscilloscope for verification (only when SYNC copy was configured) Page 102 Koninklijke Philips NV 2016

103 Part VI Appendix Koninklijke Philips NV 2016 Page 103

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105 A FAQ: Frequently Asked Questions When should I recalibrate the sensors? See chapter 15 Do I have to measure a new dark count map before each calibration? For the TDC and inhibit memory calibration: Yes These dark count map based calibrations use only the latest dark count map as input, so you will get the same calibration data if you do not remeasure the dark count map How should I calibrate the skew? See chapter 17 Why do I observe higher event rates for higher trigger schemes than for lower schemes? The measured event rate depends on both the trigger and the validation scheme Because the sensor cells are (by default) not recharged before the end of the acquisition sequence, cell discharges due to dark counts can accumulate until the configured trigger scheme is fulfilled These discharged cells also count for the validation logic and fewer cell breakdowns are needed for a successful validation during the configured validation interval Thus for a high trigger scheme and a low validation threshold the event Koninklijke Philips NV 2016 Page 105

106 rate may increase See chapter 51 I observe error messages during test tdc / test jtag / test sam Please contact the support and send a description of the error that you are observing and a copy of the DPCShell program output I observe communication errors and system crashes during data acquisition Please make sure that your power supply is not running into the configured current limit If it does this would mean that the power input to the base unit becomes unstable which will lead to malfunctioning High currents can indicate very high trigger or event rates Please check the trigger or event rates of your tiles and verify that there is no light leak in your setup It may also be necessary to adjust the trigger and validation schemes If you still experience these problems contact the support The tile sensors are not detected anymore and/or I experience errors during the power up sequence Please verify that the tiles are connected in the right orientation and that the connectors are plugged in properly If you still experience these problems contact the support Page 106 Koninklijke Philips NV 2016

107 Glossary Cell see SPAD Coarse counter (TDC) Part of the TDC counting clock cycles Corrected (measurement) mode Measurement mode, where calibration routines are applied to the event data (eg TDC timestamp calibration) cps counts per second Daisy chain Wiring of electronic devices in sequence, where the output of one device is connected to the input of the next device dark count A cell discharge, that is not caused by a photon detection (noise) dark count map Distribution of cell dark count rates over the sensor Die Sensor Single semiconductor chip sensor (see 41) DPC Digital Photon Counter Fine counter (TDC) Part of the TDC covering the time between two clock edges FPGA Field Programmable Gate Array Holdoff interval Idle interval in front of the recharge phase of the sensor acquisition sequence Inhibit map Distribution of inhibited cells over the sensor Inhibit memory Memory on the sensor die, storing the location of inhibited cells JTAG Joint Test Action Group; Standard for debugging and configuring electronic chips Jitter Varying time difference between signals LVDS Low Voltage Differential Signaling Micro-cell see SPAD Module (sensor) PCB holding several tile sensors PCB Printed Circuit Board Koninklijke Philips NV 2016 Page 107

108 Pixel Collection of micro-cells, giving one common photon count value Raw (measurement) mode Measurement mode, where the event data is collected unmodified (eg no TDC timestamps calibration) RTL Row-Trigger-Line; Collection of 2 3 micro-cell rows SAM Serial-Access-Memory (the inhibit memory) SiPM Silicon photomultiplier Skew Fixed time difference between signals SPAD Single-Photon Avalanche Diode Sub-pixel Division of a pixel used for the trigger threshold setting (see 52) TDC Time-to-Digital Converter Tile sensor Multiple dies attached to a PCB Page 108 Koninklijke Philips NV 2016

109 B Operating Conditions Base Unit Operating Voltage 5 V (max 5 A) Operating Temperature 0 C 40 C Storage Temperature 0 C 80 C Relative Humidity During Operation 5 % 70 % Relative Humidity During Storage 5 % 90 % DPC Sensors Operating Temperature 0 C 40 C Storage Temperature 0 C 80 C Relative Humidity During Operation 5 % 70 % Relative Humidity During Storage 5 % 90 % Laptop Consult separate product documentation Programmable Power Supply Consult separate product documentation Koninklijke Philips NV 2016 Page 109

110 Page 110 Koninklijke Philips NV 2016

111 C Mechanical Dimensions Koninklijke Philips NV 2016 Page 111

112 x mm Pixel 32 mm Pixel x mm Pixel 2 Pixel 32 mm 32 x mm Pixel 4 x mm Pixel 3 Pixel 32 mm Pixel 32 mm Figure C1: DPC3200 die dimensions [mm] Die Die Die Die Die Die Die Die Die Die Die Die Die Die Die Die Figure C2: DPC3200 tile dimensions (front) [mm] Page 112 Koninklijke Philips NV 2016

113 Figure C3: Dimensions of the DPCxx00 tile frame [mm] Koninklijke Philips NV 2016 Page 113

114 C1 Tile-TEK Base Unit Dimensions Figure C4: Dimensions of the Tile-TEK base unit [mm] Page 114 Koninklijke Philips NV 2016