EL Video Distribution Amplifier OBSOLETE PRODUCT NO RECOMMENDED REPLACEMENT contact our Technical Support Center at --INTERSIL or www.intersil.com/tsc DATASHEET FN77 Rev. The EL is a dual current feedback operational amplifier designed for video distribution solutions. This device features a high drive capability of 5mA while consuming only 5mA of supply current per amplifier and operating from a single 5V to V supply. The EL is available in the industry standard Ld SOIC as well as the thermally-enhanced Ld QFN package. Both are specified for operation over the full - C to +5 C temperature range. The EL has control pins C and C for controlling the bias and enable/disable of the outputs. The EL is ideal for driving multiple video loads while maintaining linearity. Pinouts OUTA INA+ GND NC INB- INA- INA- INA+ GND 3 3 EL ( LD SOIC) TOP VIEW - + - + EL ( LD QFN) TOP VIEW 5 7 5 VS OUTB INB+ NC INB- INB+ 9 Features Drives up to 5mA from a +V supply V P-P differential output drive into -5dBc typical driver output distortion at full output at 5kHz -7dBc typical driver output distortion at 3.75MHz Low quiescent current of 5mA per amplifier 3MHz bandwidth Pb-free available (RoHS compliant) Applications Video distribution amplifiers 5 7 NC 3 NC VS- C OUTA NC AMP A - + VS+ OUTB AMP B - + POWER CONTROL LOGIC C TABLE. 5 5 DIFF GAIN DIFF PHASE.3..3..5...3 3..3 3 3..3.. 3.5..7. 5..3..3 FN77 Rev. Page of
EL Ordering Information PART NUMBER PART MARKING TEMPERATURE RANGE ( c) PACKAGE PKG. DWG. # ELIS IS - to +5 Ld SOIC MDP7 ELIS-T7* IS - to +5 Ld SOIC MDP7 ELIS-T3* IS - to +5 Ld SOIC MDP7 ELISZ (Note) ISZ - to +5 Ld SOIC MDP7 (Pb-free) ELISZ-T7* (Note) ISZ - to +5 Ld SOIC MDP7 (Pb-free) ELISZ-T3* (Note) ISZ - to +5 Ld SOIC MDP7 (Pb-free) ELIL IL - to +5 Ld x QFN MDP ELIL-T7* IL - to +5 Ld x QFN MDP ELIL-T3* IL - to +5 Ld x QFN MDP ELILZ (Note) ELILZ-T7* (Note) ELILZ-T3* (Note) ILZ - to +5 Ld x QFN (Pb-free) ILZ - to +5 Ld x QFN (Pb-free) ILZ - to +5 Ld x QFN (Pb-free) MDP MDP MDP * Please refer to TB37 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and % matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-. FN77 Rev. Page of
EL Absolute Maximum Ratings (T A = +5 C) V S + Voltage to Ground...................... -.3V to +3.V V IN + Voltage................................. GND to V S + Current into any Input................................ ma Continuous Output Current........................... 75mA Thermal Information Ambient Operating Temperature Range..........- C to +5 C Storage Temperature Range..................- C to +5 C Operating Junction Temperature...................... +5 C Power Dissipation............................. See Curves Pb-free Reflow Profile.........................see link below http://www.intersil.com/pbfree/pb-freereflow.asp CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: T J = T C = T A Electrical Specifications V S = V, R F = 75, R L = connected to mid supply, T A = +5 C, unless otherwise specified. PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT AC PERFORMANCE BW -3dB Bandwidth R F = 5, A V = + MHz R F = 5, A V = + 5 MHz HD Total Harmonic Distortion, Differential f = khz, V O = V P-P, R L = 5-7 -3 dbc f = MHz, V O = V P-P, R L = -7 dbc f = MHz, V O = V P-P, R L = - dbc f = MHz, V O = V P-P, R L = -5 dbc SR Slew Rate, Single-ended V OUT from -3V to +3V V/µs DC PERFORMANCE V OS Offset Voltage -5 +5 mv V OS V OS Mismatch -3 +3 mv R OL Transimpedance V OUT from -.5V to +.5V.7..5 M INPUT CHARACTERISTICS I B + Non-inverting Input Bias Current -5 5 µa I B - Inverting Input Bias Current - 5 + µa I B - I B - Mismatch - + µa e N Input Noise Voltage nv Hz i N -Input Noise Current 3 pa/ Hz OUTPUT CHARACTERISTICS V OUT Loaded Output Swing (Single-ended) V S = ±V, R L = to GND ±. ±5 V V S = ±V, R L = 5 to GND ±.7 V I OUT Output Current R L = 5 ma SUPPLY V S Supply Voltage Single supply.5 3 V I S (ELIS only) Supply Current, Maximum Setting All outputs at mid supply.3 ma SUPPLY (ELIL ONLY) I S + (Full Power) Positive Supply Current per Amplifier All outputs at V, C = C = V.3 ma I S + (Medium Power) Positive Supply Current per Amplifier All outputs at V, C = 5V, C = V 7.9 ma I S + (Low Power) Positive Supply Current per Amplifier All outputs at V, C = V, C = 5V 3.7.5 5.5 ma I S + (Power Down) Positive Supply Current per Amplifier All outputs at V, C = C = 5V..5 ma I INH, C or C C, C Input Current, High C, C = 5V 9 5 µa I INL, C or C C, C Input Current, Low C, C = V -5 +5 µa FN77 Rev. Page 3 of
EL Typical Performance Curves V S = ±V, R L = DIFF V S = ±V, R L = DIFF R F = 5 R F = 3 R F = 5 R F = 3 R F = 75 R F = k R F = 75 R F = k k M M M 5M FIGURE. DIFFERENTIAL FREQUENCY RESPONSE WITH VARIOUS R F (FULL POWER MODE) k M M M 5M FIGURE. DIFFERENTIAL FREQUENCY RESPONSE WITH VARIOUS R F (3/ POWER MODE) V S = ±V, R L = DIFF RF = 5 V S = ±V, A V = R L = DIFF RF = 75 RF = k RF = 3 R F = 3 R F = 5 R F = 75 R F = k k M M M 5M FIGURE 3. DIFFERENTIAL FREQUENCY RESPONSE WITH VARIOUS R F (/ POWER MODE) k M M M 5M FIGURE. DIFFERENTIAL FREQUENCY RESPONSE WITH VARIOUS R F (FULL POWER MODE) V S = ±V, A V = R L = DIFF V S = ±V, A V = R L = DIFF R F = 3 R F = 5 R F = 75 R F = k R F = 5 R F = 3 R F = k R F = 75 k M M M 5M FIGURE 5. DIFFERENTIAL FREQUENCY RESPONSE WITH VARIOUS R F (3/ POWER MODE) k M M M 5M FIGURE. DIFFERENTIAL FREQUENCY RESPONSE WITH VARIOUS R F (/ POWER MODE) FN77 Rev. Page of
EL Typical Performance Curves (Continued) V S = ±V A V = R L = DIFF R F = R F = 5 R F = k R F = 75 NORMALIZED - - - V S = ±V A V = R F = 5 R L = 5 R L = 5 R L = 5 - - k M M M 5M FIGURE 7. DIFFERENTIAL FREQUENCY RESPONSE WITH VARIOUS R F k M M M 5M FIGURE. FREQUENCY RESPONSE FOR VARIOUS R LOAD -5-55 - V S = ±V R L = 5 DIFF R F = 75 ELIL ELIS -5-55 - V S = ±V R L = 5 DIFF R F = 75 ELIL ELIS -5-7 -75-5 -7 - -5 nd HD 3 5 7 9 V OP-P (V) FIGURE 9. DISTORTION BETWEEN ELIL vs ELIS AT MHz -75 - nd HD 3 5 7 9 V OP-P (V) FIGURE. DISTORTION BETWEEN ELIL vs ELIS AT 3MHz - -5-5 -55 - V S = ±V R L = 5 DIFF R F = 75 ELIL ELIS - -5-5 -55 V S = ±V R L = 5 DIFF R F = 75 ELIL ELIS -5-7 nd HD - nd HD -75 3 5 7 9 V OP-P (V) FIGURE. DISTORTION BETWEEN ELIL vs ELIS AT 5MHz -5 3 5 7 9 V OP-P (V) FIGURE. DISTORTION BETWEEN ELIL vs ELIS AT MHz FN77 Rev. Page 5 of
EL Typical Performance Curves (Continued) -7-75 - V S = ±V R F = 75 V OP-P = V - -5-7 V S = ±V R F = 75 V OP-P = V -5 nd HD -75-9 - -95-5 nd HD - 5 7 9 3 5 R LOAD ( ) FIGURE 3. nd AND 3rd HARMONIC DISTORTION vs R LOAD @ MHz (ELIL) -9 5 7 9 3 5 R LOAD ( ) FIGURE. nd AND 3rd HARMONIC DISTORTION vs R LOAD @ 3MHz (ELIL) -5-55 - V S = ±V R F = 75 V OP-P = V - -5-5 V S = ±V R F = 75 V OP-P = V -5-7 -75-55 - -5 - nd HD -7 nd HD -5-75 -9 5 7 9 3 5 R LOAD ( ) FIGURE 5. nd AND 3rd HARMONIC DISTORTION vs R LOAD @ 5MHz (ELIL) - 5 7 9 3 5 R LOAD ( ) FIGURE. nd AND 3rd HARMONIC DISTORTION vs R LOAD @ MHz (ELIL) V S = ±V, R L = 5 R F = 75 C L = 7pF C L = 33pF V S = ±V, R L = 5 R F = 75 C L = 7pF C L = 39pF C L = pf C L = pf C L = pf C L = pf k M M M 5M FIGURE 7. FREQUENCY RESPONSE WITH VARIOUS C L k M M M 5M FIGURE. FREQUENCY RESPONSE vs VARIOUS C L (3/ POWER MODE) FN77 Rev. Page of
EL Typical Performance Curves (Continued) V S = ±V, R L = 5 R F = 75 C L = pf C L = pf C L = 7pF C L = 37pF CHANNEL SEPARATION (db) - -3-5 -7-9 A B B A k M M M 5M FIGURE 9. FREQUENCY RESPONSE WITH VARIOUS C L (/ POWER MODE) - k k M M M FIGURE. CHANNEL SEPARATION vs FREQUENCY - M 3M PSRR (db) -3-5 -7 PSRR+ PSRR- MAGNITUDE ( ) 3k k 3k k 3k GAIN PHASE 5 5-5 - PHASE ( ) -9 k -5 - - k M M M M M FIGURE. PSRR vs FREQUENCY - k k k M M M FIGURE. TRANSIMPEDANCE (R OL ) vs FREQUENCY VOLTAGE/CURRENT NOISE (nv/ Hz)(nA/ Hz) EN. IN-... IN+ k k k M M FIGURE 3. VOLTAGE AND CURRENT NOISE vs FREQUENCY OUTPUT IMPEDANCE ( ). V S = ±V, A V = R F = 75 k k M M M FIGURE. OUTPUT IMPEDANCE vs FREQUENCY FN77 Rev. Page 7 of
EL Typical Performance Curves (Continued) BW (MHz) 5 3 9 7, R F = 75 R LOAD = DIFF FULL POWER MODE 3/ POWER MODE / POWER MODE DIFFERENTIAL GAIN (%). VS = ±V.35.3.5..5..5 FULL POWER MODE / POWER MODE 3/ POWER MODE 5 3. 3.5..5 5. 5.5. ±V S (V) FIGURE 5. DIFFERENTIAL BANDWIDTH vs SUPPLY VOLTAGE 3 # OF 5 LOADS FIGURE. DIFFERENTIAL GAIN.9 VS = ±V DIFFERENTIAL PHASE (%)..7. FULL POWER MODE.5..3 / POWER MODE 3/ POWER MODE.. 3 # OF 5 LOADS FIGURE 7. DIFFERENTIAL PHASE I S (ma) FULL POWER MODE 3/ POWER MODE / POWER MODE +IS -IS 3 5 ±V S (V) FIGURE. SUPPLY CURRENT vs SUPPLY VOLTAGE.k INPUT BIAS CURRENT (µa) - - -3 - IB+ IB- SLEW RATE (V/µs).7k.k.5k.k.3k -5 5 5 75 5 5 TEMPERATURE ( C) FIGURE 9. INPUT BIAS CURRENT vs TEMPERATURE.k -5-5 5 5 75 5 5 TEMPERATURE ( C) FIGURE 3. SLEW RATE vs TEMPERATURE FN77 Rev. Page of
EL Typical Performance Curves (Continued) 5 3. OFFSET VOLTAGE (mv) 3 TRANSIMPEDANCE (M ).5..5..5 - -5-5 5 5 75 5 5 TEMPERATURE ( C) -5-5 5 5 75 5 5 TEMPERATURE ( C) FIGURE 3. OFFSET VOLTAGE vs TEMPERATURE FIGURE 3. TRANSIMPEDANCE vs TEMPERATURE 5. 5.5 R LOAD = V S =±V. 5.5 OUTPUT VOLTAGE (±V) 5..95.9.5 SUPPLY CURRENT (ma) 5..5. 3.5 3...5.75-5 -5 5 5 75 5 5 TEMPERATURE ( C). -5-5 5 5 75 5 5 TEMPERATURE ( C) FIGURE 33. OUTPUT VOLTAGE vs TEMPERATURE FIGURE 3. SUPPLY CURRENT vs TEMPERATURE 3 R F = 75 R L = DIFF PEAKING (db) -.5 3. 3.5..5 5. 5.5. V S (±V) FIGURE 35. DIFFERENTIAL PEAKING vs SUPPLY VOLTAGE FN77 Rev. Page 9 of
EL Typical Performance Curves (Continued) JEDEC JESD5-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY (-LAYER) TEST BOARD 3.5 JEDEC JESD5-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD. POWER DISSIPATION (W) 3..5..5..5.3W SO + C/W POWER DISSIPATION (W)...... 7mW SO JA = + C/W 5 5 75 5 5 5 AMBIENT TEMPERATURE ( C) 5 5 75 5 5 5 AMBIENT TEMPERATURE ( C) FIGURE 3. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE FIGURE 37. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE JEDEC JESD5-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD - LPP EXPOSED DIEPAD SOLDERED TO PCB PER JESD5-5.5 JEDEC JESD5-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD. POWER DISSIPATION (W). 3.5 3..5..5..5 3.5W QFN JA = + C/W POWER DISSIPATION (W)..... 33mW QFN JA = +5 C/W 5 5 75 5 5 5 5 5 75 5 5 5 AMBIENT TEMPERATURE ( C) AMBIENT TEMPERATURE ( C) FIGURE 3. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE FIGURE 39. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE Applications Information Product Description The EL is a dual current feedback operational amplifier designed for video distribution solutions. It is a dual current mode feedback amplifier with low distortion while drawing moderately low supply current. It is built using Intersil s proprietary complimentary bipolar process and is offered in industry standard pinouts. Due to the current feedback architecture, the EL closed-loop 3dB bandwidth is dependent on the value of the feedback resistor. First the desired bandwidth is selected by choosing the feedback resistor, R F, and then the gain is set by picking the gain resistor, R G. The curves at the beginning of the Typical Performance Curves on page show the effect of varying both R F and R G. The 3dB bandwidth is somewhat dependent on the power supply voltage. Power Supply Bypassing and Printed Circuit Board Layout As with any high frequency device, good printed circuit board layout is necessary for optimum performance. Ground plane construction is highly recommended. Lead lengths should be as short as possible, below ¼. The power supply pins must be well bypassed to reduce the risk of oscillation. A.7µF tantalum capacitor in parallel with a.µf ceramic capacitor is adequate for each supply pin. For good AC performance, parasitic capacitances should be kept to a minimum, especially at the inverting input. This implies keeping the ground plane away from this pin. Carbon resistors are acceptable, while use of wire-wound resistors should not be used because of their parasitic inductance. Similarly, capacitors should be low inductance for best performance. FN77 Rev. Page of
EL Capacitance at the Inverting Input Due to the topology of the current feedback amplifier, stray capacitance at the inverting input will affect the AC and transient performance of the EL when operating in the non-inverting configuration. In the inverting gain mode, added capacitance at the inverting input has little effect since this point is at a virtual ground and stray capacitance is therefore not seen by the amplifier. Feedback Resistor Values The EL has been designed and specified with R F = 5 for A V = +. This value of feedback resistor yields extremely flat frequency response with little to no peaking out to MHz. As is the case with all current feedback amplifiers, wider bandwidth, at the expense of slight peaking, can be obtained by reducing the value of the feedback resistor. Inversely, larger values of feedback resistor will cause rolloff to occur at a lower frequency. See Typical Performance Curves beginning on page, which show 3dB bandwidth and peaking vs frequency for various feedback resistors and various supply voltages. Bandwidth vs Temperature Whereas many amplifier's supply current and consequently 3dB bandwidth drop off at high temperature, the EL was designed to have little supply current variations with temperature. An immediate benefit from this is that the 3dB bandwidth does not drop off drastically with temperature. Single Supply Operation If a single supply is desired, values from +5V to +V can be used as long as the input common mode range is not exceeded. When using a single supply, be sure to either:. DC bias the inputs at an appropriate common mode voltage and AC couple the signal, or. Ensure the driving signal is within the common mode range of the EL. Driving Cables and Capacitive Loads The EL was designed with driving multiple coaxial cables in mind. With 5mA of output drive and low output impedance, driving six, 75 double terminated coaxial cables to ±V with one EL is practical. When used as a cable driver, double termination is always recommended for reflection-free performance. For those applications, the back termination series resistor will decouple the EL from the capacitive cable and allow extensive capacitive drive. Other applications may have high capacitive loads without termination resistors. In these applications, an additional small value (5 to 5 ) resistor in series with the output will eliminate most peaking. The following schematic show the EL driving double terminated cables, each an average length of 5 ft. Supply Voltage Range The EL has been designed to operate with supply voltages from ±.5V to ±V. Optimum bandwidth, slew rate, and video characteristics are obtained at higher supply voltages. However, at ±.5V supplies, the 3dB bandwidth at A V = +5 is a respectable MHz. FN77 Rev. Page of
EL +5V EL -5V 75 75 Copyright Intersil Americas LLC 7-. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see www.intersil.com/en/products.html Intersil products are manufactured, assembled and tested utilizing ISO9 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN77 Rev. Page of
EL Small Outline Package Family (SO) A D h X 5 N (N/)+ E E PIN # I.D. MARK c A SEE DETAIL X B. M C A B (N/) L C e H A SEATING PLANE GAUGE PLANE.. C. M C A B b A DETAIL X L ± MDP7 SMALL OUTLINE PACKAGE FAMILY (SO) INCHES SO SO (.3 ) SO SO SO SYMBOL SO- SO- (.5 ) (SOL-) (SOL-) (SOL-) (SOL-) TOLERANCE NOTES A....... MAX - A....7.7.7.7.3 - A.57.57.57.9.9.9.9. - b.7.7.7.7.7.7.7.3 - c.9.9.9..... - D.93.3.39..5..7., 3 E.3.3.3..... - E.5.5.5.95.95.95.95., 3 e.5.5.5.5.5.5.5 Basic - L.5.5.5.3.3.3.3.9 - L....5.5.5.5 Basic - h.3.3.3.... Reference - N Reference - Rev. M /7 NOTES:. Plastic or metal protrusions of. maximum per side are not included.. Plastic interlead protrusions of. maximum per side are not included. 3. Dimensions D and E are measured at Datum Plane H.. Dimensioning and tolerancing per ASME Y.5M-99 FN77 Rev. Page 3 of
EL QFN (Quad Flat No-Lead) Package Family A X.75 C (E) C 3 SEATING PLANE N LEADS L N (N-) (N-) b (N/) e PIN # I.D. MARK TOP VIEW (N/). M C A B (N-) (N-) N BOTTOM VIEW A DETAIL X 3. C. C SEE DETAIL "X" N LEADS & EXPOSED PAD SIDE VIEW C A (c) D (D) 7 (L) NE N LEADS E B X.75 C PIN # I.D. 5 3 MDP QFN (QUAD FLAT NO-LEAD) PACKAGE FAMILY (COMPLIANT TO JEDEC MO-) MILLIMETERS SYMBOL QFN QFN3 QFN3 TOLERANCE NOTES A.9.9.9.9 ±. - A.... +.3/-. - b.5.5.3. ±. - c.... Reference - D 7. 5.. 5. Basic - D 5. 3. 5. 3./. Reference E 7. 7... Basic - E 5. 5. 5../3. Reference e.5.5..5 Basic - L.55..53.5 ±.5 - N 3 3 3 Reference ND 7 7 Reference NE 9 Reference 5 MILLIMETERS TOLER- SYMBOL QFN QFN QFN QFN ANCE NOTES A.9.9.9.9.9 ±. - A..... +.3/ -. - b.5.5.3.5.33 ±. - c..... Reference - D.. 5... Basic - D.5. 3.7.7. Reference - E 5. 5. 5... Basic - E 3.5 3. 3.7.7. Reference - e.5.5.5.5.5 Basic - L..... ±.5 - N Reference ND 5 5 5 Reference NE 7 5 5 Reference 5 Rev /7 NOTES:. Dimensioning and tolerancing per ASME Y.5M-99.. Tiebar view shown is a non-functional feature. 3. Bottom-side pin # I.D. is a diepad chamfer as shown.. N is the total number of terminals on the device. 5. NE is the number of terminals on the E side of the package (or Y-direction).. ND is the number of terminals on the D side of the package (or X-direction). ND = (N/)-NE. 7. Inward end of terminal may be square or circular in shape with radius (b/) as shown.. If two values are listed, multiple exposed pad options are available. Refer to device-specific datasheet. FN77 Rev. Page of