Low power single channel OPAmp NJMA/NJMA Features Input offset voltage :.mv max. Input offset voltage drift : µv/ typ. Supply current :.ma typ. at Vcc + =V Input bias current : na typ. Input commonmode voltage range includes ground Internal ESD protection : Human body model (HBM)±V typ. Integrated EMI filter : EMIRR=8dB typ. @ f=.8ghz Wide single supply voltage range or dual supplies +V to +V or ±.V to ±6V Description The NJMA / NJMA consist of two independent, high gain, internally frequency compensated operation amplifiers, which were designed specifically to operate from a single power supply over a wide range of voltages. Operation from split power supplies is also possible and the low power supply current drain is independent of the magnitude of the power supply voltage. Application areas include transducer amplifiers, DC gain blocks, and all the conventional OPAmp circuits, which now can be more easily implemented in single power supply systems. For example, the NJMA / NJMA can be directly operated off of the standard +V power supply voltage, which is used in digital systems and will easily provide the required interface electronics without requiring the additional ±V power supplies. NJMAF, NJMAF ( SOT ) NJMAF, NJMAF ( SC88A ) Output NJMAKG ( DFN6G (ESON6G) ) V CC NonInverting Input NonInverting Input Pin connections NJMAF, NJMAF V CC Inverting Input (Top View) (Top View) NJMAF, NJMAF V CC + Inverting Input V CC + Output (Top View) V + CC V 6 CC N.C. Output Exposed Pad on Underside NonInverting Input inverting Input NJMAKG(*) (*)Connect to exposed pad to V CC Schematic diagram Figure. Schematic diagram Vcc + V CC 6μA C C μa μa Q Q6 inverting Inverting Input Input NonInverting Input noninverting Input Q Q Q Q Q Q Q7 Q R SC Output Output Q Q8 Q9 μa GND Vcc Ver.
NJMA/NJMA Absolute maximum ratings and operating conditions Table. Absolute maximum ratings (Tamb=ºC) Symbol Parameter RATINGS Unit V CC Supply voltage (V + CC V CC ) V V IN Input voltage () Vcc. to Vcc + V V o Output Terminal Input Voltage Vcc. to Vcc + +. V V ID Differential input voltage ± V I IN Input current () ma in DC or ma in AC (duty cycle = %, T=s) ma T stg Storage temperature range 6 to + ºC T j Maximum junction temperature ºC P D Power Dissipation SOT :8 (), 6 () SC88A : 6 (), 9 () DFN6G : (6), (7) θja Thermal resistance junction to ambient () SOT :6 (), 9 () SC88A : (), 6 () DFN6G :8 (6), (7) ºC /W ºC /W ψjt Thermal resistance junction to top surface of IC package () SC88A :9 (), 7 () SOT :68 (), 8 () DFN6G :6 (6), 6 (7). Input voltage is the voltage should be allowed to apply to the input terminal independent of the magnitude of VCC + The normal amplifier operation input voltage is within Common Mode Input Voltage Range specified in the Electrical characteristics.. This input current only exists when the voltage at any of the input leads is driven negative. It is due to the collectorvase junction of the input PNP transistor becoming forwardbiased and thereby acting as input diode clamp. In addition to this diode action, there is NPN parasitic action on the IC chip. This transistor action can cause the output voltages of the Opamps to go to the VCC voltage level (or to ground for a large overdrive) for the time during which an input is driven negative.. Shortcircuit can cause excessive heating and destructive dissipation. Values are typical.. Mounted on glass epoxy board. (76...6mm:based on EIA/JDEC standard, Layers FR).Mounted on glass epoxy board. (76...6mm:based on EIA/JDEC standard, Layers FR), internal Cu area: 7. x 7.mm 6.Mounted on glass epoxy board. (...6mm: based on EIA/JEDEC standard, Layers FR, with Exposed Pad) 7.Mounted on glass epoxy board. (...6mm: based on EIA/JEDEC standard, Layers FR, with Exposed Pad) *For Layers: Applying 99. 99.mm inner Cu area and a thermal via hole to a board based on JEDEC standard JESD mw. Table. Operating conditions T amb =ºC Symbol Parameter Value Unit. V CC Supply voltage (V CC + V CC ) to V T oper Operating freeair temperature range to + C Ver.
NJMA/NJMA Electrical characteristics Table. V CC + = +V, V CC = V, T amb = C (unless otherwise specified) Symbol Parameter Min. Typ. Max. Unit Input offset voltage () V io T amb =.. ºC T amb 7 ºC () mv DV io Input offset voltage drift () ºC T amb 7 ºC µv/ºc I io DI io I ib A vd Input offset current T amb = ºC T amb 7 ºC () Input offset current drift () ºC T amb 7 ºC pa/ºc Input bias current () T amb = na ºC T amb 7 ºC () Large signal voltage gain (V CC + = +V, R L=kΩ, Vo=.V to.v) T amb = na V/mV SVR I CC V icm CMR ºC T amb 7 ºC () Supply voltage rejection ratio(v CC + = V to V, Rs<kΩ) T amb = 6 ºC T amb 7 ºC () 6 Supply current, all amp, no load V + CC = V () ºC T amb 7 ºC..7 V + CC = V ºC T amb 7 ºC () Input common mode voltage range(v CC + = +V () ) T amb = ºC V CC +. ºC T amb 7 ºC () V CC + Common mode rejection ratio(r S < kω) T amb = 7 ºC T amb 7 ºC () 6 db ma V db Ver.
NJMA/NJMA Table. V CC + = +V, V CC = V, T amb = + C, (unless otherwise specified) Symbol Parameter Min. Typ. Max. Unit I source I sink V OH V OL SR GBP THD e n Output source current V + CC = V, V O = +V, V id = +V ma Output sink current V + CC = V, V o = +V, V id = V ma V + CC = V, V o = +.V, V id = V µa High level output voltage(v + CC = V) T amb =,R L = kω 6 7 ºC T amb 7 ºC (),R L = kω 6 V T amb =,R L = kω 7 8 ºC T amb 7 ºC (),R L = kω 7 Low level output voltage T amb =,R L = kω mv ºC T amb 7 ºC (),R L = kω Slew rate V + CC = V, V i=. to V, R L = kω,.6 V/µs C L = pf, unity gain Gain bandwidth product V + CC = V, f = khz, V in=mv,. MHz R L = kω, C L = pf Total harmonic distortion f = khz, A V=dB, R L = kω, V O = V pp,. % C L = pf Equivalent input noise voltage f = khz, R S=Ω, V + CC = V nv/ Hz. V O =.V, R S=Ω, V < V CC + < V, < V ic < V CC +.V.. The direction of the input current is out of the IC.. The input commonmode voltage of either input signal voltage should not be allowed to go negative by more than.v. The upper end of the commonmode voltage range is V CC +.V, but either or both inputs can go to +V without damage.. Due to the proximity of external components, ensure that stray capacitance between these external parts dose not cause coupling.. This parameter is not % test. Ver.
Slew Rate [V/μsec] Voltage [.V/div] Voltage [.V/div] Voltage Gain [db] Phase [deg] Maximum Output Voltage Swing [V PP ] NJMA/NJMA TYPICAL CHARACTERISTICS 6 Gain/Phase vs. Frequency V CC+ /V CC =±.V,G V =db,r L =kω to V CC,C L =pf 8 Maximum Output Voltage Swing vs. Frequency V CC+ =V, V CC =V, Ta=ºC 6 Ta=ºC 6 6 8 k k k M M Frequency [Hz] k k k M Frequency [Hz] Pulse Response V CC+ =V, V CC =V, R L =kω to V CC, C L =pf Pulse Response V CC+ =V, V CC =V, R L =kω to V CC, C L =pf INPUT INPUT OUTPUT OUTPUT Time[.μs/div] Time [.μs/div]. Slew Rate vs. Temperature V CC+ =V, V CC =V, f=khz G V =db, C L =pf, R L =kω to V CC.8.6 Fall. RISE.. 7 Ver.
Lowlevel Output Voltage [V] Maximum Output Voltage [V] Maximum Output Voltage [V] Maximum Output Voltage [V] Maximum Output Voltage [V] NJMA/NJMA TYPICAL CHARACTERISTICS Maximum Output Voltage vs. Load Resistance V CC+ =V, V CC =V, G V =OPEN, R L to V CC Maximum Output Voltage vs. Load Resistance V CC+ =V, V CC =V, G V =OPEN, R L to V CC Ta=ºC Ta=ºC Ta=ºC, ºC, ºC Ta=ºC, ºC, ºC k k k Load Resistance [Ω] k k k Load Resistance [Ω] Maximum Output Voltage vs. Load Resistance V CC+ =V, V CC =V, G V =OPEN, R L to V CC Maximum Output Voltage vs. Output Current V CC+ =V, V CC =V.. Ta=ºC Ta=ºC. Ta=ºC, ºC, ºC Ta=ºC k k k Load Resistance [Ω]. Output Current [ma] Lowlevel Output Voltage vs. Output Sink Current V CC+ =V, V CC =V,.... Output Sink Current [ma] 6 Ver.
Input Offset Voltage [mv] Input Bias Current [na] Input Offset Voltage [mv] Input Offset Voltage [mv] Input Offset Voltage [mv] Input Offset Voltage [mv] NJMA/NJMA TYPICAL CHARACTERISTICS Input Input Offset Voltage vs. vs. CommonMode Input Voltage V CC+ =V, =V, V CC =V Ta=ºC CommonMode Input Voltage [V] Input Offset Voltage vs. CommonMode Input Voltage V CC+ =V,V CC =V Ta=ºC CommonMode Input Voltage [V] Input Offset Voltage vs. CommonMode Input Voltage V CC+ =V,V CC =V Input Offset Voltage vs. Temperature V COM =V CC+ / V CC+ =V V CC+ =V Ta=ºC V CC+ =V.... CommonMode Input Voltage [V] 7 Input Offset Voltage vs. Supply Voltage V CC =V,V COM =V CC+ / Input Bias Current vs. Temperature V CC =V, V COM =V V CC+ =V, V, V Ta=ºC Supply Voltage:V CC+ [V] 7 Ver. 7
Equivalent Input Noise Voltage [nv/ Hz] Supply Current [ma] Supply Current [ma] OpenLoop Voltage Gain [db] CommonMode Rejection Ratio [db] NJMA/NJMA TYPICAL CHARACTERISTICS 8 6 OpenLoop Voltage Gain vs. Temperature V CC+ =V, R L =kω to V CC+ /, V O =.V to.v,v COM =V CC+ / 6 8 6 CMR vs. Temperature V CC+ =V, V CC =V 7 7.7 Supply Current vs. Supply Voltage V CC =V, R L =OPEN.7 Supply Current vs. Temperture V CC =V, R L =OPEN V CC+ =V.6.6. Ta=ºC. V CC+ =V.... V CC+ =V.... Supply Voltage:V CC+ [V] 7 Voltage Noise vs. Frequency V CC+ =V,V CC =V, G V =db,r F =kω, k Frequency [Hz] 8 Ver.
EMIRR [db] NJMA/NJMA APPLICATION NOTE EMIRR(EMI Rejection Ratio) Definition EMIRR is a parameter indicating the EMI robustness of an OPAmp. The definition of EMIRR is given by the following a formula (). We can grasp the tolerance of the RF signal by measuring an RF signal and offset voltage shift quantity. Offset voltage shift is small so that a value of EMIRR is big. And it understands that the tolerance for the RF signal is high. In addition, about the input offset voltage shift with the RF signal, there is the thinking that influence applied to the input terminal is dominant. Therefore, generally the EMIRR becomes value that applied an RF signal to +INPUT terminal. () V RF_PEAK :RF Signal Amplitude [ V P ] ΔV IO :Input offset voltage shift quantity [ V ] 6 EMIRR vs. Frequency V CC+ =+.V, V CC =.V, V RF_PEAK =mv P, G V = 8 6 M M G G Frequency [Hz] *For details, refer to " Application Note for EMI Immunity" in our HP: http://www.njr.com/ Ver. 9
NJMA/NJMA PACKAGE OUTLINE UNIT : mm.9±..6..±. (.).±..MAX.±..6 +..8±..MIN.9±. ~.6MAX.9±. +....±.. SC88A +....6±.7.±..±..±..±. +....±....9±. +..9. +. SOT Ver.
NJMA/NJMA PACKAGE OUTLINE UNIT : mm DFN6G (ESON6G) [CAUTION] The specifications on this databook are only given for information, without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights. Ver.