1-Line, Uni-directional, Transient Voltage Suppressors http//:www.sh-willsemi.com Descriptions The is a transient voltage suppressor designed to protect power interfaces. It is suitable to replace multiple discrete components in portable electronics. The is specifically designed to protect USB port. TVS diode with higher surge capability is used to protect USB voltage bus pin. Circuit diagram The ESD5641DXX Sseries is available in DFN2. 2.-3L package. Standard products are Pb-free and Halogen-free. Features Reverse stand-off voltage: 7.5V ~ 15V Surge protection according to IEC61-4-5 8/2μs waveform: M see Table 4 Surge protection according to IEC61643-321 1/1μs waveform: M see Table 4 Low clamping voltage Solid-state silicon technology Applications Power supply protection Power management Pin configuration (Top View) Order information Table 1. Device Package Shipping Device code ESD5641D7-3/TR DFN2. 2.-3L 3/Tape&Reel 7 ESD5641D12-3/TR DFN2. 2.-3L 3/Tape&Reel 12 ESD5641D15-3/TR DFN2. 2.-3L 3/Tape&Reel 15 5641 = Series code ** = Device code YW = Date code Marking Will Semiconductor Ltd. 1 Revision 1.1, 214/1/21
Absolute maximum ratings Table 2. Parameter Symbol Rating Unit Peak pulse power (tp=8/2μs) 1)3) Ppk 4 W Peak pulse power (tp=1/1μs) 2)3) Ppk 35 W ESD according to IEC61-4-2 air discharge Junction temperature T J 125 Operating temperature T OP -4~85 Lead temperature T L 26 Storage temperature T STG -55~15 1) Non-repetitive current pulse, according to IEC61-4-5.(8/2us current waveform) 2) Non-repetitive current pulse, according to IEC61643-321.(1/1us current waveform) 3) Measured from pin 3 to pin 1 and pin 2. V ESD ESD according to IEC61-4-2 contact discharge ±3 ±3 kv Electrical characteristics (T A = 25, unless otherwise noted) I V F Forward voltage V RWM Reverse stand-off voltage I F Forward current I R Reverse leakage current V FC Forward clamping voltage V BR Reverse breakdown voltage Peak pulse current V CL Clamping voltage Peak pulse current V FC V F I BR I R V RWM V BR V CL V I F Definitions of electrical characteristics Will Semiconductor Ltd. 2 Revision 1.1, 214/1/21
Electrical characteristics (T A = 25, unless otherwise noted) Table 3. Type number Reverse Standoff Voltage V RWM (V) Breakdown voltage V BR (V) I BR = 1mA Reverse leakage current I RM (na) at V RWM Forward voltage V F (V) I F = 2mA Junction capacitance F=1MHz, VR=V Max Min Typ Max Typ Max Min Max Typ Max ESD5641D7 7.5 8. 9. 1. 1 1.45 1.25 22 3 ESD5641D12 12. 13. 15. 17. 1 1.45 1.25 12 18 ESD5641D15 15. 16. 17.5 19. 1 1.45 1.25 1 15 Table 4. Type number Rated peak pulse Clamping voltage Rated peak pulse Clamping voltage current (A) 1)3) V CL (V) at (A) 1)3) current (A) 2)3) V CL (V) at (A) 2)3) Max Max Max Max ESD5641D7 19 18 28 13 ESD5641D12 15 27 16 2 ESD5641D15 13 3 13 25 1) Non-repetitive current pulse, according to IEC61-4-5.(8/2us current waveform) 2) Non-repetitive current pulse, according to IEC61643-321.(1/1us current waveform) 3) Measured from pin 3 to pin 1 and pin 2. Will Semiconductor Ltd. 3 Revision 1.1, 214/1/21
Typical characteristics (T A = 25, unless otherwise noted) Peak pulse current (%) 1 9 5 1 T T 1 T 2 Time (µs) Front time: T 1 = 1.25 T = 8µs Time to half-value: T 2 = 2µs 2 Peak pulse current (%) 1 9 5 1 T T 1 T 2 Time (µs) Front time: T 1 = 1.25 T = 1µs Time to half-value: T 2 = 1µs 1 8/2μs waveform per IEC61-4-5 1/1μs waveform per IEC61643-321 V C - Clamping voltage (V) 35 3 25 2 15 1 Pulse waveform: t p = 8/2µs ESD5641D15 ESD5641D12 ESD5641D7 5 5 1 15 2 - Peak pulse current (A) Clamping voltage vs. Peak pulse current V C - Clamping voltage (V) 3 25 2 15 1 Pulse waveform: t p = 1/1µs ESD5641D15 ESD5641D12 ESD5641D7 5 1 15 2 25 3 - Peak pulse current (A) Clamping voltage vs. Peak pulse current 1 Peak pulse power (W) 1 1 1 1 1 1 1 Pulse time (µs) Non-repetitive peak pulse power vs. Pulse time % of Rated power 8 6 4 2 25 5 75 1 125 15 T A - Ambient temperature ( ) Power derating vs. Ambient temperatur Will Semiconductor Ltd. 4 Revision 1.1, 214/1/21
Package outline dimensions DFN2. 2.-3L E E2 H Dimensions In Millimeters Symbol Min. Typ. Max. A.55.6.65 D2 A1..2.5 D A3.1 REF. K R b.25.3.35 L D 1.9 2. 2.1 LASER MARK PIN 1 ID. b e E 1.9 2. 2.1 D2.95 1.5 1.15 E2 1.4 1.5 1.6 e 1.2 1.3 1.4 H.2.25.3 K.2.3.4 L.35.4.45 R.13 - - Recommended land pattern (Unit: mm) 1.3 1.1.5 A A1 A3 1.5.4.4 1.6.25 This recommended land pattern is for reference purposes only. Please consult your manufacturing group to ensure your PCB design guidelines are met. Will Semiconductor Ltd. 5 Revision 1.1, 214/1/21