APT82BLL APT82SLL 8V A.2Ω Power MOS 7 is a new generation of low loss, high voltage, N-Channel enhancement mode power MOSFETS. Both conduction and switching losses are addressed with Power MOS 7 by significantly lowering R DS(ON) and Q g. Power MOS 7 combines lower conduction and switching losses along with exceptionally fast switching speeds inherent with APT's patented metal gate structure. Lower Input Capacitance Lower Miller Capacitance Lower Gate Charge, Qg MAXIMUM RATINGS POWER MOS 7 R MOSFET Increased Power Dissipation Easier To Drive TO-247 or Surface Mount D 3 PAK Package BLL TO-247 D 3 PAK SLL All Ratings: T C = 2 C unless otherwise specified. G D S Symbol Parameter APT82BLL_SLL S -Source Voltage 8 M Continuous Current @ T C = 2 C Pulsed Current 1 6 M Gate-Source Voltage Continuous Gate-Source Voltage Transient ±3 ±4 P D Total Power Dissipation @ T C = 2 C Linear Derating Factor 298 2.38 Watts W/ C,T STG T L Operating and Storage Junction Temperature Range Lead Temperature:.63" from Case for 1 Sec. - to 3 C I AR Avalanche Current 1 (Repetitive and Non-Repetitive) E AR E AS Repetitive Avalanche Energy 1 Single Pulse Avalanche Energy 4 3 121 mj STATIC ELECTRICAL CHARACTERISTICS Symbol Characteristic / Test Conditions MIN TYP MAX BS -Source Breakdown Voltage ( = V, = 2µA) 8 R DS(on) -Source On-State Resistance 2 ( = 1V, = 7.A) SS I GSS (th) Zero Gate Voltage Current ( = 8V, = V) Zero Gate Voltage Current ( = 64V, = V, T C = 12 C) Gate-Source Leakage Current ( = ±3V, = V) Gate Threshold Voltage ( =, = 1mA).2 1 ±1 3 CAUTION: These Devices are Sensitive to Electrostatic Discharge. Proper Handling Procedures Should Be Followed. APT Website - http://www.advancedpower.com Ohms µa na -78 Rev B 6-24
DYNAMIC CHARACTERISTICS Symbol Characteristic Test Conditions C iss Input Capacitance = V C oss Output Capacitance = 2V C rss Reverse Transfer Capacitance f = 1 MHz Q g Total Gate Charge 3 = 1V Q V gs Gate-Source Charge = 4V I Q D = A @ 2 C gd Gate- ("Miller") Charge RESISTIVE SWITCHING t d(on) Turn-on Delay Time V t GS = V r Rise Time V = 4V t d(off) Turn-off Delay Time = A @ 2 C R t G = 1.6Ω f Fall Time E on Turn-on Switching Energy 6 INDUCTIVE SWITCHING @ 2 C V = 33V, = V E off Turn-off Switching Energy = A, R G = Ω E on Turn-on Switching Energy 6 INDUCTIVE SWITCHING @ 12 C V = 33V, = V E off Turn-off Switching Energy = A, R G = Ω SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS Symbol Characteristic / Test Conditions I S Continuous Source Current (Body Diode) I SM Pulsed Source Current 1 (Body Diode) V SD Diode Forward Voltage 2 ( = V, I S = -A) t rr Reverse Recovery Time (I S = -A, dl S /dt = 1A/µs) Q rr Reverse Recovery Charge (I S = -A, dl S /dt = 1A/µs) dv / dt Peak Diode Recovery dv / dt THERMAL CHARACTERISTICS Symbol Characteristic R θjc Junction to Case R θja Junction to Ambient APT82BLL_SLL MIN TYP MAX 23 4 pf 6 7 11 nc 9 6 23 ns 7 2 9 42 µj 11 MIN TYP MAX 6 1.3 6 ns 9. µc 1 V/ns MIN TYP MAX.4 4 C/W 1 Repetitive Rating: Pulse width limited by maximum junction temperature 2 Pulse Test: Pulse width < 38 µs, Duty Cycle < 2% 3 See MIL-STD-7 Method 3471 APT Reserves the right to change, without notice, the specifications and information contained herein. 4 Starting T j = +2 C, L = 1.76mH, R G = 2Ω, Peak I L = A dv / dt numbers reflect the limitations of the test circuit rather than the device itself. I S - A di / dt 7A/µs V R 8 C 6 Eon includes diode reverse recovery. See figures 18, 2..4-78 Rev B 6-24 Z θjc, THERMAL IMPEDANCE ( C/W).4.3.3.2.2..1..9.7..3.1. SINGLE PULSE Note: P DM t 1 t 2 Duty Factor D = t 1/t 2 Peak = P DM x Z θjc + T C 1-1 -4 1-3 1-2 1-1 1. RECTANGULAR PULSE DURATION (SECONDS) FIGURE 1, MAXIMUM EFFECTIVE TRANSIENT THERMAL IMPEDANCE, JUNCTION-TO-CASE vs PULSE DURATION
Typical Performance Curves 4 APT82BLL_SLL R DS (ON), DRAIN-TO-SOURCE ON RESISTANCE (NORMALIZED) 4 3 3 2 2 1 (TH), THRESHOLD VOLTAGE BS, DRAIN-TO-SOURCE BREAKDOWN R DS (ON), DRAIN-TO-SOURCE ON RESISTANCE (NORMALIZED) VOLTAGE (NORMALIZED).V V 1 2 2 3 FIGURE 3, LOW VOLTAGE OUTPUT CHARACTERISTICS 1.4.8 2 4 6 8 1 1 2 2 3, GATE-TO-SOURCE VOLTAGE (VOLTS) FIGURE 4, TRANSFER CHARACTERISTICS FIGURE, R DS (ON) vs DRAIN CURRENT 16 14 12 1 8 6 4 2.9 2 7 1 12 - -2 2 7 1 12 T C, CASE TEMPERATURE ( C), JUNCTION TEMPERATURE ( C) FIGURE 6, MAXIMUM DRAIN CURRENT vs CASE TEMPERATURE FIGURE 7, BREAKDOWN VOLTAGE vs TEMPERATURE 2. 1.2 2. 1. 1.. Junction temp. ( C) Power (watts) Case temperature. ( C) FIGURE 2, TRANSIENT THERMAL IMPEDANCE MODEL > (ON) x R DS (ON)MAX. 2µSEC. PULSE TEST @ <. % DUTY CYCLE = +12 C = +2 C I = 7.A D V = 1 RC MODEL.164.27 = - C.92F.12F..6 - -2 2 7 1 12 - -2 2 7 1 12, JUNCTION TEMPERATURE ( C) T C, CASE TEMPERATURE ( C) FIGURE 8, ON-RESISTANCE vs. TEMPERATURE FIGURE 9, THRESHOLD VOLTAGE vs TEMPERATURE 3 3 2 2 1 1.3 1.2 1.1 1..9 1. 1.1 1. 1..9 1.1 1..9.8.7 = &1 V NORMALIZED TO = 1V @ = 7.A =1V 7V 6.V 6V =2V 8V -78 Rev B 6-24
6 7, APT82BLL_SLL, GATE-TO-SOURCE VOLTAGE (VOLTS) 1 1mS 1 1 1mS. Crss T C =+2 C =+ C SINGLE PULSE.1 1 1 1 1 8 1 2 3 4 FIGURE 1, MAXIMUM SAFE OPERATING AREA FIGURE 11, CAPACITANCE vs DRAIN-TO-SOURCE VOLTAGE 16 1 12 8 4 OPERATION HERE LIMITED BY R DS (ON) = A =1V =2V =4V 1µS 1 2 4 6 8 1 12.3..7.9 1.1 1.3 1. Q g, TOTAL GATE CHARGE (nc) V SD, SOURCE-TO-DRAIN VOLTAGE (VOLTS) FIGURE 12, GATE CHARGES vs GATE-TO-SOURCE VOLTAGE FIGURE 13, SOURCE-DRAIN DIODE FORWARD VOLTAGE 6 3 R, REVERSE DRAIN CURRENT (AMPERES) C, CAPACITANCE (pf) 1, 1 =+ C =+2 C Ciss Coss t d(off) 3 t f -78 Rev B 6-24 SWITCHING ENERGY (µj) t d(on) and t d(off) (ns) 4 3 2 1 t d(on) R = Ω G L = 1µH 1 2 2 1 2 2 (A) (A) FIGURE 14, DELAY TIMES vs CURRENT FIGURE, RISE AND FALL TIMES vs CURRENT 7 1 6 L = 1µH E ON includes diode reverse recovery. 4 E on 3 2 1 R = Ω G L = 1µH R = Ω G E off 1 2 2 1 2 2 3 3 4 4 (A) R G, GATE RESISTANCE (Ohms) FIGURE 16, SWITCHING ENERGY vs CURRENT FIGURE 17, SWITCHING ENERGY VS. GATE RESISTANCE SWITCHING ENERGY (µj) t r and t f (ns) 2 2 1 8 6 4 2 I = A D L = 1µH E ON includes diode reverse recovery. E on t r E off
APT82BLL_SLL 9% 1% Gate Voltage 12 C Gate Voltage 12 C t d(off) t d(on) Current 9% Voltage % t r 1% 9% % Voltage t f 1% Current Switching Energy Switching Energy Figure 18, Turn-on Switching Waveforms and Definitions Figure 19, Turn-off Switching Waveforms and Definitions APTDF1 V G D.U.T. Figure 2, Inductive Switching Test Circuit TO-247 Package Outline D 3 PAK Package Outline 4.69 (.18).31 (.29) 1.49 (.9) 2.49 (.98).4 (.16).79 (.31) 2.8 (.819) 21.46 (.84) 6. (.242) BSC 4. (.177) Max. 19.81 (.78) 2.32 (.8) 1.1 (.4) 1.4 (.).49 (.61) 16.26 (.64).38 (.212) 6.2 (.244) 3. (.138) 3.81 (.) 2.87 (.113) 3.12 (.123) 1.6 (.6) 2.13 (.84) Gate Source 2.21 (.87) 2.9 (.12).4 (.2) BSC 2-Plcs. Dimensions in Millimeters and (Inches) APT s products are covered by one or more of U.S.patents 4,89,81,4,93,89,434,182,234,19,22 (Heat Sink) 4.98 (.196).8 (.2) 1.47 (.8) 1.7 (.62).46 (.18) {3 Plcs}.6 (.22).2 (.1).178 (.7) 2.67 (.) 2.84 (.112) 1.22 (.48) 1.32 (.2).9 (.628) 16.(.632) Revised 4/18/9 1.27 (.) 1.4 (.) 1.98 (.78) 2.8 (.82).4 (.2) BSC {2 Plcs.} 1.4 (.41) 1.(.4) 13.79 (.43) 13.99(.1) Source Gate Dimensions in Millimeters (Inches),262,336 6,3,786,26,83 4,748,13,283,22,231,474,434,9,28,8 and foreign patents. US and Foreign patents pending. All Rights Reserved. 13.41 (.28) 13.1(.32) Revised 8/29/97 3.81 (.) 4.6 (.16) (Base of Lead) 11.1 (.43) 11.61 (.47) Heat Sink () and Leads are Plated -78 Rev B 6-24