EXTREMELY HIGH FREQUENCY

Similar documents
AND DIFFERENTIATOR DIGITALLY PROGRAMMABLE INTEGRATOR

NEW QUARTZ CRYSTAL OSCILLATORS

PARTIALLY ACTIVE-R GROUNDED-CAPACITOR

PROGRAMMABLE CURRENT-CONVEYOR-BASED OSCILLATOR EMPLOYING GROUNDED

AND LOWPASS FILTERS CURRENT-MODE GROUNDED-CAPACITOR SINGLE-ELEMENT-CONTROLLED BANDPASS

CURRENT-MODE FILTERS WITH SINGLE INPUT AND THREE OUTPUTS

NEW CFOA-BASED GROUNDED-CAPACITOR SINGLE-ELEMENT-CONTROLLED

ANALOG LOW-VOLTAGE CURRENT-MODE IMPLEMENTATION OF DIGITAL LOGIC GATES

NONLINEAR DISTORTION OF THE FIBER OPTIC MICROPHONE

CURRENT-CONTROLLED SAWTOOTH GENERATOR

DESIGN OF AN INDEGENISED NEGATIVE RESISTANCE CHARACTERISTICS CURVE TRACER

DIGITALLY PROGRAMMABLE PARTIALLY ACTIVE-R SINUSOIDAL OSCILLATORS

VOLTAGE-MODE UNIVERSAL BIQUADRATIC FILTER USING TWO OTAs

Research Article A New Translinear-Based Dual-Output Square-Rooting Circuit

THE ELECTRICAL CHARACTERISTICS OF LONG

Research Article A New Capacitor-Less Buck DC-DC Converter for LED Applications

Analytic 1-V Model for Single-Electron Transistors

220 S. MAHESHWARI AND I. A. KHAN 2 DEVICE PROPOSED The already reported CDBA is characterized by the following port relationship [7]. V p V n 0, I z I

354 Facta Universitatis ser.: Elec. and Energ. vol. 13, No.3, December 2000 in the audio frequency band. There are many reasons for moving towards a c

Research Article Quadrature Oscillators Using Operational Amplifiers

Design and Simulation of a Modified 32-bit ROM-based Direct Digital Frequency Synthesizer on FPGA

Interpolation Error in Waveform Table Lookup

Design of NCO by Using CORDIC Algorithm in ASIC-FPGA Technology

l nneling of Charge CHRISTOPH WASSHUBER and HANS KOSINA 2. THE SIMULATED STRUCTURE

Section 1. Fundamentals of DDS Technology

Low distortion signal generator based on direct digital synthesis for ADC characterization

Research Article Wideband Microstrip 90 Hybrid Coupler Using High Pass Network

A FREQUENCY SYNTHESIZER STRUCTURE BASED ON COINCIDENCE MIXER

REALIZATION OF FPGA BASED Q-FORMAT ARITHMETIC LOGIC UNIT FOR POWER ELECTRONIC CONVERTER APPLICATIONS

LOW FREQUENCY NOISE IN TANTALUM CAPACITORS

Tirupur, Tamilnadu, India 1 2

Research Article High Efficiency and Broadband Microstrip Leaky-Wave Antenna

Research Article A Parallel-Strip Balun for Wideband Frequency Doubler

S.Nagaraj 1, R.Mallikarjuna Reddy 2

Research Article Small-Size Meandered Loop Antenna for WLAN Dongle Devices

Improving histogram test by assuring uniform phase distribution with setting based on a fast sine fit algorithm. Vilmos Pálfi, István Kollár

AREA EFFICIENT DISTRIBUTED ARITHMETIC DISCRETE COSINE TRANSFORM USING MODIFIED WALLACE TREE MULTIPLIER

Design Of Multirate Linear Phase Decimation Filters For Oversampling Adcs

Computer Arithmetic (2)

CHAPTER. delta-sigma modulators 1.0

Research Article Miniaturized Circularly Polarized Microstrip RFID Antenna Using Fractal Metamaterial

Single Chip FPGA Based Realization of Arbitrary Waveform Generator using Rademacher and Walsh Functions

ME scope Application Note 01 The FFT, Leakage, and Windowing

Continuously Variable Bandwidth Sharp FIR Filters with Low Complexity

NOVEL TWO-DIMENSIONAL (2-D) DEFECTED GROUND ARRAY FOR PLANAR CIRCUITS

TOWARDS A MORE THOROUGH PASTE SPECIFICATION

Research Article Harmonic-Rejection Compact Bandpass Filter Using Defected Ground Structure for GPS Application

IMPLEMENTATION OF QALU BASED SPWM CONTROLLER THROUGH FPGA. This Chapter presents an implementation of area efficient SPWM

Research Article Compact Dual-Band Dipole Antenna with Asymmetric Arms for WLAN Applications

(i) Understanding of the characteristics of linear-phase finite impulse response (FIR) filters

Research Article A Wide-Bandwidth Monopolar Patch Antenna with Dual-Ring Couplers

Research Article Diophantine Frequency Synthesizer Design for Timekeeping Systems

FPGA Implementation of Digital Modulation Techniques BPSK and QPSK using HDL Verilog

Research Article Optimization of Gain, Impedance, and Bandwidth of Yagi-Uda Array Using Particle Swarm Optimization

An Optimized Direct Digital Frequency. Synthesizer (DDFS)

Research Article CPW-Fed Slot Antenna for Wideband Applications

Research Article Analysis and Design of Leaky-Wave Antenna with Low SLL Based on Half-Mode SIW Structure

Design of an optimized multiplier based on approximation logic

ANALYSIS OF EFFECTS OF VECTOR CONTROL ON TOTAL CURRENT HARMONIC DISTORTION OF ADJUSTABLE SPEED AC DRIVE

Research Article Current Mode Full-Wave Rectifier Based on a Single MZC-CDTA

HARMONICS MEASUREMENT METHOD USING A DSP BASED ASIC

Research Article A Miniaturized Triple Band Monopole Antenna for WLAN and WiMAX Applications

(i) Understanding of the characteristics of linear-phase finite impulse response (FIR) filters

DEVELOPMENT AND PRODUCTION OF HYBRID CIRCUITS FOR MICROWAVE RADIO LINKS

Research Article Simulation and Performance Evaluations of the New GPS L5 and L1 Signals

EEE 309 Communication Theory

Research Article Fast Comparison of High-Precision Time Scales Using GNSS Receivers

An Optimized Implementation of CSLA and CLLA for 32-bit Unsigned Multiplier Using Verilog

Research Article Compact and Wideband Parallel-Strip 180 Hybrid Coupler with Arbitrary Power Division Ratios

HYBRIDS IN TELECOMMUNICATIONS

NOWADAYS, many Digital Signal Processing (DSP) applications,

Design Implementation Description for the Digital Frequency Oscillator

Application Article Design of RFID Reader Antenna for Exclusively Reading Single One in Tag Assembling Production

DESIGN AND ANALYTICAL STUDY OF STRAYS-INSENSITIVE SWITCHED-CAPACITOR

International Journal of Scientific & Engineering Research Volume 3, Issue 12, December ISSN

Research Article A Novel Subnanosecond Monocycle Pulse Generator for UWB Radar Applications

Research Article Multiband Planar Monopole Antenna for LTE MIMO Systems

Current Rebuilding Concept Applied to Boost CCM for PF Correction

Automated Generation of Built-In Self-Test and Measurement Circuitry for Mixed-Signal Circuits and Systems

Nonuniform multi level crossing for signal reconstruction

Finite Word Length Effects on Two Integer Discrete Wavelet Transform Algorithms. Armein Z. R. Langi

High-resolution ADC operation up to 19.6 GHz clock frequency

Chapter 3 Data Transmission COSC 3213 Summer 2003

Research Article Very Compact and Broadband Active Antenna for VHF Band Applications

Receiver Architecture

A new method of spur reduction in phase truncation for DDS

CHAPTER 5 POWER QUALITY IMPROVEMENT BY USING POWER ACTIVE FILTERS

The quality of the transmission signal The characteristics of the transmission medium. Some type of transmission medium is required for transmission:

for amateur radio applications and beyond...

A DSP IMPLEMENTED DIGITAL FM MULTIPLEXING SYSTEM

On the design and efficient implementation of the Farrow structure. Citation Ieee Signal Processing Letters, 2003, v. 10 n. 7, p.

On-Chip Implementation of Cascaded Integrated Comb filters (CIC) for DSP applications

What is Sound? Simple Harmonic Motion -- a Pendulum

Design of Digital FIR Filter using Modified MAC Unit

Research Article Cross-Slot Antenna with U-Shaped Tuning Stub for Ultra-Wideband Applications

1. Explain how Doppler direction is identified with FMCW radar. Fig Block diagram of FM-CW radar. f b (up) = f r - f d. f b (down) = f r + f d

Research Article An Investigation of Structural Damage Location Based on Ultrasonic Excitation-Fiber Bragg Grating Detection

f o Fig ECE 6440 Frequency Synthesizers P.E. Allen Frequency Magnitude Spectral impurity Frequency Fig010-03

Research Article Theoretical and Experimental Results of Substrate Effects on Microstrip Power Divider Designs

An Efficient and Flexible Structure for Decimation and Sample Rate Adaptation in Software Radio Receivers

Transcription:

Active and Passive Elec. Comp., 2000, Vol. 23, pp. 101-113 (C) 2000 OPA (Overseas Publishers Association) N.V. Reprints available directly from the publisher Published by license under Photocopying permitted by license only the Gordon and Breach Science Publishers imprint. Printed in Singapore. EXTREMELY HIGH FREQUENCY RESOLUTION AND LOW HARMONIC DISTORTION DIGITAL LOOK-UP-TABLE SINUSOIDAL OSCILLATORS M. M. AL-IBRAHIM (JARRAH)* Electrical Engineering Department, King Fahd University of Petroleum and Minerals, Dhahran 31261, P.O. Box 822, Saudi Arabia (Received 21 June 2000; In finalform 12 July 2000) New techniques to efficiently increase the frequency resolution of digital sinusoidal oscillators based on look-up-table (LUT) methods are proposed. The increase in frequency resolution is achieved while maintaining very low level of spurious harmonic distortion. The proposed techniques increase the LUT length to a level at which the spurious harmonic distortion is negligible. The first proposed technique is based on partitioning the address register into three sets and dividing the available LUT length into three smaller tables addressed according to the content of the address register sets. The second proposed technique utilizes one LUT and interpolates the values of the samples that are not stored in the table. The third proposed technique is similar to the first technique with the advantage of simpler implementation and lower levels of spurious harmonic distortion. The proposed techniques are simulated and their performance is compared with that of the direct LUT and trigonometric interpolation methods. The simulation results show that the proposed techniques are superior to both direct LUT and trigonometric interpolation methods. Keywords: Harmonic distortion; Frequency resolution; Digital oscillators; Look-uptable; Fractional addressing; Interpolation methods *Present address: Jordan University of Science and Technology, Irbid-Jordan. e-mail: mjarrah@kfupm.edu.sa 101

102 M.M. AL,IBRAHIM (JARRAH) 1. INTRODUCTION Digital sinusoidal oscillators are essential elements in many applications. They are used in communications, music synthesis, control, radar, and digital signal processing. These digital oscillators exhibit the advantages of digital techniques, namely, stability, flexibility, and low cost. Moreover, the parameters of a digitally generated sinusoid are easy to control. The conventional digital sinusoidal oscillator utilizes one look-up-table in which the samples of a complete cycle of a sine wave are stored and read at appropriate time intervals [1,2]. The major disadvantage of a digital sinusoidal oscillator implemented using LUT method [1] is the spurious harmonic distortion due to fractional addressing of the memory [2, 3]. The fractional addressing is necessary to increase the effective LUT length and consequently the frequency resolution of the digital sinusoidal oscillator. The spurious harmonic distortion can be reduced by the trigonometric interpolation method [4]. Recently, two methods to reduce the spurious harmonic distortion were reported in [5]. It should be emphasized that the objective of these approaches is to reduce the complexity of the digital circuits involved measured in terms of LUT length. In this paper, we propose three new techniques to increase the frequency resolution and at the same time reduce the spurious harmonic distortion associated with fractional addressing of the LUT. The proposed techniques have the advantage of increased frequency resolution and reduced spurious harmonic distortion over both the conventional LUT digital sinusoidal oscillator and that based on the trigonometric interpolation method. The first proposed technique, P1, is based on partitioning the address register bits into three sets, namely the most significant NI bits, the next NF1 bits, and finally the least significant NF2 bits. The contents of the NI bits and NF1 bits are used to address LUTs as described in [4] while the content of the least significant NF2 bits are employed to interpolate sample values that are not stored in the LUTs. The resulting effective LUT length is 2 Nt+Nm+Ny while the actually needed LUT length is 2u + 2 Nm+l The second proposed technique, P2, employs one LUT of length 2 u while the fractional bits of the address register are used to adjust the sample values in a manner which is modified version of that employed in [5].

SINUSOIDAL OSCILLATORS 103 The third proposed technique, P3, is similar to the first technique with NI= 2 bits. The result is a reduced implementation complexity and spurious harmonic distortion. In Section 2, we present some background and review the trigonometric and other relevant interpolation methods. In Section 3, the proposed techniques are presented and analyzed. Simulation resuits are presented and discussed in Section 4. Finally, the paper is concluded in Section 5. 2. BACKGROUND AND REVIEW OF INTERPOLATION METHODS The conventional method for generating a digital sinusoidal signal is the well known LUT method [1]. In this method, an integer L of sine wave samples are stored in a memory and then read at an appropriate time interval. The L samples are taken uniformly over a full period of the sine wave. Therefore, the phase increment is A0 27r/L. Let T be the sampling interval by which we step through the table and be the number of phase increments per step. Then, the frequency of the generated sinusoid is given by: where the maximum value of is necessary for the reconstruction of the signal and is specified by the Nyquist rate. Note that stepping through the table is simple and can be implemented by an accumulator that is incremented by every sampling interval T. When is restricted to integer values, the generated si nusoidal signals are of extremely low harmonic distortion. In fact, the distortion is determined by the type of number representation and number of bits, b, used to represent the value of a sample in the memory. For two s complement number representation with rounding, the level of harmonic distortion is approximately 2-2b/6 which can be brought to any desired level by increasing b. The frequency resolution associated with an integer increment is clearly lilt which is fixed once L and T are fixed. To increase the frequency resolution, the address register is incremented by a real number d with NI and NF bits for the integer and

104 M.M. AL-IBRAHIM (JARRAH) fractional parts of d, respectively. The frequency of the generated sinusoid is, thus, given by d f L-- (2) d 2 -NF 2 -uv+ L The frequency resolution is obviously given by Af= LT (3) and the effective table length is Le-- 2NL. Because the address lines of the LUT are connected to the integer part (L 2N ) of the address register only, the generated sinusoids have spurious harmonic distortion. It should be noted that the spurious harmonic distortion is a consequence of truncating the content of the address register and utilizing only the integer part to address the LUT, therefore, a different sample is actually being addressed when the fractional part of the address is different from zero. Let the content of the address register at a specific instant of time be nd--i+f where I and F are the integer and fractional parts of nd, respectively. The direct LUT method simply considers I and neglects F in addressing the LUT. The actually read sample is sin[aoi] instead of sin[ao(i+f)] which introduces a temporal quantization error that depends on A0,/, and F as given by e(ao, I,F) sin [AOI] sin [AO(I + F)] (4) The error sequence e(ao, LF) was analyzed in [3] and shown that it reduces the signal-to-noise ratio to a value in the range [201og(L)-5.17,201og(L)-4.92]dB. It can be shown that the error sequence e(a0, L F) is an additive noise that causes a harmonic distortion approximately equal to AOZ/12 in agreement with the result in [3]. To compare between the two distortion sources let the samples in the LUT be represented by 15 bits and let L 2048. It follows that the word length constraint (15 bits) causes a level of harmonic distortion approximately equal to -98 db while the temporal quantization error, e(a0,/, F), results in a distortion of -55 db. To avoid the distortion due to temporal quantization error, e(ao, I,F), L must be greater than 217= 131072 which is obviously a formidable

SINUSOIDAL OSCILLATORS 105 memory size. Consequently, interpolation methods are used to reduce the amount of spurious harmonic distortion while maintaining high frequency resolution or equivalently large effective LUT length. The trigonometric interpolation method can be summarized as follows: sin [AO(I + F)] sin [AOI] cos [AOF] + cos [AOI] sin [AOF] (5) The implementation of Eq. (5) requires two LUTs in addition to the original LUT. In particular, we must have two more LUTs for storing the sample values of sin[aof] and cos[aof]. It was shown in [4] that the level of harmonic distortion associated with trigonometric interpolation method is essentially the same as that of the direct LUT method with a table length 2N L. In other words, trigonometric interpolation method increases the effective table length without practically increasing the level of harmonic distortion. The interpolation method in [5] -is given by sin [AO(I + F)] sin [AOI] 2! + cos [AOI]{AOF} (6) This method has a performance comparable with that of the trigonometric interpolation method and requires less LUT length. In particular, the interpolation method in (6), denoted by M1 requires only 1/3 the LUT length required for trigonometric interpolation method and has essentially the same level of performance. However, the trigonometric interpolation method has low levels of harmonic distortion within an effective LUT length, Le 2rL, which is limited by the length of the used tables and can be increased only by increasing the length of these tables. On the other hand, M1 exhibits low levels of harmonic distortion within the same effective LUT length and its performance is limited by the size of L and NF, therefore, Le 2NL can be increased by increasing NF without the need for more memory size. 3. THE PROPOSED TECHNIQUES In this section, we present three new techniques to extremely increase the frequency resolution while maintaining a reduced harmonic distortion and hardware complexity. The first proposed technique, P1,

106 M.M. AL-IBRAHIM (JARRAH) is based on considering the fractional bits of the address register as two groups of NF1 and NF2 bits, respectively. The content of the NF2 bits is the least significant while the content of the integer Nx bits is the most significant. Let the content of the address register at a specific instant of time be nd= I+F1 + F2 where L F1 and F2 are the integer and fractional parts of nd, respectively. Hence, the value of sin(aond) is given by sin [AO(I + F1 + F2)] sin [AO(I + F1)] cos [AOF2] + cos [AO(I + F1)] sin [AOF2] (7) Recall that NF2 are the least significant bits, therefore, we can write sin [AOF2] AO. F2 (8) cos [AOF] -- 1 (9) The approximations in (8) and (9) are accurate enough for 15 bits word length when NI 5 bits and NF1 5 bits. In this case, the maximum difference between sin[aof2] and AO.F2 is 3.85 10-8 while the maximum difference between cos[aof2] and is 1.883 x 10-5 which are both less than 2-15. Substituting for sin[aof2] and cos[aof2] from (8) and (9) in (7), we obtain sin[ao(l+f +F2)] sin[ao(l+f1)] + cos[ao(i+f)]. [AOFg] (10) The implementation of (10) requires the generation of sin[a0(i+ F1)] and cos[ao(i+fa)] as described in [4] and is illustrated by the block diagram of Figure 1. One more multiplier and an adder are needed to generate sin[ao(i+f1 +F2)] from sin[ao(i+f1)] and cos[ao(i+f)]. Equation (10) specifies P1 which does not require any extra table length over that required by the trigonometric interpolation method. It should be noted that the implementation of Eqs. (5) and (10) require the same LUT length and that each equation require three LUTs. The first LUT is for the storage of sin[aoi] and cos[aoi] and is of length 2N. The second and third LUTs are of length 2 NF each and are used for the storage of sin[aof] and cos[aof], respectively. The frequency resolution of the proposed technique is given by Af 2 u,- T (11)

SINUSOIDAL OSCILLATORS 107 Generator of sin[ao(l + FI) and cos[a0(l + F1)] I N lbits + N F1 bitsn Address Re gister (N I + NF1 + NF2 bits) sin[a0(i + F )] (qln[a0(i + FI+ F 2 )] eos[a0(l + F1)] F2 AO Increment Re gister Re gister of AO value FIGURE Block diagram of the first proposed technique/ 1. It should be noted that P1 implemented with NI-NF1 5 bits and NF2 16 bits has an effective LUT of 226 with low levels of spurious harmonic distortion. The trigonometric interpolation method when implemented with NI= NF1 5 bits has an effective LUT of 21 with low levels of spurious harmonic distortion. When the effective LUT is increased by further increase of the fractional address length without increasing the actual LUTs lengths, the result is an increase of spurious harmonic distortion to a level comparable with that of the direct LUT method. The second proposed technique, P2, is based on modifying M1 as given by sin [AO(I + F)] sin [AOI] 2! + cos [AOI] AOF 3! (12) The block diagram representation of P2 is shown in Figure 2. For NI=6 bits, the maximum difference between sin[aof] and {AOF-((AOF)3/3!)} is 7.598 x 10-8 while the maximum difference between cos[aof] and {1-((AOF)2/2!)} is 3.869 10-6 which are both less than 2-15. Consequently, the approximations in Eq. (12) are exact

108 M.M. AL-IBRAHIM (JARRAH) Table of sin(a01) and cos(aol) values NF bitsl Accurnulator NI integer.. bitsfractinal bi l N I bits l Register of AO values stnca00 1/6 (A 0F) 2 cosa0[aar-(aff)3/6] Output FIGURE 2 Block diagram of the second proposed method P2. for 15 bit arithmetic operations. It is evident from Eq. (12) that the implementation of P2 requires only one LUT of length L. The associated effective LUT length and frequency resolution are Le 2NL, and 1/LET. The third proposed technique, P3, is based on modifying the method P1 to simplify its hardware implementation. To this end, let NI- 2 bits to obtain A0= 27r/4, hence, sin[aoi]=0, 4-1 and cos[aoi] =0, 4- for all values of I. Consequently, the LUT containing the values of sin[aoi] and cos[aoi] can be eliminated. Furthermore, multiplication by sin[aoi] and cos[aoi] is a simple switching operation which can be implemented by simple logic circuit. Let the content of the address register at a specific instant of time be nd= I+F1 +F2 where/, F1 and F2 are as defined earlier. It follows that sin(aond) is given by (13) The values of sin((tr/2)f1) and cos((tr/2)f1) are stored in two LUTs of length 2 Nr each while the values of sin((tr/2)f2) and cos((tr/2)f2)

SINUSOIDAL OSCILLATORS 109 corresponding to the least significant NF2 bits are approximated as given by sin F2 =- F2 (14) cos gf2 _l-g g.f:z (15) 5 +cos " F2 (16) The approximations in (14) and (15) are accurate enough for 15 bits word length when N 2 bits and NF1 5 bits. In this case, the maximum difference between sin((r/2)f2) and (r/2). F2 is 1.971 10-5 while the maximum difference between cos(qr/2)f2) and 1-(1/2)((r/2). F2) 2 is 2.419 10-7 which are both less than 2-15 Substituting for sin((r/2)f2) and cos((r/2)f2) from (14) and (15) in (13), we obtain sin [ 7r(l+F1 +F2) sin ] 57r(i+F1)l{ l(tr ) F2 ITr fl)l (I -t- 71" Generator ofsin[-(l+f1)] eos[- (I + F1)] andcs[- 2r? ( +F1)] NI+NFI NF2 [ 12r: / T - / s[ (I + N )] FIGURE 3 Block diagram of the third proposed technique P3.

110 M.M. AL-IBRAHIM (JARRAH) The block diagram representation of P3 is shown in Figure 3. It should be noted that P3 requires less number of multipliers and LUTs than that required by P1. 4. SIMULATION RESULTS The direct LUT method as well as the trigonometric interpolation method and the proposed techniques are all simulated using MATLAB program. The simulation results are obtained assuming a sixteen-bit word length for all arithmetic operations. The trigonometric interpolation method and the proposed technique P1 require three LUTs each containing 32 sample values while the direct LUT method is simulated using a look-up-table containing 128 sample values. The performance criterion used to compare the performance of various interpolation methods is the total harmonic distortion, THD, defined by [4] THD ET ET Er N-1 k=o E(f) IX(k) (17) where ET is energy of the desired fundamental frequency fg, N and is the number of samples in a full period. The address increment d specifies N and fg =fctk/n, where the clock frequency, fctk, is assumed to be 50 MHz. the total energy of the sinusoidal waveform, E(fg) is the The address increment of the direct LUT (L 128) method is 4d in order to generate the same frequency of the oscillator using either the trigonometric interpolation method or the proposed technique with address increment d. Table I summarizes the simulation results obtained for the level of spurious harmonic distortion associated with direct LUT method, trigonometric interpolation method, and the proposed technique P1 dented by THDz), THDT and THDel, respectively. The table contains the value of the address increment d as varied over a wide range and the values of the generated frequency fg. It is evident from Table I that the level of spurious harmonic distortion is the same for the three methods for integer values of address increment d. For fractional

SINUSOIDAL OSCILLATORS 111 TABLE Parameters of the oscillator based on the proposed technique P1 and those using direct LUT and trigonometric interpolation methods d fg Hz THDo THDr THD,I 1562500 1.770 x 10- lo 1.770 x 10- lo 1.770 x 10- lo 1/2 781250 1.147 10- lo 4.322 10-1o 4.322 x 10- lo 1/4 390625 1.293 x 10- lo 4.837 x 10- lo 4.837 x 10- lo 1/8 195312.5 1.506 10-4 5.302 x 10-lo 5.302 x 10-lO 1/16 97656.25 1.882 10-4 5.877 10-lO 5.877 10-lo 1/32 48828.125 1.976 10-4 6.036 x 10-1o 6.036 10-lO 1/64 24414.06 2.000 10-4 2.354 10-6 7.329 10-lO 1/128 12207.03 2.006 10 --4 2.942 10-6 7.991 10-10 1/256 6103.515 2.007 10-4 3.089 10-6 8.105 10-1 1/512 3051.76 2.008 x 10-4 3.126 10-6 8.438 x 10-lo 1/1024 1525.88 2.008 10-4 3.135 10-6 8.494 10-lO 1/2048 762.94 2.008 10-4 3.137 10-6 8.549 x 10-lO 1/4096 381.45 2.008 10-4 3.138 10-6 8.603 x 10-lo 1/8192 190.73 2.008 10-4 3.138 10-6 8.601 10--lO values of address increment d in the range 2-5<d< 1, the performance of trigonometric interpolation method and P1 is the same and is far better than that of the direct LUT method. However, for fractional values of address increment d in the range 2-25 d < 2-5, the performance of trigonometric interpolation method although superior to that of the direct LUT method but is actually far less than that of P1. It should be noted that the performance of trigonometric interpolation method in the range 2-20< d< 2-5 is approximately equal to that of the direct LUT method using L- 1024. It is evident from the simulation results that for 2-2< d < 2-5, the level of THDel associated with P1 is slightly and levels to a limiting higher than its value in the range 2-5 < d < value which is approximately equal to 8.6 10-10. Table II is intended to compare the performance of the interpolation method M1 with that of its modified version denoted by P2. It is evident from the simulation results that the performance of P1 is superior to that of M1 for all values of LUT length considered. The performance of P2 for L 32 is comparable with that of P1 while using only 1/3 of the required memory size. When P2 is simulated assuming L 64 and compared with P1 which utilizes three tables of length 32 each (i.e., 2/3 of the memory size memory size is required to implement P1), the performance of P2 is found to be superior to that of P1. Table III compares the performance of the interpolation method P2 with that of P3 for some typical values of L. It is evident from the

112 M.M. AL-IBRAHIM (JARRAH) TABLE II Simulation results of the oscillator based on P2 and that based on the interpolation method M1 for L 32 and L 64 d THDnI L 32 THD,2 L 32 THDM1 L 64 THD,:z L 64 1.770 x 10- lo 1.770 x 10-1o 1.147 10- lo 1.147 x lo 1/2 6.531 10-9 4.322 x 10-1 6.206 x 10 -l 2.470 x -l 1/4 4.722 10-8 5.607 10-1 1.253 10-9 3.904-10 1/8 8.276 x 10-8 5.607 10-1 2.033 10-9 5.260-10 1/16 1.049 10-7 7.472 10-1 2.369 10-9 5.352 x 1/32 1.175 10 10- -7 7.542 10-10 2.109 10-9 5.895-10 10 1/64 1.217 10 8.682 10 2.383 10 6.064 1/128 1.252 10-7 8.721 10-1 2.503 10-9 6.099 1/256 1.269 10 10- -7 8.931 10-1 2.526 10-9 6.101 10-1 1/512 1.276 10-7 9.303 10-1 2.541 10-9 6.040 10-1 1/1024 1.281 10-7 9.124 10-1 2.553 10-9 6.055 x 10-1 TABLE III Simulation results of the oscillator based on P3 and that based on P1 for some values of L d THDe3 L 16 THD,3 L 32 THDe2 L 32 THDe2 L 64 1/8 1.770 10-lO 1.770 10-10 1.770 10-lO 1.147 x 10 -l 1/16 1.147 10 -l 1.147 x 10-1 4.322 x 10-1 2.470 10-10 1/32 6.206 10- lo 1.293 x 10- lo 5.607 x 10- lo 3.904 x 10- lo 1/64 1.253 10-9 2.769 10-10 5.607 10-10 5.260 10-1 1/128 2.033 10-9 3.883 10-1 7.472 10-lO 5.352 x 10-lO 1/256 2.369 10-9 4.873 10-1 7.542 10-10 5.895 10-10 1/512 2.109 10-9 5.510 10-1o 8.682 10-lO 6.064 10-lO 1/1024 2.383 10-9 5.813 x 10 -l 8.721 10-lO 6.099 x 10-lO 1/2048 2.503 10-9 5.789 10-1 8.931 10 -l 6.101 10-10 lo 1/4096 2.526 10-5.944 x 10 9.303 x O- lo lo 6.040 10 1/8192 2.541 10-9 5.991 x 10 -l 9.124 10-10 6.055 10-10 simulation results that the performance of P3 is superior to that of P2 for all values of LUT length considered. The advantages of the proposed techniques over the direct LUT and trigonometric interpolation methods are clear. In particular, the proposed techniques outperform all other interpolation methods with essentially the same level of hardware complexity. Moreover, their performance is essentially the same over an extremely wide frequency range with extremely high frequency resolution. In fact the frequency ranges of P1, P2 and P3 are limited by the number of bits used to implement the fractional part of the address register rather than being limited by the look-up-table length. Therefore, by increasing the width of the fractional part of the address register, we can practically achieve any desired level of frequency resolution at the specified level of spurious harmonic distortion.

SINUSOIDAL OSCILLATORS 113 5. CONCLUSION Three new techniques are proposed to significantly increase the frequency resolution and reduce the amount of spurious harmonic distortion in digital sinusoidal oscillators using Look-up- Table method. The proposed methods are simulated by a MATLAB program on a general purpose computer. The simulation results show that the harmonic distortion of the proposed methods is significantly less than that of both direct LUT and trigonometric interpolation methods for all cases in which the content of the least significant NF2 bits is different from zero. Moreover, the performance of the first proposed method, P1, is identical to that of the trigonometric interpolation method for all cases in which the content of the least significant NF2 bits is zero. The performance of the third proposed method, P3, is superior to that of P1, P2, and the trigonometric interpolation method. The proposed techniques are suitable for implementation on already available digital signal processors like TMS32010 DSP. In addition, digital sinusoidal oscillators based on the proposed methods can be fabricated on a single chip using monolithic large-scale integration. Acknowledgment The author would like to acknowledge the support provided by King Fahd University of Petroleum and Minerals. References [1] Garcia, D. (1986). "Precision digital sine wave generation with the TMS32010", In: Digital Signal Processing Applications with the TMS320 Family. Dallas, TX: Texas Instruments, pp. 269-289. [2] Jeng, Y. C., "Digital spectra of nonuniformly sampled signals: Fundamentals and high-speed waveform digitizers", IEEE Transactions on Instrumentation and Measurement, IM-37, 245-251, June, 1988. [3] Jeng, Y. C., "Digital spectra of nonuniformly sampled signals: Digital look-up tunable sinusoidal oscillator", 1EEE Transactions on Instrumentation and Measurement, IM-37, 358-362, Sept., 1988. [4] Schanerberger, M. and Awad, S. S., "The implementation of digital sine wave oscillator using the TMS320C25: Distortion reduction and applications", 1EEE Transactions on Instrumentation and Measurement, IM-39, 870-873, Dec., 1990. [5] Al-Ibrahim, M. M. and Bataineh, S., "High resolution and low distortion digital look-up-table sinusoidal oscillators", International Journal of Electronics, 87(1), January, 2000.

International Journal of Rotating Machinery Engineering Journal of The Scientific World Journal International Journal of Distributed Sensor Networks Journal of Sensors Journal of Control Science and Engineering Advances in Civil Engineering Submit your manuscripts at Journal of Journal of Electrical and Computer Engineering Robotics VLSI Design Advances in OptoElectronics International Journal of Navigation and Observation Chemical Engineering Active and Passive Electronic Components Antennas and Propagation Aerospace Engineering Volume 2010 International Journal of International Journal of International Journal of Modelling & Simulation in Engineering Shock and Vibration Advances in Acoustics and Vibration