Technical Data. Digital Sub-band Tuner WJ-9488 WATKINS-JOHNSON. Features

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May 1996 Technical Data WATKNS-JOHNSON Digital Sub-band Tuner WJ-9488 The WJ-9488 Digital Sub-band Tuner uses advanced Digital Signal Processing (DSP), Application-Specific ntegrated Circuits (ASC), and Surface-Mount Technology (SMT) to provide precision tuning, filtering, decimation, and gain control of applied signals. n addition to power-oftwo decimations applied commensurate with the bandwidth (BW) selection, the WJ-9488 performs fractional resampling, which allows the adjustment of the output rate in a virtually continuous fashion. To support direct connection to Datolite and SDN data streams, the unit also provides a precision time-tag processing capability. Depending on its configuration, the WJ-9488 accepts wordparallel digital data at any rate within the 0.1953125 to 54.4 megasamples per second (MSPS) range. WJ specifically designed the unit to accept all SDN and Datolite data rates within this range. t supports input word sizes up to 12 bits and accommodates either a 2's Complement or an Offset Binary data format. An operator may specify precision input tuning in one of two ways: As a fraction of the input sample rate to a resolution of 2-32 provides accurate, controlled tuning, even if the input sample rate is not precisely known. Directly in units of frequency to a resolution of 1 Hz requires specification of a nominal input sample rate. Features Precision tuning, filtering, gain control & resampling 12-bit digital input Selectable 8, 10, or 12-bit digital output Acceptance of any input sample rate between 0.1953125 & 54.4 MSPS, depending on configuration Datolite & SDN compatibility Capability to serve as Datolite/SDN bridge Tuning resolution of 1 Hz or 2-32 of input sample rate 21 selectable BWs (standard) Linear-phase FR filters Decimation factors up to 64 Manual & automatic gain control Fractional synchronous resampling Precision time-tag processing Ethernet AU/10BASE-T & RS-232 remote control Built-in test HEGHT 1.75 in (4.45 cm) WDTH 19 in (48.26 cm) *Excludingconnectorsandhandles DEPTH* 20 in (50.80 cm) WEGHT 15 lbs, max (6.75 kg) WATKNS-JOHNSON COMPANY 700 uince Orchard Road, Gaithersburg, Maryland 20878-1794 Phone: (800) WJHELPS or +(301) 948-7550 FAX: +(301) 921-9479 Email: wj.helps@wj.com Website: www.wj.com Printed in the U.S.A. All nternational sales of WJ equipment are subject to USA export license approval. This material provides up-to-date general information on product performance and use. t is not contractual in nature, nor does it provide warranty of any kind. Specification subject to change without notice.

The WJ-9488 monitors the input sample rate and resolves it down to the nearest khz. The active remote control interface provides the measured sample rate information to an external controlling device. The WJ-9488 provides a selection of 21 standard F bandwidths (FBWs) approximating a 25 percent incremental progression over the range of 0.004 to 0.4 times the input sample rate. t also accommodates additional or custom bandwidths. The unit performs power-of-two decimations commensurate with the selected FBW. All F filtering operations use finiteimpulse response (FR) linear-phase filters for excellent stability, amplitude, and group delay characteristics. The WJ-9488 offers selectable manual or Automatic Gain (AGC) of the post-filtered F signal, providing over 50 db of gain control range. n addition, an AGC Hold command allows the user to switch from AGC to manual gain mode, while maintaining the fixed-gain level established by the AGC control loop. From this point, an operator may adjust the manual gain level as required. Operator selection of either upright or inverted spectral sense is also available. The WJ-9488 can perform synchronous fractional resampling on the post-filtering F signal. This permits modification of the output sample rate in a virtually continuous fashion. To use this capability the operator commands the unit to apply a fixed-fractional decimation adjustment to the nominal output sampling rate. The WJ-9488 regenerates a periodic output clock at the new resampled rate, which facilitates interfacing the digital output data to external peripheral equipment. The WJ-9488 provides calculated output sample rate information, based on the measured input sample rate, integer power-of-two decimation implemented in the FBW selection, and the selected resampling decimation factor. The active remote control interface provides this output sample rate information to an external controlling device. To support direct connection to Datolite and SDN data streams, the WJ-9488 provides a compatible time-tag processing function. This function buffers incoming bit-serial time-tags, accounts for processing delays and resampling offsets, and outputs an adjusted time-tag in precise temporal alignment with the output prediction data. The WJ-9488 also supports bridging between Datolite and SDN equipment, including compensation for the subtle differences in time-tag formats between the two systems. The WJ-9488's 32-bit microprocessor circuitry provides fast, efficient control of the internal functions, and powerful high-speed remote control interfacing. Through industry standard TCP/P protocol, Ethernet AU and 10BASE-T ports provide the primary remote- control interface to an external workstation or controller. Alternately, a separate RS-232 port is available for auxiliary remote control. All remote interfaces provide full command functionality and system status information. Built-in test within the unit allows a thorough functional evaluation and fault isolation. For all of its capability, the WJ-9488 is extremely compact. t is housed in a single 1.75-inch high rackmount enclosure that weighs less than 15 pounds (6.75 kg). Functional Description The WJ-9488 Digital Sub-band Tuner accepts digital data in the form of a 12-bit parallel data field, a 1-bit synchronous serial time-tag, and an input sample clock. The unit processes parallel data as either a 2's complement or offset-binary numerical format selected by the user. All digital inputs are compatible with 100K differential ECL logic. Depending on its configuration, the WJ-9488 can accommodate any input sample rate in the 0.1953125 to 54.4 MSPS range. t measures the input sample rate and conditions and distributes the clock throughout the unit by using a scheme that minimizes clock skew. nput data is applied to the input tuner circuitry, which performs the desired frequency translation to an inphase and quadrature (/) baseband. A Numerically- led Oscillator (NCO) uses a 32-bit phase accumulator and an 8192-point sine/cosine look-up table to produce the 12-bit quadrature Local Oscillator (LO) that feeds the nput Tuner's complex multiplier. The LO is characterized by less than -75 dbc spurious levels and ±0.025 degree worst-case phase jitter. A selectable NCO dithering feature allows a further reduction of the LO spurious levels at the expense of a slight increase in phase noise. The WJ-9488 applies the downconverted / baseband to a three-stage FR filter bank. Each stage can perform a 31, 63, or 127 tap filter on each of the / branches, depending on the decimation scheme employed. Each stage uses 14-bit coefficients, 32-bit internal data precision, and can decimate by a factor 1, 2, or 4. Collectively, the three stages can perform power-oftwo integer decimations from 1 to 64. Furthermore, 2

Tuner Connectors /O Function Type nputs Signal Data Multipin - Amp part 531137-1 male AC Power EC Male Outputs Signal Data Multipin - Amp part 531137-1 male Bidirectional Ethernet AU Multipin - 15-pin D Remote female Ethernet 10BASE-T Remote RS-232 Remote RS-232 Local Multipin - RJ-45 female Multipin - 9-pin D female Multipin - 9-pin D female Tuner Options* Physical Nomenclature Functions Characteristics WJ-9488/ECL* Provides differential Occupies Output Data ECL Output Data 100K ECL Formatter daughter-card Formatter compatible outputs position Consists of ECL Output Buffer PC Assembly WJ-9488/TTL* Provides differential Occupies Output Data TTL Output Data RS-422 compatible Formatter daughter-card Formatter outputs position Consists of TTL Output Buffer PC Assembly WJ-9488/DAT** Provides backwards Consists of an External Datolite nterface compatibility to Cable Assembly Cable existing Datolite systems from a data /O perspective * The basic WJ-9488, as ordered from the factory, contains no Output Data Formatter daughter card. To order the desired daughter card, specify either the WJ-9488/ECL or WJ-9488/TTL option. ** The WJ-9488/DAT option provides only one external interface cable. f both the data inputs and data outputs require interfacing to existing Datolite systems, then this option must be specified twice at the time of ordering. The WJ-9488/DAT option cable is compatible with both inputs and outputs, since the pinouts are identical to both interface connectors. AC POWER AC POWER SUPPLY CONTROL PROCESSOR ETHERNET NTERFACE ETHERNET AU PORT RS-232 PORT BT SOURCE DC VOLTAGES SGNAL PATH CONTROLLER DATA CLOCK TME-TAG NPUT FORMAT NPUT TUNER MULT-STAGE / FR FLTER RE- SAMPLER COMPLEX TO REAL OUTPUT FORMAT DATA CLOCK TME-TAG DATA PATH BYPASS CLOCK N CLOCK CONDTONNG & DSTRBUTON CLOCKS TME-TAG BT-STREAM N TME-TAG PROCESSOR TME-TAG BT-STREAM OUT WJ-9488 Digital Sub-band Tuner Functional Block Diagram WPG029 3

each stage is configured with snapshot data memories and gain adjust circuitry. This facilitates automatic or manual gain control by the Signal Path ler. Gain increments in 1-dB steps are provided. The Resampler circuitry accepts the post-filtered / baseband and performs a fractional synchronous resampling function. This can correct very small data rate errors or adjust the output rate for compatibility with special-purpose downstream processing units. The operator can specify the resampling factor within the range of 0.5 to <2 at a resolution of 2-31. The final predetected digital output format is userselectable as either real-valued or multiplexed /. For the real-valued /, the unit supplies the output as a bandpass F signal centered at one-fourth the output sample rate. n the multiplexed / case, a 1-bit qualifier allows proper demultiplexing of the output. The time-tag processing circuitry performs the following functions: Monitors the input serial time-tag bit stream Detects the valid data format nserts a bulk delay commensurate with the absolute signal path delay Estimates the temporal offset due to decimation and resampling Modifies the Fine Time field(s) Shifts out the modified time-tag bit stream properly aligned with the appropriate output data sample Under operator control, the WJ-9488 can process either the current 61-bit SDN time-tag format that excludes the Extremely Fine-Time (EFT) field, or the 63-bit Datolite format that includes the EFT field. The processed time-tag includes additional Very Fine-Time (VFT) bits, in order to ensure proper processing and protect against overflow. The output formatter conditions the output data, the time-tag, and the clock lines and makes them available as 100K differential ECL outputs. A factory installed option accommodates compatibility with alternate digital interface formats. The output data format is user-configurable as either 2's complement or offset binary, and is symmetrically rounded to 8-, 10-, or 12-bits wide. A 32-bit control processor provides overall control of the unit and interfaces with an external system controller via an ethernet AU or a 10BASE-T interface. An RS-232 port provides an auxiliary remote control interface. 4

Specifications Digital nput Characteristics Sample Rate... 0.1953125 to 54.4 MSPS, depending on unit configuration (Supports all Datolite & SDN Rates in this range) Data Format... 12-bit parallel (Selectable as either 2's Complement or Offset Binary format) Auxiliary Data... Synchronous Time-Tag bit-serial format Sample Clock (n)... 50% ±10% Duty Cycle required Logic Family... Differential 100K ECL Digital Output Characteristics Data Type... Real-valued F or Multiplexed / Sampe Rate... 0.390625 to 54.4 MSPS (Real-valued F) 0.1953125 to 27.2 MSPS (Multiplexed /) Data Format... 12-bit parallel (Selectable as either 2's Complement or Offset Binary format) Wordwidth Selection... 8-, 10-, 12-bit with rounding Auxiliary Data... Synchronous Time-Tag bit-serial format Sample Clock (Out)... 50%, ±10% Duty Cycle Logic Family... Differential 100K ECL (WJ-9488/ECL) Differential TTL (WJ-9488/TTL) Digital Tuner Characteristics Tuner Modes... Direct Frequency or Sample Rate Normalized Tuning Resolution... 1 Hz or 2-32 of input sample rate FBWs... 21 Selectable (approx. 25% increments) nteger Decimation Range (Powers of 2)... 1 to 64 (not including Resampler) F Shape Factor... 1.8:1, max (3 to 70 db) Passband Ripple... 0.5 db, max mage Rejection... 70 dbfs, min Gain... Manual, Automatic, or AGC Hold 50 db range, min Output Spectrum... Normal or nverted Resampler Characteristics Type... Fixed-factor (Synchronous) Fractional Decimation Range... Adjustable from 0.5 to <2 x the nominal power-of-2 integer decimated output rate (Notes 1&2) Resolution... 2-31 of nominal power-of-2 integer decimated output rate Time-tag Processor Characteristics (Note 3) Format (Note 4) nput... Selectable between SDN & Datolite formats Output... Selectable between SDN & Datolite formats Fine-time Resolution... 5 nsec without EFT bits (SDN & Datolite) 625 psec with EFT bits (Datolite only) Time-tag Accuracy... ±1% of input sample period or ±1.6 x the Fine-time Resolution, whichever is larger Remote... Ethernet AU/10BASE-T or RS-232 Physical/Environment Temperature Range Operating... 0 to +50 C Storage... -40 to 70 C Humidity... 0 to 95%, non-condensing Altitude... 0 to 10,000 feet (3048 meters) Power Requirement... 85 to 264 Vac, 47 to 440 Hz Power Consumption... 75 W, max. with WJ-9488/TTL option 100 W, max. with WJ-9488/ECL option Notes: 1. Resampling to below the nominal output sample rate may result in aliasing distortion as predicted by the Nyquist criterion. 2. Output sample rate range can not be violated. 3. Time-Tag feature is functional only for output sampling rates >200 khz. 4. For Datolite time-tag format, input is per Datolite SDP CD D-480016-C dated 15 March 1993. For SDN time-tag format, input is per SDN Subsystem Design Spec SS11-055 Rev. D dated 15 Nov 1993. The output time-tag is per document E4-0617 dated 12 Nov 1994. 5