Model LIA100. Lock-in Amplifier

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Transcription:

Model LIA100 Lock-in Amplifier Operations Manual Thorlabs, Inc 435 Route 206 Newton, NJ 07860 P-(973) 579-7227 F-(973) 300-3600 www.thorlabs.com Doc. Page 1 of 10

Table of Contents Chapter Description Page 1. Introduction 3 2. Specifications 4 3. Operating Instructions 5 3.1 Front Panel Controls 5 3.1.1 Signal Input 5 3.1.2 Reference Input 5 3.1.3 Sensitivity Rotary Switch 5 3.1.4 Monitor Output 5 3.1.5 Output Time Constant Rotary Switch 6 3.1.6 Signal Output 6 3.1.7 10X Expand 6 3.2 Rear Panel Controls 6 3.2.1 Output Offset Adjust 6 3.2.2 ON / OFF Switch 6 3.2.3 DC Input Jack 6 3.3 Internal Jumpers and Configuration 7 3.3.1 JP1 - Input Impedance 8 3.3.2 JP2 - Normal / Calibration Mode 8 3.3.3 JP3 - Compensation Enable 8 3.3.4 JP4 - Reference Signal Interface 8 3.3.5 SW2 - Reference Polarity Switch 8 3.3.6 USER1, USER2 - Extending the Output Time Constant 8 4. Calibration 9 4.1 RP1 - Input Amplifier Null Adjust 9 4.2 RP2 - Differential Offset Adjust 9 4.3 RP3 - Common Mode Offset Adjust 9 5. Rack Mounting Option 10 Page 2 of 10

Chapter 1.0 Introduction The Thorlabs Model LIA100 Lock-In Amplifier is designed to deliver high performance in a compact, cost-effective package. By eliminating some of the less-used features of conventional lock-in amplifiers, the LIA100 offers the performance of units many times its price. The LIA100 consists of a programmable AC input amplifier, a monolithic phase-sensitive detector (PSD), and a two-stage programmable output low-pass filter. The input amplifier is a two-stage design with an adjustable gain to boost the modulated input. The PSD performs a frequency translation to shift the modulated signal back to its original base band DC. The output filter is a two-stage low pass filter to remove any residual harmonics from the output of the PSD. The output filter has adjustable settings of 10ms, 100ms, 1s, and 3s. In addition, a user-defined time constant can be set by simply adding two capacitors to the LIA100 printed circuit board. The LIA100 includes a six-position sensitivity control to provide over 60dB of gain adjustment to accommodate a wide range of input signal levels. A monitor output allows the user to monitor the buffered AC amplifier output. A five-position Output Time Constant switch allows the output filter to be set from 10ms to 3s to match the noise and bandwidth of the LIA100 to your signal dynamics (on-board provisions allow a user-specified capacitor to be used for customizing the output filter). A 10X output expand allows the output to be amplified by a factor of 10 (20dB) for optimizing the output signal level for specific data acquisition systems. Note: The principal advantage of lock-in amplifiers is that all non-synchronous noise (i.e. noise components which are out of phase with the modulated signal) are suppressed by the PSD. This results in a signal-to-noise improvement of many orders of magnitude. MON OUT 1K AC IN 0,20,30,40,50,60 db Phase Sensitive Detector 6dB Gain 0.1X 14dB Gain 10ms,100ms,1s,3s, & USER 10X Expand DC OUTPU REF IN 180 deg Figure 1.0 LIA100 Block Diagram Page 3 of 10

Chapter 2.0 Specifications Input: Input Impedance: Sensitivity (AC Amp Gain): Full-scale Input: Frequency: Single-ended input 1MΩ in parallel with 30pF 0, 20, 30, 40, 50, 60dB 1V, 100mV, 30mV, 10mV, 3mV, 1mV 1Hz to 20kHz Maximum Input Voltage: ±10V Noise: Monitor Output: Reference Input: 25nV / Hz @ 1kHz Buffered AC amplifier output ±3mV minimum, ±12V maximum, 50% duty cycle Reference Phase: 0 or 180 Reference Input Impedance: Output Filter Time Constant: Output: Output Impedance: Output Expand: Output Offset Adjust: Input Power: > 100KΩ 10ms, 100ms, 1s, 3s, user-defined. ±10V full-scale. 1kΩ 10X 12-turn potentiometer, rear of enclosure. ±12VDC external power supply (included) Dimensions: 2.5H x 5.5W x 6.5L Weight: 1.5 lbs. Page 4 of 10

Chapter 3.0 Operating Instructions The LIA100 is very easy to operate. Typically, a DC signal, which is modulated through an application dependent means, is applied to the input BNC. A reference signal of the same frequency and phase as the modulated signal is applied to the REF input BNC. An internal phase-sensitive detector (PSD) converts the modulated signal back to the original baseband DC signal. The output filter removes any harmonic components present in the output of the PSD. 3.1 Front Panel Controls 3.1.1 Signal Input - The modulated signal to be measured is applied here. The input is AC coupled through a 0.22µF capacitor to an impedance of 1MΩ in parallel with a 30pF capacitor to ground. An internal jumper, JP1, allows the input to float above from the circuit ground via a 1kΩ resistance. 3.1.2 Reference Input - A reference signal of the same frequency and phase as the modulated signal is required for the LIA100 to operate. This is an AC-coupled high impedance input with a low-frequency cut-off of 1Hz. SW2 located on the PCB allows inverted reference signals to be used by providing a 180 phase shift. 3.1.3 Sensitivity Switch - This is a six-position rotary switch to set the gain of the input AC amplifier. Table 1 below shows the gain settings along with maximum input levels and amplifier bandwidth. Note: although the input AC amplifier has a bandwidth of up to the 3MHz, the phase sensitive detector has an upper limit of 350kHz. The output filter has a maximum bandwidth of 5kHz (fifth position) in the standard configuration. If higher bandwidths are desired, please contact Thorlabs. Setting Voltage Gain (10X Off) Max Input Signal (Vpp) AC Amplifier Bandwidth 0dB 1.0 1V 3MHz 20dB 10.0 100mV 300kHz 30dB 31.6 30mV 250kHz 40dB 100.0 10mV 150kHz 50dB 316.0 3mV 40kHz 60dB 1,000.0 1mV 20kHz Table 1.0 Sensitivity Switch Settings 3.1.4 Monitor Output - The monitor output is a buffered output of the AC amplifier. The gain of this output is 1/10th the gain setting (i.e. -20dB less than the front panel sensitivity setting). This output can be used to monitor the input signal as well as to determine if the input amplifier is overloaded by noting if the signal is clipping (max signal ±1V). Page 5 of 10

3.1.5 Output Time Constant Switch - The output stage has a programmable lowpass filter to remove any residual harmonics from the output of the PSD. The time constants of the first four positions are marked on the front panel. The fifth position is unmarked and can be used for a user-defined time constant (see section 3.3.6). Table 2 below details the equivalent bandwidths for this control: Output Time Constant 10ms 100ms 1s 3s User Defined Equivalent Bandwidth 16Hz 1.6Hz 0.16Hz 0.05Hz Table 2. Output Time Constant Bandwidths 3.1.6 Signal Output - This is an analog output of the de-modulated DC signal. This output has a 1kΩ impedance. 3.1.7 10X Expand - This toggle switch expands (multiplies) the output signal by a factor of 10. This additional 20dB of gain is added to the gain of the input AC amplifier. 3.2 Rear Panel Controls 3.2.1 Output Offset Adjust - This control is a 12-turn potentiometer which adjusts the DC offset of the output signal. This is useful for nulling the output of the LIA100. 3.2.2 ON / OFF Switch - Toggle switch for the LIA100 power. 3.2.3 DC Input Jack - 5-pin DIN connector with the following pin-outs: Page 6 of 10

1 3 4 5 2 REAR PANEL DC INPUT Pin 1 2 3 4 5 Signal not used not used COM +12VDC -12VDC 3.3 Internal Jumpers and Configuration - There are jumpers provided on the LIA100 printed circuit board used for configuring and calibrating the unit. Figure 2 shows the locations of the PCB components. Accessing the LIA100 PCB: Remove the two Phillips head screw on the rear panel. Lower the rear panel and slide the cover off the back. Figure 2.0 Layout LIA100 PCB Page 7 of 10

3.3.1 JP1 - Single-Ended / Floating Input - This 2-pin jumper is provide to allow the user the option to have a single-ended (i.e. the shield of the input BNC is connected to the amplifier circuit ground) or floating where the shield is connected to the ground via a 1kΩ resistance. The floating input is useful If you are experiencing ground loop errors. - Attach the provided jumper across the two pins of JP1 to select the singleended option (factory default). - Remove the jumper for a floating input. 3.3.2 JP2 - Normal / Calibration Mode - This 3-pin jumper is used to select between normal operating modes and calibration modes. When in the calibrating mode, the input to the PSD is grounded so that the differential and common input offset can be trimmed out (see Section 4.1). Keep the jumper on pins 1 and 2 for normal operation. 3.3.3 JP3 - Compensation Enable - This 2-pin jumper can be used to enable an onchip frequency compensation for the PSD. This jumper is normally left open. 3.3.4 JP4 - Reference Signal Interface - This is a 5-pin header which can be used to interface to a phase control circuit. When using the LIA100 as a stand-alone unit, leave the jumper on pins 1 and 2 of JP4. 3.3.5 SW2 - Reference Polarity Switch - This toggle switch is provided for selecting between a 0 and a 180 phase-shifted reference. When the toggle switch lever is pointing towards the 0 label, the LIA100 is set to expect an non-inverted reference (i.e. reference is high during the signal positive period and low during the signal negative period.). 3.3.6 USER1, USER2 - Extending the Output Time Constant - There are two unstuffed component locations on the LIA100 PCB which can be used to extend the time-constant of the output filter. Labeled as USER1 and USER2, these locations will accommodate up to three sizes of capacitors. Calculating the value of USER1 and USER2- The effective time constant can be calculated as follows: τ = 1MΩ * USER(1,2) Since the output filter is a 2-stage low pass filter, we recommend using the same value capacitors in USER1 and USER2 to ensure a uniform frequency roll-off. Page 8 of 10

Chapter 4. Calibration The LIA100 come calibrated from the factory. However, if it should become necessary to recalibrate the unit, please follow the steps below: 4.1 RP1 - Input Amplifier Null Adjust - This adjustment allows any offset voltage on the AC amplifier output to be nulled. Remove the enclosure cover (see Section 3.3) Remove any signal from the INPUT BNC. Attach a voltmeter to TP2. Adjust RP1 until the voltage on TP2 is zero. 4.2 RP2 - Differential Offset Adjust - The input offset of the PSD can be nulled using RP2 and RP3. RP2 is used to null the differential offset on the PSD as follows: Remove the enclosure cover. Move the jumper on JP2 to pins 2 and 3 (this grounds the PSD input) Attach an oscilloscope probe to TP4 (PSD output). Apply a 100mV 50% duty cycle reference signal to REF in. Adjust RP2 to minimize any AC component observed on TP4. 4.3 RP3 - Common Mode Offset Adjust - This adjustment is used for nulling any common mode offset on the PSD input as follows: Remove the enclosure cover. Move the jumper on JP2 to pins 2 and 3 (this grounds the PSD input) Attach an oscilloscope probe to TP4 (PSD output). Apply a 100mV 50% duty cycle reference signal to REF in. Adjust RP2 to minimize any DC component observed on TP4. Page 9 of 10

Section 5. Rack Mounting Option Thorlabs offers a rack-mounting bracket for conveniently mounting up to 3 LIA100 units in a standard 19 rack. This rack-mounting bracket can also be used for other Thorlabs products (i.e. MDT691 High Voltage Piezo Driver). Please call Thorlabs for more information about this option. Page 10 of 10