PD - 95093A IRLR803VPbF N-Channel Application-Specific MOSFETs Ideal for CPU Core DC-DC Converters Low Conduction Losses Low Switching Losses Minimizes Parallel MOSFETs for high current applications 00% R G Tested Lead-Free Description This new device employs advanced HEXFET Power MOSFET technology to achieve an unprecedented balance of on-resistance and gate charge. The reduced conduction and switching losses make it ideal for high efficiency DC- DC converters that power the latest generation of microprocessors. The IRLR803V has been optimized for all parameters that are critical in synchronous buck converters including R DS(on), gate charge and Cdv/dt-induced turn-on immunity. The IRLR803V offers an extremely low combination of Q sw & R DS(on) for reduced losses in both control and synchronous FET applications. The package is designed for vapor phase, infra-red, convection, or wave soldering techniques. Power dissipation of greater than 2W is possible in a typical PCB mount application. D G D-Pak S DEVICE CHARACTERISTICS IRLR803V 7.9 mω R DS(on) Q G Q SW Q OSS 27 nc 2 nc 29nC Absolute Maximum Ratings Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain or Source Current TC = 25 C (V GS > 0V) TC= 90 C Pulsed Drain Current c TC = 25 C Power Dissipation e TC = 90 C Junction & Storage Temperature Range Continuous Source Current (Body Diode) Pulsed Source Current c Symbol IRLR803V Units V DS V GS I D I DM P D 5 W 60 T J, T STG -55 to 50 C I S I SM 30 V ±20 9 63 A 363 9 A 363 Thermal Resistance Parameter Symbol Typ. Max. Units Maximum Junction-to-Ambient eh R θja 50 Maximum Junction-to-Case h R θjc.09 www.irf.com C/W 2/0604
Electrical Characteristics Parameter Symbol Min Typ Max Units Conditions Drain-to-Source Breakdown Voltage BV DSS 30 V V GS = 0V, I D = 250µA Static Drain-Source R DS(on) 6.9 9.0 V GS = 0V, I D = 5A d mω On-Resistance 7.9 0.5 V GS = 4.5V, I D = 5A d Gate Threshold Voltage V GS(th).0 3.0 V V DS = V GS, I D = 250µA Drain-to-Source Leakage Current I DSS 50 µa V DS = 30V, V GS = 0V 20 V DS = 24V, V GS = 0 µa 00 V DS = 24V, V GS = 0, T J = 00 C Gate-Source Leakage Current I GSS ±00 na V GS = ± 20V Total Gate Charge, Control FET Q G 27 V GS = 5V, I D = 5A, V DS = 6V Total Gate Charge, Synch FET Q G 23 V GS = 5V, V DS < 00mV Pre-Vth Gate-Source Charge Q GS 4.7 Post-Vth Gate-Source Charge Q GS2 2.0 nc Gate to Drain Charge Q GD 9.7 V DS = 6V, I D = 5A Switch Charge (Q gs2 + Q gd ) Q SW 2 Output Charge Q OSS 29 V DS = 6V, V GS = 0 Gate Resistance R G 0.8 3. Ω Turn-On Delay Time t d(on) 0 V DD = 6V Rise Time t r 9 I D = 5A ns Turn-Off Delay Time t d(off) 24 V GS = 5.0V Fall Time t f 8 Clamped Inductive Load Input Capacitance C iss 2672 Output Capacitance C oss 064 pf V GS = 6V, V GS =0 Reverse Transfer Capacitance C rss 09 Source-Drain Rating & Characteristics Parameter Symbol Min Typ Max Units Diode Forward Voltage V SD 0.9.3 V Reverse Recovery Charge f Q rr 03 nc Reverse Recovery Charge Q rr(s) 96 nc (with Parallel Schottky) f Conditions IS = 5Ad, V GS = 0V di/dt ~ 700A/µs V DS = 6V, V GS = 0V, I F = 5A di/dt = 700A/µs, (with 0BQ040) V DS = 6V, V GS = 0V, I F = 5A 2 Notes: Repetitive rating; pulse width limited by max. junction temperature. Pulse width 400 µs; duty cycle 2%. ƒ When mounted on inch square copper board, t < 0 sec. Typ = measured - Q oss Typical values of R DS (on) measured at V GS = 4.5V, Q G, Q SW and Q OSS measured at V GS = 5.0V, I F = 5A. www.irf.com
I D, Drain-to-Source Current (A) 000 00 0 VGS TOP 5V 0V 7.0V 5.5V 4.5V 4.0V 3.5V BOTTOM2.7V 2.7V I D, Drain-to-Source Current (A) 000 00 0 VGS TOP 5V 0V 7.0V 5.5V 4.5V 4.0V 3.5V BOTTOM2.7V 2.7V 20µs PULSE WIDTH T J = 25 C 0. 0 00 V DS, Drain-to-Source Voltage (V) 20µs PULSE WIDTH T J = 50 C 0. 0 00 V DS, Drain-to-Source Voltage (V) Fig. Typical Output Characteristics Fig 2. Typical Output Characteristics I D, Drain-to-Source Current (A) 000 00 T J = 25 C T J = 50 C V DS= 5V 20µs PULSE WIDTH 0 2.0 3.0 4.0 5.0 6.0 7.0 V GS, Gate-to-Source Voltage (V) R DS(on), Drain-to-Source On Resistance (Normalized) 2.0 I D = 5A.5.0 0.5 V GS = 0V 0.0-60 -40-20 0 20 40 60 80 00 20 40 60 T J, Junction Temperature ( C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature www.irf.com 3
C, Capacitance (pf) 5000 4000 3000 2000 000 VGS = 0V, f = MHz Ciss = Cgs + Cgd, C ds Crss = Cgd Coss = Cds + Cgd C iss C oss SHORTED V GS, Gate-to-Source Voltage (V) 6 5 4 3 2 I D = 5A V DS= 24V V DS= 5V C rss 0 0 00 V DS, Drain-to-Source Voltage (V) 0 0 5 0 5 20 25 30 Q G, Total Gate Charge (nc) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage I SD, Reverse Drain Current (A) 000 00 0 T J= 50 C T J= 25 C V GS = 0 V 0. 0.0 0.4 0.8.2.6 2.0 2.4 V SD,Source-to-Drain Voltage (V) 0000 I D, Drain Current (A) 000 00 0 OPERATION IN THIS AREA LIMITED BY R DS(on) 0us 00us ms 0ms TC = 25 C TJ = 50 C Single Pulse 0 00 V DS, Drain-to-Source Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage 4 Fig 8. Maximum Safe Operating Area www.irf.com
I D, Drain Current (A) 00 80 60 40 20 LIMITED BY PACKAGE R D V DS V GS D.U.T. R G 0V Pulse Width µs Duty Factor 0. % Fig 0a. Switching Time Test Circuit V DS 90% + V - DD 0 25 50 75 00 25 50 T C, Case Temperature ( C) 0% V GS t d(on) t r t d(off) t f Fig 9. Maximum Drain Current Vs. Case Temperature Fig 0b. Switching Time Waveforms 0 Thermal Response(Z thjc ) 0. D = 0.50 0.20 0.0 0.05 0.02 0.0 SINGLE PULSE (THERMAL RESPONSE) Notes:. Duty factor D = t / t 2 0.0 2. Peak T J=P DMx Z thjc + TC 0.0000 0.000 0.00 0.0 0. t, Rectangular Pulse Duration (sec) PDM t t2 Fig. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5
R DS ( on ), Drain-to-Source On Resistance ( Ω ) R DS(on), Drain-to -Source On Resistance ( Ω) IRLR803VPbF 0.06 0.04 0.04 0.02 0.02 0.00 VGS = 4.5V 0.00 I D = 5A 0.008 VGS = 0V 0.008 0.006 0 50 00 50 200 250 300 350 I D, Drain Current ( A ) 0.006 0.0 2.0 4.0 6.0 8.0 V GS, Gate -to -Source Voltage (V) Fig 2. On-Resistance Vs. Drain Current Fig 3. On-Resistance Vs. Gate Voltage Current Regulator Same Type as D.U.T. 50KΩ V GS Q G 2V.2µF.3µF D.U.T. + V - DS V G Q GS Q GD V GS 3mA Charge I G I D Current Sampling Resistors Fig 4a&b. Basic Gate Charge Test Circuit and Waveform 6 www.irf.com
D-Pak (TO-252AA) Package Outline Dimensions are shown in millimeters (inches) D-Pak (TO-252AA) Part Marking Information EXAMPLE: THIS IS AN IRFR20 WITH ASSEMBLY LOT CODE 234 ASSEMBLED ON WW 6, 999 IN THE ASSEMBLY LINE "A" Note: "P" in assembly line position indicates "Lead-Free" INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE IRFU20 96A 2 34 PART NUMBER DATE CODE YEAR 9 = 999 WEEK 6 LINE A OR INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE IRFU20 2 34 PART NUMBER DATE CODE P = DESIGNATES LEAD-FREE PRODUCT (OPTIONAL) YEAR 9 = 999 WEEK 6 A = ASSEMBLY SITE CODE www.irf.com 7
D-Pak (TO-252AA) Tape & Reel Information Dimensions are shown in millimeters (inches) TR TRR TRL 6.3 (.64 ) 5.7 (.69 ) 6.3 (.64 ) 5.7 (.69 ) 2. (.476 ).9 (.469 ) FEED DIRECTION 8. (.38 ) 7.9 (.32 ) FEED DIRECTION NOTES :. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ). 3. OUTLINE CONFORMS TO EIA-48 & EIA-54. 3 INCH NOTES :. OUTLINE CONFORMS TO EIA-48. 6 mm Data and specifications subject to change without notice. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (30) 252-705 TAC Fax: (30) 252-7903 Visit us at www.irf.com for sales contact information.2/04 8 www.irf.com
Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/