SMPS MOSFET PD 93917A IRFP3703 Applications Synchronous Rectification Active ORing l l HEXFET Power MOSFET V DSS R DS(on) max I D 30V 0.0028Ω 2A Benefits l Ultra Low OnResistance l Low Gate Impedance to Reduce Switching Losses l Fully Avalanche Rated Absolute Maximum Ratings Parameter Max. Units I D @ T C = 25 C Continuous Drain Current, V GS @ V 2 I D @ T C = C Continuous Drain Current, V GS @ V A I DM Pulsed Drain Current P D @T C = 25 C Power Dissipation 230 W P D @T A = 25 C Power Dissipation 3.8 Linear Derating Factor 1.5 W/ C V GS GatetoSource Voltage ± 20 V dv/dt Peak Diode Recovery dv/dt ƒ 5.0 V/ns T J, T STG Junction and Storage Temperature Range 55 to 175 C Typical SMPS Topologies TO247AC Thermal Resistance Parameter Typ. Max. Units R θjc JunctiontoCase 0.65 R θcs CasetoSink, Flat, Greased Surface 0.24 C/W R θja JunctiontoAmbient 40 l l Forward and Bridge Converters with Synchronous Rectification for Telecom and Industrial Applications Offline High Power AC/DC Convertors using Synchronous Rectification Notes through are on page 8 www.irf.com 1 5/18/01
Static @ T J = 25 C (unless otherwise specified) Parameter Min. Typ. Max. Units Conditions V (BR)DSS DraintoSource Breakdown Voltage 30 V V GS = 0V, I D = 250µA V (BR)DSS / T J Breakdown Voltage Temp. Coefficient 0.028 V/ C Reference to 25 C, I D = 1mA 2.3 2.8 V GS = V, I D = 76A R DS(on) Static DraintoSource OnResistance mω 2.8 3.9 V GS = 7.0V, I D = 76A V GS(th) Gate Threshold Voltage 2.0 4.0 V V DS = V GS, I D = 250µA 20 V µa DS = 24V, V GS = 0V I DSS DraintoSource Leakage Current 250 V DS = 24V, V GS = 0V, T J = 150 C I GSS GatetoSource Forward Leakage 200 V GS = 20V na GatetoSource Reverse Leakage 200 V GS = 20V Dynamic @ T J = 25 C (unless otherwise specified) Parameter Min. Typ. Max. Units Conditions g fs Forward Transconductance 150 S V DS = 24V, I D = 76A Q g Total Gate Charge 209 I D = 76A Q gs GatetoSource Charge 62 nc V DS = 24V Q gd GatetoDrain ("Miller") Charge 42 V GS = V, t d(on) TurnOn Delay Time 18 V DD = 15V, V GS = V t r Rise Time 123 ns I D = 76A t d(off) TurnOff Delay Time 53 R G = 1.8Ω t f Fall Time 24 V GS = V C iss Input Capacitance 8250 V GS = 0V C oss Output Capacitance 3000 V DS = 25V C rss Reverse Transfer Capacitance 290 pf ƒ = 1.0MHz C oss Output Capacitance 360 V GS = 0V, V DS = 1.0V, ƒ = 1.0MHz C oss Output Capacitance 3060 V GS = 0V, V DS = 24V, ƒ = 1.0MHz C oss eff. Effective Output Capacitance 2590 V GS = 0V, V DS = 0V to 24V Avalanche Characteristics Parameter Typ. Max. Units E AS Single Pulse Avalanche Energy 1700 mj I AR Avalanche Current 76 A E AR Repetitive Avalanche Energy 23 mj Diode Characteristics Parameter Min. Typ. Max. Units Conditions I S Continuous Source Current MOSFET symbol 2 (Body Diode) showing the A G I SM Pulsed Source Current integral reverse (Body Diode) pn junction diode. V SD Diode Forward Voltage 0.8 1.3 V T J = 25 C, I S = 76A, V GS = 0V t rr Reverse Recovery Time 80 120 ns T J = 25 C, I F = 76A, V DS = 16V Q rr Reverse RecoveryCharge 185 275 nc di/dt = A/µs 2 www.irf.com D S
0 I D, DraintoSource Current (A) VGS TOP 15V V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 4.5V I D, DraintoSource Current (A) VGS TOP 15V V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 4.5V 20µs PULSE WIDTH T J = 25 C 1 0.1 1 V DS, DraintoSource Voltage (V) 20µs PULSE WIDTH T J = 175 C 0.1 1 V DS, DraintoSource Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 0 I D, DraintoSource Current (A) T = 25 J C T J = 175 C V DS= 15V 20µs PULSE WIDTH 4.0 5.0 6.0 7.0 8.0 9.0.0 V GS, GatetoSource Voltage (V) R DS(on), DraintoSource On Resistance (Normalized) 2.0 I D = 260A 1.5 1.0 0.5 V GS = V 0.0 60 40 20 0 20 40 60 80 120 140 160 T J, Junction Temperature( C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized OnResistance Vs. Temperature www.irf.com 3
C, Capacitance (pf) 14000 VGS = 0V, f = 1MHz Ciss = Cgs Cgd, C ds SHORTED 12000 Crss = Cgd Coss = Cds Cgd 0 C iss 8000 6000 C oss 4000 2000 C rss 0 1 V DS, DraintoSource Voltage (V) V GS, GatetoSource Voltage (V) 20 16 12 8 4 I = D 76A V DS = 24V FOR TEST CIRCUIT SEE FIGURE 13 0 0 40 80 120 160 200 240 280 320 Q G, Total Gate Charge (nc) Fig 5. Typical Capacitance Vs. DraintoSource Voltage Fig 6. Typical Gate Charge Vs. GatetoSource Voltage 0 OPERATION IN THIS AREA LIMITED BY R DS(on) I SD, Reverse Drain Current (A) 1 T J = 175 C T J = 25 C V GS = 0 V 0.1 0.0 0.4 0.8 1.2 1.6 2.0 2.4 V SD,SourcetoDrain Voltage (V) I D, Drain Current (A) us us 1ms TC = 25 C T = 175 C ms J Single Pulse 1 V DS, DraintoSource Voltage (V) Fig 7. Typical SourceDrain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 4 www.irf.com
250 LIMITED BY PACKAGE V DS R D 200 R G V GS D.U.T. I D, Drain Current (A) 150 V Pulse Width 1 µs Duty Factor 0.1 % Fig a. Switching Time Test Circuit V DD 50 V DS 90% 0 25 50 75 125 150 175 T C, Case Temperature ( C) Fig 9. Maximum Drain Current Vs. Case Temperature % V GS t d(on) t r t d(off) t f Fig b. Switching Time Waveforms 1 Thermal Response (Z thjc ) 0.1 0.01 D = 0.50 0.20 0. 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J= P DM x Z thjc TC 0.001 0.00001 0.0001 0.001 0.01 0.1 1 t 1, Rectangular Pulse Duration (sec) PDM t1 t2 Fig 11. Maximum Effective Transient Thermal Impedance, JunctiontoCase www.irf.com 5
R G V DS 20V tp Fig 12a. Unclamped Inductive Test Circuit tp L D.U.T I AS 0.01Ω 15V V (BR)DSS DRIVER V DD A E AS, Single Pulse Avalanche Energy (mj) 6000 5000 4000 3000 2000 TOP BOTTOM I D 31A 54A 76A 0 25 50 75 125 150 175 Starting T, Junction Temperature ( J C) Fig 12c. Maximum Avalanche Energy Vs. Drain Current I AS Fig 12b. Unclamped Inductive Waveforms Current Regulator Same Type as D.U.T. V Q GS Q G Q GD 12V.2µF 50KΩ.3µF D.U.T. V DS V GS V G 3mA Charge I G I D Current Sampling Resistors Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit 6 www.irf.com
Peak Diode Recovery dv/dt Test Circuit D.U.T ƒ Circuit Layout Considerations Low Stray Inductance Ground Plane Low Leakage Inductance Current Transformer R G dv/dt controlled by R G Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. Device Under Test V DD Driver Gate Drive Period P.W. D = P.W. Period V GS =V * D.U.T. I SD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. V DS Waveform Diode Recovery dv/dt V DD ReApplied Voltage Inductor Curent Body Diode Forward Drop Ripple 5% I SD * V GS = 5V for Logic Level Devices Fig 14. For NChannel HEXFET Power MOSFET www.irf.com 7
TO 247 Package Outline Dimensions are shown in millimeters (inches) 15.90 (.626) 15.30 (.602) B A 3.65 (.143) 3.55 (.140) 0.25 (.0) M 5.50 (.217) D B M D 5.30 (.209) 4.70 (.185) 2.50 (.089) 1.50 (.059) 4 20.30 (.800) 19.70 (.775) 14.80 (.583) 14.20 (.559) 1 2 3 2X C 4.30 (.170) 3.70 (.145) 5.50 (.217) 4.50 (.177) NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION : INCH. 3 CONFORMS TO JEDEC OUTLINE TO 247AC. 2.40 (.094) 2.00 (.079) 2X 5.45 (.215) 2X 1.40 (.056) 3X 1.00 (.039) 0.25 (.0) M C A S 3.40 (.133) 3.00 (.118) 3X 0.80 (.031) 0.40 (.016) 2.60 (.2) 2.20 (.087) LEAD ASSIGNMENTS 1 GATE 2 DRAIN 3 SOURCE 4 DRAIN Notes: Repetitive rating; pulse width limited by max. junction temperature. Starting T J = 25 C, L = 0.6mH R G = 25Ω, I AS = 76A. ƒ I SD 76A, di/dt A/µs, V DD V (BR)DSS, T J 175 C Pulse width 300µs; duty cycle 2%. C oss eff. is a fixed capacitance that gives the same charging time as C oss while V DS is rising from 0 to 80% V DSS Calculated continuous current based on maximum allowable junction temperature. Package limitation current is 90A Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (3) 25275 TAC Fax: (3) 2527903 Visit us at www.irf.com for sales contact information.5/01 8 www.irf.com
Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/