Supertex inc. TP2510. P-Channel Enhancement-Mode Vertical DMOS FET TP5AW. Features. General Description. Applications. Ordering Information

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TP251 P-Channel Enhancement-Mode Vertical DMOS FET Features Low threshold (-2.4V max.) High input impedance Low input capacitance (125pF max.) Fast switching speeds Low on-resistance Free from secondary breakdown Low input and output leakage Applications Logic level interfaces - ideal for TTL and CMOS Solid state relays Battery operated systems Photo voltaic drives Analog switches General purpose line drivers Telecom switches General Description This low threshold enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex s well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown. Supertex s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. Ordering Information Part Number Package Option Packing TP251N8-G 2/Reel -G denotes a lead (Pb)-free / RoHS compliant package. Contact factory for Wafer / Die availablity. Devices in Wafer / Die form are lead (Pb)-free / RoHS compliant. Absolute Maximum Ratings Parameter Value Drain-to-source voltage BS Drain-to-gate voltage BV DGS Gate-to-source voltage ±2V Operating and storage temperature -55 O C to +15 O C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. Typical Thermal Resistance Package Doc.# DSFP-TP251 C81413 θ ja 133 O C/W Product Summary BS /BV DGS Pin Configuration Product Marking TP5AW (max) DRAIN (th) (max) SOURCE DRAIN GATE W = Code for Week Sealed = Green Packaging (ON) (min) -1V 3.5Ω -2.4V -1.5A Package may or may not include the following marks: Si or

TP251 Thermal Characteristics Package (continuous) (pulsed) Power Dissipation @ = 25 O C R RM -48mA -2.5A 1.6W -48mA -2.5A (continuous) is limited by max rated T j. Mounted on FR5 board, 25mm x 25mm x 1.57mm. Electrical Characteristics ( unless otherwise specified ) Sym Parameter Min Typ Max Units Conditions BS Drain-to-source breakdown voltage -1 - - V = V, = -2.mA (th) Gate threshold voltage -1. - -2.4 V =, = -1.mA (th) Change in (th) with temperature - - 5. mv/ O C =, = -1.mA I GSS Gate body leakage - - -1 na = ± 2V, = V - -1 μa = V, = Max Rating SS Zero gate voltage drain current - V - -1. ma DS =.8 Max Rating, = V, = 125 C -.4 -.6 - = -5.V, On-state drain current A -1.5-2.5 - = -1V, (ON) Static drain-to-source on-state resistance - 5. 7. = -5.V, = -25mA Ω 2. 3.5 = -1V, = -75mA Change in with temperature - - 1.7 %/ O C = -1V, = -75mA G FS Forward transconductance 3 36 - mmho, = -75mA C ISS Input capacitance - 8 125 = V, pf, f = 1. MHz C OSS Common source output capacitance - 4 7 C RSS Reverse transfer capacitance - 1 25 t d(on) Turn-on delay time - - 1 t r Rise time - - 15 t d(off) Turn-off delay time - - 2 t f Fall time - - 15 ns V DD, = -1.A, R GEN = 25Ω V SD Diode forward voltage drop - - -1.8 V = V, I SD = -1.A t rr Reverse recovery time - 3 - ns = V, I SD = -1.A Notes: 1. All D.C. parameters 1% tested at 25 C unless otherwise stated. (Pulse test: 3µs pulse, 2% duty cycle.) 2. All A.C. parameters sample tested. Switching Waveforms and Test Circuit V 1% INPUT Pulse Generator -1V 9% R GEN t (ON) t (OFF) D.U.T. V OUTPUT VDD t d(on) 1% t r t d(off) 9% 9% t f 1% INPUT R L VDD OUTPUT Doc.# DSFP-TP251 C81413 2

Typical Performance Curves TP251 BS Variation with Temperature 1 On-Resistance vs. Drain Current 1.1 8 = -5V BS 1. (ohms) 6 4 = -1V 2.9-5 5 1 15 T j -.8-1.6-2.4-3.2-4. -5 Transfer Characteristics V (th) and R DS Variation with Temperature 1.4 2. -4 1.2 @ -1V, -.75A 1.6-3 -2 25 C = -55 C (th) 1..8 V (th) @ -1mA 1.2.8-1 15 C.6.4-2. -4. -6. -8. -1.4-5 5 1 15 T j Capacitance vs. Drain-to-Source Voltage 2 f = 1MHz -1 Gate Drive Dynamic Characteristics 142 pf 15-8. = -1V C (picofarads) 1 C ISS -6. -4. = -4V 5-2. 71 pf C OSS C RSS -1-2 -3-4 1. 2. Q G (nanocoulombs) Doc.# DSFP-TP251 C81413 3

TP251 Typical Performance Curves (cont.) -5. Output Characteristics -5. Saturation Characteristics -4. -4. -3. -2. = -1V -8V -3. -2. = -1V -8V -1. -6V -1. -6V -4V -3V -1-2 -3-4 -5-4V -3V -2. -4. -6. -8. -1 Transconductance vs. Drain Current.5 Power Dissipation vs. Ambient Temperature 2..4 = -55 C TO-243AA G FS (siemens).3.2 = 125 C P D (watts) 1..1 -.5-1. -1.5-2. -2.5 25 5 75 1 125 15-1 Maximum Rated Safe Operating Area 1. Thermal Response Characteristics -1. -.1 TO-243AA(pulsed) TO-243AA (DC) Thermal Resistance.8.6.4.2 TO-243AA P D = 1.6W -.1 -.1-1. -1-1.1.1.1 1. 1 t p (seconds) Doc.# DSFP-TP251 C81413 4

3-Lead Package Outline (N8) TP251 D D1 C E H E1 L 1 2 3 b e e1 b1 A Top View Side View Dimensions (mm) Symbol A b b1 C D D1 E E1 e e1 H L MIN 1.4.44.36.35 4.4 1.62 2.29 2. 3.94.73 1.5 3. NOM - - - - - - - - BSC BSC - - MAX 1.6.56.48.44 4.6 1.83 2.6 2.29 4.25 1.2 JEDEC Registration TO-243, Variation AA, Issue C, July 1986. This dimension differs from the JEDEC drawing Drawings not to scale. Supertex Doc. #: DSPD-3TO243AAN8, Version F1111. (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http:///packaging.html.) does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an adequate product liability indemnification insurance agreement. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the (website: http//) 213 All rights reserved. Unauthorized use or reproduction is prohibited. Doc.# DSFP-TP251 C81413 5 1235 Bordeaux Drive, Sunnyvale, CA 9489 Tel: 48-222-8888