EE105 Fall 2015 Microelectronic Devices and Circuits Multi-Stage Amplifiers. Prof. Ming C. Wu 511 Sutardja Dai Hall (SDH)

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EE105 Fall 2015 Microelectronic Devices and Circuits Multi-Stage Amplifiers Prof. Ming C. Wu wu@eecs.berkeley.edu 511 Sutardja Dai Hall (SDH)

Differential & Common Mode Signals

Why Differential? Differential circuits are much less sensitive to noises and interferences Differential configuration enables us to bias amplifiers and connect multiple stages without using coupling or bypass capacitors Differential amplifiers are widely used in IC s Excellent matching of transistors, which is critical for differential circuits Differential circuits require more transistors à not an issue for IC

Neural Recording An array of electrodes is implanted in the motor cortex and senses extracellular signals that include firing from nearby neurons The propagation of signals from neuron to neuron is called an Action Potential, which is analogous to a digital pulse

Extracellular Neuronal Signals Voltage Local Field Potential (LFP) 1Hz-300Hz;; 10µV-1mV Time Action Potential spikes 300Hz- 10kHz 10µV-1mV l l The goal of a neural recording device is to record the smallamplitude neural signals and pick out the meaningful signals from the noise. These signals are then decoded to create trajectories, movements, and speeds for controlling prostheses, computers, etc.

60Hz and Other Interferers 60 Hz Noise Action Potentials In reality, the tiny signals recorded from the brain can get corrupted by numerous interferers. Ambient 60Hz noise couples into electrical signals in and on the body Motion can cause voltage artifacts from the movement of the electrodes relative to the neurons

MOS Differential-Pair Basic Configuration Two matched MOS transistors Common current bias "Differential signls" applied to v G1 and v G2 (equal amplitude but opposite sign) "Differential outputs" are produced at v D1 and v D2 Note in differential configuration, V GS is fixed for both Q 1 and Q 2 I D1 = I D2 = I 2 I 2 = k n ( 2 V V GS tn) 2 V GS = V tn + I k n

Large Signal Behavior of Diff Mode Operation v id = v in+ v in = V Tn + I 1 k n V + I 2 Tn k n v id = I 1 k n I 2 k n = I + Δi 2 k n I 2 Δi 2 k n I k n I Δi Δi = i D1 i D2 solve Δi = k n v id v id I k n 2I 2 v id k n - I I k n

Common Mode Rejection Differential Pair Rejects Common-Mode Inputs The common voltages applied to both Q 1 and Q 2 are referred to as common mode, V CM. Common mode inputs usually come from noises or interferences. Differential pair should reject V CM : Since V GS1 = V GS2 = V tn + is fixed in differential pair, V CM simply changes the voltage at Source, V S. I k n The drain currents remain fixed: I 1 = I 2 = I 2 v D1 = V DD I 2 R D = v D2 Differential output v D1 v D2 = 0

Common Mode Input Range What is the maximum and minimum common-mode input voltage?

Small Signal Operation AC equivalent circuit v G1 = V CM + 1 2 v id; v G2 = V CM 1 2 v id Virtue Ground For differential AC small signal, the differential pair is anti-symmetric. The potential at the mid point (Source) is zero. This is called Virtual Ground This virtual ground is obtained without using a large bypass capacitor à much smaller area and better frequency response

Differential Half Circuit Because the two halves of the circuits are anti-symmetric, and Source is at virtual ground, we can simplifed and just analyze the "half circuit" Q 1 biased at I 2 A d = v od 2 v id 2 = v od = g m ( R D r o ) v id

AC Equivalent Circuit for Common Mode Input Non-ideal current source consists of an ideal current source shunted by a large resistance, R SS

Common Mode Half Circuit For common-mode inputs, the two half circuits are symmetric. The Source is not virtual ground any more. R SS can be considered as two parallel combination of 2R SS. Each CM half circuit has 2R SS connected to the source

Ideal CM Output Voltage The common-mode half-circuit is basically a common-source amplifier with source degeneration. The gain is v o1 = v o2 R = D v icm v icm 1/ g m + 2R SS Since 2R SS >>1/ g m, v o1 v icm = v o2 v icm R D 2R SS v od = v o2 v o1 = 0 Common-Source with degeneration Output voltage is zero for ideal differential pair with perfectly matched transistors and resistors, and the CM voltage is small enough that Q 1 and Q 2 remains in Saturation

Useful Metric for Diff Amps: CMRR Courtesy: M.H. Perrott

Differential Amplifier with Current-Source Loads Q 3 and Q 4 are PMOS current sources (active loads) From half-circuit A d = v od = g m1 ( r o1 r o3 ) v id

Cascode Differential Amplifier Cascode configurations for both amplifying transistors and current source loads. From half-circuit A d = v od = g m1 ( R on R op ) v id R on = ( g m3 r o3 )r o1 R op = ( g m5 r o5 )r o7 If all transistors are identical, R on = R op = g m r o 2 A d = 1 2 g 2 2 mr o

Differential Input, Single-End Output Differential-in, Differential-out Differential input, Single-ended Output

MOS Differential Pair with Current Mirror Load AC equivalent circuit for differential input Current mirror forces small-signal currents through Q 3 and Q 4 to be the same à output currents = 2x that of half circuit