Features Free from secondary breakdown Low power drive requirement Ease of paralleling Low C ISS and fast switching speeds Excellent thermal stability Integral source-drain diode High input impedance and high gain pplications Logic level interfaces - ideal for TTL and CMOS Solid state relays Battery operated systems Photo-voltaic drives nalog switches General purpose line drivers Telecom switches N-Channel Enhancement-Mode Vertical DMOS FET TN216 General Description This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertex s well-proven, silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown. Supertex s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. Ordering Information Part Number Package Option Packing TN216K1-G TO-236B (SOT-23) 3/Reel TN216N3-G 1/Bag TN216N3-G P2 TN216N3-G P3 TN216N3-G P5 TN216N3-G P13 TN216N3-G P14 2/Reel -G denotes a lead (Pb)-free / RoHS compliant package. Contact factory for Wafer / Die availablity. Devices in Wafer / Die form are lead (Pb)-free / RoHS compliant. bsolute Maximum Ratings Parameter Value Drain-to-source voltage BS Drain-to-gate voltage BV DGS Gate-to-source voltage ±2V Operating and storage temperature -55 O C to +15 O C bsolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. ll voltages are referenced to device ground. Typical Thermal Resistance Package TO-236B (SOT-23) θ ja 23 O C/W 132 O C/W Product Summary BS /BV DGS Pin Configuration DRIN GTE SOURCE TO-236B (SOT-23) Product Marking N1LW SOURCE DRIN GTE Package may or may not include the following marks: Si or TO-236B (SOT-23) SiTN 2 16 YYWW (max) W = Code for week sealed = Green Packaging YY = Year Sealed WW = Week Sealed = Green Packaging (th) (max) 6V 2.5Ω 2.V Package may or may not include the following marks: Si or Doc.# DSFP-TN216 B8913
Thermal Characteristics Package (continuous) Notes: (continuous) is limited by max rated T j. (pulsed) Electrical Characteristics ( unless otherwise specified) TN216 Sym Parameter Min Typ Max Units Conditions BS Drain-to-source breakdown voltage 6 - - V = V, = m (th) Gate threshold voltage.6-2. V =, = m Δ(th) Change in (th) with temperature - -3.8-5.5 mv/ O C =, = m I GSS Gate body leakage -.1 1 n = ± 2V, = V - - = V, = Max Rating SS Zero gate voltage drain current µ V - - 1 DS =.8Max Rating, = V, = 125 O C (ON) On-state drain current.6 - - = 1V, = 25V Static drain-to-source on-state resistance - - 5. V Ω GS = 4.5V, = 2m - - 2.5 = 1V, = 5m Δ Change in with temperature -.7 %/ O C = 1V, = 5m G FS Forward transductance 15 4 - mmho = 25V, = 5m C ISS Input capacitance - 35 5 = V, C OSS Common source output capacitance - 17 25 pf = 25V, C RSS Reverse transfer capacitance - 7. 8. f = MHz t d(on) Turn-on delay time - 3. 5. t V DD = 25V, r Rise time - 5. 8. ns =.5, t d(off) Turn-off delay time - 6. 9. R GEN = 25Ω t f Fall time - 5. 8. V SD Diode forward voltage drop - 1.2 1.8 V = V, I SD = 5m t rr Reverse recovery time - 4 - ns = V, I SD = 5m Notes: 1. ll D.C. parameters 1% tested at 25 O C unless otherwise stated. (Pulse test: 3µs pulse, 2% duty cycle.) 2. ll.c. parameters sample tested. Switching Waveforms and Test Circuit Power Dissipation @T C TO-236B (SOT-23) 28m.8.36W 28m.8 3m.74W 3m R RM INPUT 1V V 1% 9% Pulse Generator VDD R L OUTPUT t (ON) t (OFF) R GEN t d(on) t r t d(off) t f VDD OUTPUT 1% 1% INPUT D.U.T. V 9% 9% Doc.# DSFP-TN216 B8913 2
TN216 Typical Performance Curves 2.5 Output Characteristics 2.5 Saturation Characteristics = 1V = 1V 2. 2. 1.5 8V 6V 1.5 8V 6V.5 4V.5 4V 3V 1 2 3 4 5 3V 2. 4. 6. 8. 1 Transconductance vs. Drain Current.5 = 25V Power Dissipation vs. Temperature.4.8 G FS (siemens).3.2 = -55 O C 25 O C 125 O C P D (watts).6.4 SOT-23.1.2.2.4.6.8 25 5 75 1 125 15 ( O C) Maximum Rated Safe Operating rea SOT-23 (pulsed) SOT-23 (DC).1.1.1.11 1 1 Thermal Resistance (normalized).8.6.4.2 Thermal Response Characteristics TO-236B P D =.36W.1.1.1 1 t P (seconds) P D = W T C Doc.# DSFP-TN216 B8913 3
TN216 Typical Performance Curves (cont.) 1.1 BS Variation with Temperature 1 8. On-Resistance vs. Drain Current = 4.5V BS (normalized) (ohms) 6. 4. = 1V 2..9 C (picofarads) -5 5 1 15 T j ( O C).8.6.4.2 Transfer Characteristics 2. 4. 6. 8. 1 Capacitance vs. Drain-to-Source Voltage 1 75 5 = 25V = -55 O C 125 O C 25 O C f = MHz C ISS (th) (normalized).5 1.5 2. 2.5 (th) and Variation with Temperature 2. 1.2 @ 1V,.5 1.6 1.2.8.8 (th) @ m.6.4.4-5 5 1 15 T j ( O C) Gate Drive Dynamic Characteristics 1 8. 6. = 1V 4. = 2V (normalized) 25 C OSS 2. 92 pf C RSS 1 2 3 4 38 pf.2.4.6.8 Q G (nanocoulombs) Doc.# DSFP-TN216 B8913 4
3-Lead TO-236B (SOT-23) Package Outline (K1) 2.9x1.3mm body, 1.12mm height (max), 1.9mm pitch TN216 3 D E1 E.25 Gauge 1 2 e e1 b L L1 Seating Top View View B View B 2 Seating 1 Side View View - Symbol 1 2 b D E E1 e e1 L L1 θ MIN.89.1.88.3 2.8 2.1 1.2.2 O Dimension.95 1.9.54 NOM - -.95-2.9-1.3.5 - (mm) BSC BSC REF MX 1.12.1 2.5 3.4 2.64 1.4.6 8 O JEDEC Registration TO-236, Variation B, Issue H, Jan. 1999. This dimension differs from the JEDEC drawing. Drawings not to scale. Supertex Doc.#: DSPD-3TO236BK1, Version C4139. Doc.# DSFP-TN216 B8913 5
3-Lead Package Outline (N3) TN216 D Seating 1 2 3 L e1 e Front View b c Side View E1 1 3 E 2 Bottom View Dimensions (inches) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http:///packaging.html.) does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an adequate product liability indemnification insurance agreement. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the (website: http//) 213 ll rights reserved. Unauthorized use or reproduction is prohibited. Doc.# DSFP-TN216 B8913 Symbol b c D E E1 e e1 L MIN.17.14.14.175.125.8.95.45.5 NOM - - - - - - - - - MX.21.22.22.25.165.15.15.55.61* JEDEC Registration. * This dimension is not specified in the JEDEC drawing. This dimension differs from the JEDEC drawing. Drawings not to scale. Supertex Doc.#: DSPD-3TO92N3, Version E419. 6 1235 Bordeaux Drive, Sunnyvale, C 9489 Tel: 48-222-8888