Silicon Photonics Opportunity, Applicatoins & Recent Results Mario Paniccia, Director Photonics Technology Lab Intel Corporation Intel Corporation CREOL April 1 2005
Agenda Opportunity for Silicon Photonics Copper vs optical Recent advances Intels SP Research Recent results Intel s s Silicon Laser Summary *Third party marks and brands are the property of their respective owner 2
ELECTRONICS: Moore s Law Scaling 10000 1000 MIPS Pentium 4 Processor Pentium III Processor Pentium II Processor $/MIPS 100 10 100 10 1 Pentium Pro Processor Pentium Processor Intel486 TM DX CPU Intel386 TM DX Microprocessor Microprocessor MIPS $/MIPS 1985 1987 1989 1991 1993 1995 1997 1999 2001 Integration & increased functionality Volume economics faster, better, cheaper 1 0.1 0.01 *Third party marks and brands are the property of their respective owner 3
The Opportunity of Silicon Photonics Take advantage of enormous ($ billions) CMOS infrastructure, process learning, and capacity Available tools: litho requirements typically >90nm Draft continued investment going forward Potential to integrate multiple optical devices Micromachining could provide smart packaging Potential to converge computing & communications Industry standard silicon manufacturing processes could enable integration, bring volume economics to to optical. To benefit from existing infrastructure optical wafers must run alongside product.. i.e CMOS fabrication compatible.. *Third party marks and brands are the property of their respective owner 4
Today's High Speed Interconnects Metro & Long Haul 0.1 80 km Primarily Optical Rack to Rack 1 to 100 m Primarily Copper Board to Board 50 100 cm Chip to Chip 1 50 cm Billions Millions Volumes Thousands Decreasing Distances Need to drive volume economics to drive optical closer to chip *Third party marks and brands are the property of their respective owner 5
Copper Approaching Limits Simulation of 20 channel transmitter w/ equalization 0 Channel Attenuation [db] -10-20 -30-40 -50 12G 18G Standard FR4 0 10 20 30 Low Loss Ro4350 40 Red Zone = Eye Closes Data Rate [Gb/s] Howard Heck Copper scaling more challenging. Headroom getting squeezed. *Third party marks and brands are the property of their respective owner 6
Electrical to Optical Enterprise Distance: 0.1-10km 10km Rack-Rack Distance: 1-100m100m 10G Silicon Photonics? >= 40G 3.125G 10G 40G OPTICAL Board-Board Distance: 50-100cm Chip-Chip Distance: 1-50cm 3.125G 5-6G5 ELECTRICAL 3.125G 5-6G5 10G Copper Tech Optical Tech 20G Transition Zone 10G 15-20G 2005 Transition driven by cost 2010+ *Third party marks and brands are the property of their respective owner 7
The Photonic Dilemma Fiber has much more bandwidth than copper However, it is much more expensive.. *Third party marks and brands are the property of their respective owner 8
Photonics: The technology of emission, transmission, control and detection of light (photons) aka fiber- optics & opto-electronics Today: Most photonic devices made with exotic materials, expensive processing, complex packaging Silicon Photonics Vision: Research effort to develop photonic devices using silicon as base material and do this using standard, high volume silicon manufacturing techniques in existing fabs Benefit: Bring volume economics to optical communications *Third party marks and brands are the property of their respective owner 9
Agenda Opportunity for Silicon Photonics Copper vs optical Recent advances Intels SP Research Recent results Intel s s Silicon Laser** Summary *Third party marks and brands are the property of their respective owner 10
Silicon Pro s s and Cons + Transparent in 1.3-1.6 1.6 µm m region + CMOS fabrication compatibility + Low cost + High-index index contrast small footprint No electro-optic optic effect No detection in 1.3-1.6 1.6 µm m region High index contrast coupling Lacks efficient light emission Silicon will not win with passive devices.. Must produce active devices that add functionality *Third party marks and brands are the property of their respective owner 11
Silicon Photonics Breakthroughs Are Accelerating Low Loss Strip MIT 2001 SRS UCLA Si LEDs STM, Trento Integrated APD+TIA UT Inverted Taper NTT, Cornel 2002 Raman λ Conversion Modeled GHz PIN Modulator Surrey, Naples PBG WG <25dB/cm IBM UCLA 2003 Raman Net Pulsed Gain 9/6: Intel 9/20: Cornell 9/29: UCLA 9/29: CUHK 30GHz SiGe Photodetector GHz MOS Modulator 2004 Intel IBM PBG WG <7dB/cm IBM, FESTA, NTT CW Raman lasing Feb 05 Progress In Recent Years Is Accelerating still not there *Third party marks and brands are the property of their respective owner 12
Agenda Opportunity for Silicon Photonics Copper vs optical Recent advances Intel s s SP Research Recent results Intel s s Silicon Laser** Summary *Third party marks and brands are the property of their respective owner 13
Intel s s Silicon Photonics Research 1. Develop photonic building blocks in silicon 1) Light Source 2) Guide Light 3) Modulation Waveguides devices First Continuous Silicon Laser (Nature 2/17/05) 4) Photo-detection 5) Low Cost Assembly Passive Align 6) Intelligence CMOS 1GHz (Nature 04) 1GHz 4 Gb/s ( 05) SiGe Photodetectors Mirror First Prove that silicon is viable material for photonics *Third party marks and brands are the property of their respective owner 14
Packaging Approximate Optical Product Cost Breakdown Packaging 1/3 Device 1/3 Testing 1/3 In addition to device costs, packaging and testing costs must drop with to enable high volume photonics *Third party marks and brands are the property of their respective owner 15
Micromachining for Packaging U-Grooves Use standard pick and place technologies along with litho defined silicon micro-machining machining Tapers Mirror V-Grooves Laser Attach 45 Mirrors Facet Preparation *Third party marks and brands are the property of their respective owner 16
Intel s s Silicon Photonics Research 1. Develop photonic building blocks in silicon 2. Integrate increasing functionality directly onto silicon Integrated in Silicon Photodetectors DEMUX Receiver Chip Taper Driver Chip Passive Align Lasers MUX *Third party marks and brands are the property of their respective owner 17
Intel s s Silicon Photonics Research 1. Develop photonic building blocks in silicon 2. Integrate increasing functionality directly onto silicon 3. Long term explore monolithic integration Filter ECL Drivers Modulator Multiple Channels CMOS Circuitry TIA TIA Passive Alignment Photodetector *Third party marks and brands are the property of their respective owner 18
SILICON LASER What we announced on Feb 17 th th *Third party marks and brands are the property of their respective owner 19
The First Laser Developed by Ted Maiman, published in Nature,, August 6, 1960. this ruby laser used a flash lamp as an optical pump Fully Reflective Mirror Flash Lamp Partially Reflective Mirror RUBY CRYSTAL ROD LASER BEAM *Third party marks and brands are the property of their respective owner 20
Raman: (Historical Note) Raman Effect or Raman Scattering: A phenomenon observed in the scattering of light as it passes through a transparent medium; the light undergoes a change in frequency and random alteration in phase due to a change in rotational or vibrational energy of the scattering molecules. Discovered a material effect that is named after him Nature published his paper on the effect on March 31, 1928 He received the Nobel prize in 1930 for his discovery The first laser using the Raman effect was built in 1962 Today Raman based amplifiers are used throughout telecom Most long distance phone calls will go through a Raman amplifier Typical Raman Amplifier *Third party marks and brands are the property of their respective owner 21
Silicon Indium Antimonide (III-V) Quartz Lithium Niobate (used for modulators) Diamond Glass Fiber (Raman lasers/amps) The Raman Effect Materials Raman gain coefficient (10-8 m/mw) 0 5000 10000 15000 20000 Kilometers of fiber... The Raman effect is 10,000 times stronger in silicon than in glass fiber Centimeters of silicon This allows for significant gain in centimeters instead of kilometers Fabrication of low-loss silicon waveguides is challenging *Third party marks and brands are the property of their respective owner 22
Raman Gain in Silicon Silicon Waveguide Pump in Pump out Pump/probe experiment Probe in Probe out 2.5 3.5 Raman Gain and WG loss vs. Input Pump Power -0.2 Raman gain (db) 2.0 1.5 1.0 0.5 0.0 0 200 400 600 800 1000 Input pump power(mw) (b) Raman Gain/WG Loss (db) 3 2.5 2 1.5 1 0.5 0 0 200 400 600 Pump Power (mw) -0.4-0.6-0.8-1 -1.2-1.4-1.6 Gain-Loss (db) Raman Gain WG Loss Loss w/o Pump Gain-Loss CW Gain Saturation due to TPA induced FCA *Third party marks and brands are the property of their respective owner 23
Two Photon Absorption In silicon, one infrared photon doesn't have the energy to free an electron e e e e e e e e Free Electron e SILICON WAVEGUIDE But, occasionally, two photons can knock an electron out of orbit. Free electrons absorb individual photons and cancel Raman gain *Third party marks and brands are the property of their respective owner 24
Overcoming TPA induced FCA V + laser beam Raman Gain Gain needed to make a laser oxide p-type silicon electrons Gain limit due to Two Photon Absorption problem intrinsic silicon n-type silicon Pump power *Third party marks and brands are the property of their respective owner 25
Effective Carrier lifetime reduction SiO 2 passivation Al contact Si rib waveguide p-region Buried oxide H W h Al contact n-region Output power (mw) 500 400 300 200 100 Lifetime=16 ns Lifetime=6.8 ns Lifetime=3.2 ns Lifetime=1 ns 25 V 5 V short open Si substrate PIN Cross-section *Third party marks and brands are the property of their respective owner 26 0 0 200 400 600 800 1000 1200 Input power (mw) TPA coeff ~ 0.5 cm/gw, α 0.39 db/cm, FCA cross sect 1.45e-17 cm^2 @ 1550 nm. The lifetime is used as a fitting parameter
CW gain vs. reverse bias voltage WG= ~1.5um by 1.5um NET GAIN NO NET GAIN Pump λ=1550 nm Signal λ=1686 nm *Third party marks and brands are the property of their respective owner 27
With gain can build Laser: Silicon Waveguide Cavity R f V bias 16 mm n-region R b Pump beam SOI rib waveguide 2 mm Laser output Dichroic coating p-region Broad-band reflective coating 24%/71% 90% *Third party marks and brands are the property of their respective owner 28
Experimental setup Pump at 1,550 nm 0-10 Optical -20-30 -40 spectrum -50-60 -70 analyzer -80 Pump power monitor 90/10 Tap coupler 1684 1685 1686 1687 1688 1689 1690 1691 1692 Laser output power meter Polarization controller LP filter 90/10 Tap coupler Lensed fibre De-multiplexer Laser output at 1,686 nm Silicon waveguide Dichroic coating High reflection coating *Third party marks and brands are the property of their respective owner 29
Experimental Set up Test chip with 8 laser WG s Laser chip *Third party marks and brands are the property of their respective owner 30
Typical Lasing Criteria Threshold behavior: rapid growth in output power when gain > loss Spectral linewidth narrowing: Coherent light emission *Third party marks and brands are the property of their respective owner 31
Threshold, Efficiency, and PIN effect Laser output (mw) 10.0 9.0 8.0 7.0 6.0 5.0 4.0 3.0 2.0 1.0 0.0 25V bias 5V bias 25V slope 5V slope 0 200 400 600 800 Coupled pump power (mw) Laser turns on at threshold, when gain per pass in cavity becomes greater than the loss. *Third party marks and brands are the property of their respective owner 32
Spontaneous emission vs. laser spectrum Spectral power (a. u.) 2.50 2.00 1.50 1.00 0.50 Lasing signal Spontaneous emmission Magnified 10^ 5x 0.00 1668.5 1669 1669.5 1670 1670.5 Wavelength (nm) When lasing, the spectrum becomes much more narrow and much higher in power. *Third party marks and brands are the property of their respective owner 33
Wavelength tuning (comparison) 0-10 pump 0-10 Spactral power (db) -20-30 -40-50 -60 1548 nm 1550 nm 1552 nm 1554 nm 1556 nm 1558 nm Spactral power (db) -20-30 -40-50 -60 1548 nm 1550 nm 1552 nm 1554 nm 1556 nm 1558 nm -70-70 -80 1680 1685 1690 1695 1700 Laser wavelength (nm) -80 1542 1547 1552 1557 1562 Laser wavelength (nm) Silicon Raman laser Commercial ECDL *Third party marks and brands are the property of their respective owner 34
Potential Applications *Third party marks and brands are the property of their respective owner 35
Communications Applications PUMP LASER passively aligned Si Raman Amplifier weak data beam waveguide coupler amplified data beam 101110 101110 silicon waveguide (cm s) Si Multi-Channel Transmitter laser cavity modulators P passively aligned MOD PUMP LASER MOD MUX N splitter MOD MOD Optical Fiber Si Raman Modulator integrated mirrors *Third party marks and brands are the property of their respective owner 36
Covering the Gaps Different wavelengths require different types of lasers Mid-Infrared very difficult for compact semiconductors Raman Lasers could enable lasers at these wavelengths Applications in sensing, analysis, medicine, and others 2.1µm Ho:YAG laser Compact Semi. Lasers PUMP LASER 2.9µm Er:YAG laser cascaded mirrors >2µm Could enable lasers for a variety of applications *Third party marks and brands are the property of their respective owner 37
Summary Long term true convergence opportunities are with silicon B/W will continue drive conversion of optical into interconnects Tremendous progress from research community Need to continue pushing & improving performance Research breakthrough with CW silicon laser Integration is next set of challenges In order to benefit Technologies must be CMOS fabrication compatible to benefit from HVM & infrastructure Silicon will not win with individual devices, but with integrated modules that bring increased total functionality & intelligence at a lower cost *Third party marks and brands are the property of their respective owner 38
BACKUP *Third party marks and brands are the property of their respective owner 39
Photonic Integration: Reduction in interfaces lower loss Reduction in size Simpler assembly, testing, packaging Cost Benefits of Integration Optoelectronic Integration: Reduce parasitics,, improved high-freq performance Further size, testing, packaging reductions? Cost Integration is only useful if integrated device has benefit (functionality, cost, performance) over discrete devices *Third party marks and brands are the property of their respective owner 40
CMOS Integration Challenges Film topology Coupling to fiber Contaminating the fab Yield metrology Thermal budgets Heat dissipation Complexity / yield Optoelectronic Integration To benefit from existing infrastructure optical wafers must run alongside product, introducing additional pragmatic challenges *Third party marks and brands are the property of their respective owner 41
Surface Topology: Litho vs DOF Depth of focus (DOF) shrinks as litho improves Many optical devices are much taller than transistors For 0.18µm m and better, topology exceeds DOF New planarization techniques required for advanced litho DOF vs. Litho Technology (µm)( 0.25 0.18 0.35µm 0.5 µm 0.2 0.09 0.2µm Transistor on 90nm 0.3µm Strip 0.9µm Rib 8µm Taper 0.1µm gate *Third party marks and brands are the property of their respective owner 42
Fiber Coupling Taper from (W x H): 10 x 8 µm m to 2.5 x 2.3 µm Assume zero roughness Taper loss (db) 10 1 0.1 Source: Intel 1dB 80 82 84 86 88 90 Sidewall angle (degrees) Tip=0.5 Tip=1.0 Tip=2.0 2dB Coupling from standard fiber to Si waveguides requires special structures (tapers, gratings, etc). For wedge tapers, etch angle as well as the tip lithography impact loss. Sidewall roughness is also a factor Getting light from fibers into silicon waveguides will require couplers. For certain structures litho and etch parameters must be carefully controlled. *Third party marks and brands are the property of their respective owner 43
Yield Metrology CMOS fabs monitor thousands of parameters across wafer in line Tight control e.g. CMOS gate width held to 10 s s of angstroms Significant per-wafer cost savings from screening out yield early In-line wafer level optical probing is very immature Most optical device testing is performed after wafer dicing To truly gain from HVM processing, automated & non-destructive techniques for probing optical devices at the wafer level must be developed *Third party marks and brands are the property of their respective owner 44
Opto-Electronic Integration (cont) Thermal: For optoelectronic integration, optical devices must tolerate heat generated by CMOS circuits. Process compatibility: @ 10Gb/s CMOS IC s need 90nm technology Silicon Photonic devices may only need ~.25um Simulated multi-core thermal map IO Pads Core Core Other Logic Core Core IO Pads Cache Yield: Typical industry IC yields are high, but the process windows are extremely tight. Tweaks to enable opto-electronic integration may effect IC yield Temp C 80-85 75-80 70-75 65-70 60-65 Trade off of yield and process compexity will determine if opto-electrical integration valuable *Third party marks and brands are the property of their respective owner 45
Animation Click in box while in slide show mode to start Click outside animation box after animation *Third party marks and brands are the property of their respective owner 46
Extending and Expanding Moore s s Law Sensors Mechanical Discrete SSI LSI VLSI Biological EXP A EXTENDING Fluidics Wireless D I N G Optical *Third party marks and brands are the property of their respective owner 47
Two Photon Absorption in Silicon Conduction band Pump λ=1.55µm Silicon band gap 1.1 ev Valence band Two photons can simultaneously hit an atom Combined energy enough to kick free an electron *Third party marks and brands are the property of their respective owner 48