Modeling and Development of INS-Aided PLLs in a GNSS/INS Deeply-Coupled Hardware Prototype for Dynamic Applications

Sesors 215, 15, 733-759; doi:1.339/s151733 Article OPEN ACCESS sesors ISSN 1424-822 www.mdpi.com/joural/sesors Modelig ad Developmet of INS-Aided PLLs i a GNSS/INS Deeply-Coupled Hardware Prototype for Dyamic Applicatios Tisheg Zhag, Xiaoji Niu, Yalog Ba, Hogpig Zhag *, Chuag Shi ad Jiga Liu GNSS Research Ceter, Wuha Uiversity, No 129 Luoyu Road, Wuha 4379, Chia; E-Mails: zts@whu.edu.c (T.Z.); xjiu@whu.edu.c (X.N.); ylba@whu.edu.c (Y.B.); shi@whu.edu.c (C.S.); jliu@whu.edu.c (J.L.) * Author to whom correspodece should be addressed; E-Mail: hpzhag@whu.edu.c; Tel.: +86-133-8758-197; Fax: +86-27-6877-8971. Academic Editor: Fabrizio Lamberti Received: 1 September 214 / Accepted: 4 December 214 / Published: 5 Jauary 215 Abstract: A GNSS/INS deeply-coupled system ca improve the satellite sigals trackig performace by INS aidig trackig loops uder dyamics. However, there was o literature available o the complete modelig of the INS brach i the INS-aided trackig loop, which caused the lack of a theoretical tool to guide the selectios of iertial sesors, parameter optimizatio ad quatitative aalysis of INS-aided PLLs. This paper makes a effort o the INS brach i modelig ad parameter optimizatio of phase-locked loops (PLLs) based o the scalar-based GNSS/INS deeply-coupled system. It establishes the trasfer fuctio betwee all kow error sources ad the PLL trackig error, which ca be used to quatitatively evaluate the cadidate iertial measuremet uit (IMU) affectig the carrier phase trackig error. Based o that, a steady-state error model is proposed to desig INS-aided PLLs ad to aalyze their trackig performace. Based o the modelig ad error aalysis, a itegrated deeply-coupled hardware prototype is developed, with the optimizatio of the aidig iformatio. Fially, the performace of the INS-aided PLLs desiged based o the proposed steady-state error model is evaluated through the simulatio ad road tests of the hardware prototype. Keywords: GNSS/INS deeply-coupled itegratio; INS-aided PLLs; PLL trackig error; steady state error model; hardware prototype

Sesors 215, 15 734 1. Itroductio The trackig loop desig of the traditioal global avigatio satellite system (GNSS) receiver is sufferig a dilemma. I order to reduce the thermal oise to improve the sigal receivig accuracy i the GNSS receiver, the badwidth of its trackig loops should be arrow eough. However, the arrow badwidth would icrease dyamic stress error [1]. Therefore, receiver measuremet errors durig dyamic periods are systematically larger tha those durig static periods [2]. The iertial avigatio system (INS) has a superior dyamic characteristic, which is highly complemetary to GNSS. GNSS/INS itegratio ca be briefly classified as loosely-coupled, tightly-coupled ad deeply-coupled, listed i order of complexity. While GNSS avigatio results are fused with INS iformatio i the loosely-coupled itegratio, GNSS observatio results are fused with INS iformatio i the tightly-coupled itegratio. The GNSS receiver s basebad structure eed ot be adjusted i loosely-coupled itegratio ad tightly-coupled itegratio, but satellite sigal receivig performace caot be improved. The deeply-coupled itegratio is the fusio of GNSS ad INS iformatio i the sigal processig level, which could further take advatage of the INS dyamic characteristic to improve satellite sigal acquisitio ad trackig performaces uder dyamics [3]. Based o the type of trackig loops used i receivers, deeply-coupled itegratio ca be implemeted i two differet ways, which are show i Figure 1, respectively amed: (1) scalar-based architecture; ad (2) vector-based architecture [4]. The term scalar-based architecture refers to aidig the idividual trackig loops by iertial measuremets, proposed by Staford Uiversity [5]. By cotrast, the term vector-based architecture is cosidered as a vector-based receiver itegrated with a iertial measuremet uit (IMU), i which the traditioal code ad carrier trackig loops are elimiated, proposed by MIT [6]. Although the vector-based architecture ca make fuller use of the available iformatio ad get better sigal sesitivity, the architecture is more complex ad challegig for realizig a real-time system. Meawhile, sice the deeply-coupled Kalma filter output accuracy is isufficiet for carrier phase trackig, idividual trackig loops still eed be used i the vector-based architecture [7]. As a simpler approach, the scalar-based architecture, whose trackig loops are idividual, is valuable for carrier phase trackig. (a) (b) Figure 1. Two differet architectures of GNSS/INS deeply-coupled itegratio. (a) Scalar-based architecture; (b) vector-based architecture. NCO meas umerically cotrolled oscillator.

Sesors 215, 15 735 Most previous research o the trackig loops of deeply-coupled itegratio was maily based o relatively simple modelig ad simulatio. There was o literature available o the complete modelig for the INS brach i the INS-aided trackig loops, so there was o mature model supportig the desig ad evaluatio of INS-aided trackig loops, such as the desig of the trackig loop s badwidth, selectio of iertial sesors, implemetatio optimizatio of aidig iformatio delay ad quatitative aalysis of trackig performace [6 15]. He et al. proposed a mathematical structure of the INS-aided delay lock loop (DLL) i 1998, show i Figure 2a [9]: the INS brach is simply modeled as (1 b) / ( τ s+ 1), where b is the error of the IMU scalar factor ad τ is delay time i the filter. However, the error of the IMU bias ad the avigatio error were ot cosidered i the model. Alba proposed a mathematical structure of the INS-aided phase lock loop (PLL) i 23, show i Figure 2b [1]: the IMU is simply modeled as a low pass filter, which could ot correctly reflect the error trasformatio of IMU; the INS iformatio delay to trackig loops was ot cosidered. Therefore, these models oly demostrated that satellite sigal trackig performace could be ehaced with INS aidig, but could ot be used for quatitative aalysis to guide IMU selectio, parameter optimizatio ad quatitative aalysis of INS-aided PLLs. I additio, sice developig a deeply-coupled system requires the adjustmet of the receiver iteral structures, there were oly limited cases of real-time hardware systems achieved by the co-operatio of compaies [14,15]. However, most research istitutios use software platforms [16 18], resultig i literature beig scat o the deeply-coupled system performace verificatio o embedded hardware platforms. 1 b τ s + 1 A() s 1 S 1 S P() s E() s F() s 1 S Ps ˆ( ) (a) Δfext () s S α IMU s +α IMU ω r () s τ s + 1 s θ i () s δθ () s 1 θ o() 2 k s 2 S (b) Figure 2. INS-aided GNSS receiver trackig loop model i previous work [9,1]. (a) Proposed by He et al.; (b) proposed by Alba.

Sesors 215, 15 736 To provide a theoretical tool for IMU selectio, parameter optimizatio ad quatitative aalysis of INS-aided PLLs, this paper builds the error trasfer fuctio of INS-aided PLLs based o a scalar-based architecture i Sectio 2, which reflect the relatioships betwee all kow error sources (icludig thermal oise, oscillator oise, INS errors ad the delay of INS aidig iformatio) ad carrier phase trackig error. What eeds to be emphasized is that INS errors are modeled i detail i this paper, which is proposed for the first time, compared to previous works. Based o that, it derives ad aalyzes the PLL steady-state error model before ad after INS iformatio assistace i Sectio 3, which ca be used for the parameter desig of INS-aided PLLs, IMU selectio ad hardware system developmet. Moreover, a itegrated real-time deeply-coupled hardware prototype is developed i Sectio 4, i which the real-time ruig ad the INS iformatio delay are optimized. The proposed hardware prototype desig is also uique compared to software systems i previous works. I Sectio 5, tests ad aalysis of PLL trackig performace i dyamic coditios are carried out based o a GPS/INS simulator ad vehicle. Fially, the INS-aided PLLs o a deeply-coupled hardware prototype are summarized ad cocluded. 2. Error Trasfer Fuctio of INS-Aided PLLs Compared with the DLL, the PLL is more sesitive to dyamic stress ad much easier to lose lockig, sice the carrier wavelegth is much shorter tha the code chip legth. Therefore, this paper studies the trackig performaces of the PLL as a example. Error trasfer fuctio derivatio is the precoditio of the steady-state error modelig used for INS-aided PLLs desig. To derive the error trasfer fuctio of INS-aided PLLs, its mathematical structure should be obtaied based o the deeply-coupled system priciple. I this sectio, the detailed architecture of the scalar-based deeply-coupled system will be itroduced first. The, the mathematical structure of INS-aided PLLs is proposed, reflectig the effects of all kow error sources o trackig error. Based o that, the error trasfer fuctios betwee all error sources ad trackig error are modeled. 2.1. INS-Aided PLLs Priciple With the GPS L1 sigle frequecy receiver as example, Figure 3 shows the detailed compoets of the scalar-based deeply-coupled system. While the upper part represets the GPS receiver subsystem, the lower part is the iertial avigatio subsystem. Compared with loosely-coupled itegratio ad tightly-coupled itegratio, the INS iformatio is set to the receiver s basebad (red arrows i the figure), realizig the assistace to the receiver at the sigal processig level. Compared with the vector-based deeply-coupled itegratio, the two subsystems are relatively idepedet i the scalar-based deeply-coupled itegratio, i which the iteral structure is adjusted less. Sice the receiver ad INS are two kids of avigatio sesors, they ca respectively measure the same vehicle motio iformatio i differet ways. As the INS ad receiver s trackig loop are both used to compute the vehicle motio iformatio, i.e., the vehicle dyamics is commoly experieced by both the IMU ad the trackig loop, the IMU measuremet iformatio could assist the trackig loop based o the cocept of feed-forward [8].

Sesors 215, 15 737 Trackig loop chaels Amplifier RF filter A/D A/D Remove carrier accum ulatio discri miat or DLL PLL filter observ atios positio ig Oscillator Locial Oscillator 9 si Carrier NCO cos code NCO Acceler ometer Gyro Error compe satio Alig met C b Attitude update Velocity update Posito update INS results Itegrated avigatio filter Figure 3. Detailed architecture of a scalar-based deeply-coupled system. DLL, delay lock loop. Based o the scalar-based deeply-coupled system architecture, the priciple of the INS-aided PLLs is show i Figure 4. The PLL ca track the carrier phase chagig betwee a satellite ad the vehicle, which measures the phase differece betwee local umerically cotrolled oscillator (NCO) ad the iput sigal, by the discrimiator coverts the phase differece to the frequecy by a low pass filter ad adjusts the local NCO to follow the iput sigal. O the other had, the vehicle movemet iformatio i the avigatio frame ca be directly measured by IMU. The measured velocity iformatio is mapped to the lie of sight (LOS) betwee the satellite ad the vehicle to obtai the Doppler of relative motio, which combies with the receiver s clock drift, formig the Doppler aidig iformatio. Therefore, with the aid of the INS feed-forward iformatio, the trackig loop oly eeds to udertake the error of the INS aidig iformatio, which sigificatly reduces the dyamic stress affectig the trackig loop. Figure 4. Priciple of INS-aided PLLs. C/A code, coarse/acquisitio-code.

Sesors 215, 15 738 Differet error sources lead to differet effects o the trackig loop. The error sources of the ormal PLLs maily iclude thermal oise, oscillator oise ad dyamic stress. By cotrast, the dyamic stress is replaced by the INS measuremet error i the INS-aided PLLs. The INS measuremet error could be divided ito INS bias-type errors that are urelated to dyamic ad INS scale factor-type errors, which are related with the dyamics. I additio, the aidig iformatio delay should be cosidered i the INS-aided PLLs. Hece, the error sources of the INS-aided PLLs iclude thermal oise, oscillator oise, INS bias-type errors, INS scale factor-type errors ad aidig iformatio delay. Moreover, the INS bias-type errors ca be further divided ito IMU sesor errors (costat bias, bias istability ad white oise) ad the iitial avigatio error (velocity error ad attitude error) after correctio of the GNSS/INS itegratio algorithm; the INS scale factor-type errors ca be further divided ito IMU scale factor error ad IMU o-orthogoal error. 2.2. Error Trasfer Fuctio of INS-Aided PLLs Accordig to the priciple of INS-aided PLLs itroduced i Sectio 2.1, the mathematical structure of the INS-aided PLLs is show i Figure 5, i which the trackig error δθ is affected by all of the error sources simultaeously. As for a ormal PLL, the effects of the thermal oise ω ϕ ad oscillator oise θ o the trackig error are ucorrelated with each other. Besides, the error sources from clk _ error the INS brach are physically idepedet from the PLL brach. Sice the NCO is cotrolled by the sum of the PLL filter output ad the INS aidig iformatio, the relatio of the trackig error caused by them is additive. Accordig to the iertial avigatio priciple, the INS bias-type errors Δ fimu, the st INS scale factor-type errors K a ad the INS aidig iformatio delay e are idepedet of each other. Therefore, all of the error sources of the INS-aided PLLs are idepedet, ad their effects o the trackig error are additive. All of the kow major errors i the INS brach are cosidered i Figure 5, which is much more complete tha the errors cosidered i Figure 2. Δf () IMU s 2 S 1 + Ka ( s) 1 S e st θ clk _ error () s ω ϕ () s θ i () s δθ () s K d Fs () K o 1 S θ o () s Figure 5. Mathematical structure of INS-aided PLLs. The ormal PLL s error trasfer fuctio was derived from its mathematical structure [18]. The mathematical structure become more complex after INS aidig, ad the INS-aided PLL s trasfer fuctio caot be obtaied based o Figure 5 directly. Sice the effects of all of the error sources o

Sesors 215, 15 739 the trackig error are additive, the error trasfer fuctio betwee each error source ad the trackig error could be aalyzed idividually. Additioally, the error trasfer fuctio of the INS-aided PLLs could be obtaied by the superpositio of the effects of all of the error sources, which is writte as Equatio (1). This error trasfer fuctio is the precoditio of the steady-state error modelig i the ext sectio. ΔfIMU () s st () s ( 1 H() s ) () s K () s () s (1 e ) () s H() s () s s δθ = θclk _ error a θi + θi ω ϕ (1) where H( s ) is the system trasfer fuctio of the ormal PLL, which ca be writte as follows [19]. 3. Steady-State Error Modelig ad Aalysis KKFs d o () H() s = s KKFs d o () 1+ s The trackig threshold of the PLL is the maximum steady-state error for the receiver to keep PLL locked. Additioally, the receiver loses lock whe the steady-state trackig errors exceed a certai boudary. Because the trackig loops are oliear, especially ear the threshold regios, oly Mote Carlo simulatios uder the combied dyamic ad sigal-to-oise radio (SNR) coditios ca determie the true trackig performace. However, geeral rules that approximate the trackig errors ca be used based o the steady-state error model of trackig loops. Although umerous trackig error sources are i both ormal PLLs ad INS-aided PLLs, it is sufficiet as a rule of thumb to track thresholds to aalyze oly the domiat error sources. I this sectio, to compare the PLL performace before ad after INS aidig, a ormal secod-order PLL steady-state error model is deduced based o previous research [1,2,21]. The, INS-aided secod-order PLL steady-state error model is proposed based o its error trasfer fuctio. The INS bias errors are cosidered i detail whe the error model of the INS-aided PLL is built. Fially, the steady-state error characteristic of PLLs before ad after INS aidig is compared based o their steady-state error models, which could guide the optimal badwidth selectio i the deeply-coupled system desig. 3.1. Steady-State Error Modelig of Normal Secod-Order PLLs A coservative rule of thumb for trackig threshold is that the three-sigma jitter must ot exceed oe-fourth of the phase pull-i rage of the PLL discrimiator [1]. Whe the PLL two-quadrat arctaget discrimiator is used, it has a phase pull i the rage of 18. Previous research shows that the domiat sources of phase error i a ormal PLL are phase jitter ad dyamic stress error; while the phase jitter is the root sum squared (RSS) of every source of ucorrelated phase error, such as thermal oise ad oscillator oise. The dyamic stress error is a three-sigma effect ad is additive to the phase jitter [1]. Therefore, the oe-sigma rule threshold for the PLL for the two-quadrat arctaget discrimiator is: σ = σ + σ + σ + θ /3 15 (3) 2 2 2 PLL tpll rv ra e ( ) (2)

Sesors 215, 15 74 where σ PLL is oe-sigma trackig error of the ormal PLL i degrees. σ tpll is oe-sigma thermal oise i degrees. σ rv is oe-sigma vibratio-iduced oscillator jitter i degrees. σ ra is Alla variace-iduced oscillator jitter i degrees. θ e is dyamic stress error i the PLL. I the secod-order PLL, the typical relatioship of the oise badwidth B (Hz) ad the atural radia frequecy ω (rad/s) is B =.53ω [1]. Therefore, the thermal oise jitter for the secod-order PLL is computed as follows [1]: 36 B 1 σ tpll = 1 + ( ) (4) 2 π C/ N 2 Tcoh C/ N where C/ N is the carrier-to-oise power expressed as a ratio (Hz) ad T coh is coheret itegratio time (secods). The vibratio-iduced oscillator phase oise is a complex aalysis problem. Assumig that all occurrig vibratios are equally distributed across the etire frequecy rage, the vibratio-iduced oscillator phase jitter for the secod-order PLL is writte as follows [2]: 2 2 f KgGg σ rv = 18 ( ) (5) 2.67B where K g is the g-sesitivity of the oscillator, G g is the sigle-sided spectral desity of vibratio ad f is carrier frequecy. The Alla deviatio phase oise is caused by the drift of the receiver oscillator, which is determied by the oscillator s material ad craft. The secod-order PLL jitter due to Alla deviatio phase oise is writte as follows [2]: π h πh h = + + 2(1.89 ) 4 2(1.89 B) 2 2 2 1 σ ra 18 2 f 3 2 B 4(1.89 B ) ( ) (6) I the equatio, the clock parameters h 2, h 1 ad h represet the frequecy stability of a certai oscillator. Due to the permaet motio of the satellites ad possible receiver motio, the PLL has to track the resultig sigal dyamics. Sigal dyamics is a major problem for o-static applicatios ad pricipally degrades the PLL trackig performace, because it causes phase jitter. The secod-order PLL trackig loop dyamic stress error ca be expressed by [1]. ΔR θ e = (1.89 ) B 2 ( ) (7) where ΔR is the maximum LOS acceleratio dyamics ( /s 2 ). Therefore, the steady-state error model of the ormal secod-order PLL ca be give based o Equatios (3) (7), ad it is expressed by:

Sesors 215, 15 741 σ PLL 2 2 2 B 1 π f KgG g (1 + ) + 18 C/ N 2 Tcoh C/ N 2.67B ΔR = + π π h πh h 3(1.89 B ) + 2 ( + ) (1.89 ) 4 2(1.89 B ) 2 2 2 2 1 π f + 3 2 2 B 4(1.89 B ) 2 ( ) (8) As we kow the ruig coditios of the receiver, icludig GNSS sigal stregth ad the vehicle dyamics, the optimal badwidth of the ormal PLL ca be calculated based o the error model i Equatio (8), as described i [21]. Usig the idea of the optimal badwidth of the ormal PLL, a tool for the badwidth selectio of the INS-aided PLLs ca be proposed. Therefore, if the INS errors i the INS-aided PLLs are modeled i detail, a error model of the INS-aided PLLs, like Equatio (8), could be built, which could truly reflect the effect of the INS error o the trackig loop physically ad be used for the parameter optimizatio of the INS-aided PLLs. 3.2. Steady-State Error Modelig of INS-Aided Secod-Order PLLs Uder vehicle dyamic coditios, Δ fimu () s are the mai error sources i the INS brach. Hece, while Δ fimu () s is modeled i detail, which refers to our prelimiary study i the literature [22], Ka() s st ad e are simply modeled as radom costats i the INS-aided PLL error trasfer fuctio (Equatio (1)). For the horizotal movemet of vehicles, the lower the satellite elevatio is, the larger the PLL mappig error from the INS is. Meawhile, the orth error ad the east error of the INS are symmetrical i the orth-east-dow (NED) avigatio frame. Here, we use the orth directio as a example. If the vehicle is aliged with the NED avigatio frame ad moves toward the orth, the PLL trackig a satellite at the orth directio of the vehicle will map the largest error from the INS. The largest error of the aidig iformatio should be cosidered for the parameter desig of the PLLs. Therefore, without loss of geerality, assume that the vehicle is aliged with the NED avigatio frame ad a satellite is at the orth directio of the vehicle; Δ f () s ca be expressed by: Δf IMU 2π 1 bax _ c GM ax() + wgmax ( s) () s = + + wax() s λ s s 1 s + T a g bgy _ c GMgy () + wgmgy ( s) 1 g + + + w () () () 2 gy s + δvn + φ 2 E s s 1 s + s s T g where b ax _ c is the costat bias of the X-axis accelerometer (i.e., forward directio), b gy_ cis the costat bias of the Y-axis gyro (i.e., pitch gyro), GM ax() + wgmax ( s) is a first-order Gauss Markov process represetig the bias istability of the X-axis accelerometer, GM gy () + wgmgy ( s) is a first-order Gauss Markov process represetig the bias istability of the Y-axis gyro, wax() s is the white oise of the X-axis accelerometer, wgy() s is the white oise of the Y-axis gyro, δ V N () is the orth iitial velocity error after correctio of the GNSS/INS itegratio algorithm ad φ E () is the east iitial IMU (9)

Sesors 215, 15 742 attitude error (i.e., pitch error) after coupled avigatio correctio. Next, this detailed model of the INS bias errors Δ fimu () s is aalyzed for the error modelig of the INS-aided PLL. Sice the error sources, icludig the INS bias-type errors ad the INS scale factor-type errors, are corrected whe the coupled avigatio results are updated, the relatioship betwee each error source ad the trackig error i time domai should be aalyzed i the update iterval of coupled avigatio. While the trackig errors caused by the error sources with a radom costat feature are aalyzed by trasformig their trasfer fuctios to the time domai, the trackig errors caused by the error sources with the oise feature are aalyzed by Mote Carlo simulatio. Oly cosiderig the INS bias-type errors i Equatio (1), takig Equatio (9) ito Equatio (1), we get the cocrete model reflectig the relatioship betwee all of the INS bias-type errors ad the phase trackig error. The ifluece of each INS bias-type error o the trackig error ca be quatitatively aalyzed from the cocrete model. Aalysis results i the literature [23] showed that, compared with the trackig error caused by other INS bias-type errors, the trackig error caused by the orth iitial velocity error after correctio of the GNSS/INS itegratio algorithm δ V N () was domiat. Therefore, usig the trackig error caused by δ V N () to express the steady-state error of INS-aided PLLs caused by the INS bias-type error sources: δvn () θbias = 36 ( ) λ e 1.89B (1) where e is the Euler umber ad λ is the carrier wavelegth. Sice the INS scale factor-type errors are modeled as radom costats, the steady-state error could be derived from its error trasfer fuctio. Whe the acceleratio dyamics ΔR appear, the INS scale factor-type errors brig frequecy ramp estimatio errors Ka ΔR ito the secod-order PLL, which ca geerate a steady-state error. Therefore, the steady-state error of the INS-aided PLL caused by the INS scale factor-type errors ca be expressed as: 36 Ka ΔR θ K = 2 ( ) a 2 π (1.89 B ) (11) Whe the vehicle movemet chages, the jitter brought ito the secod-order PLL caused by the aidig delay is the frequecy step stimulus, which does ot geerate steady-state trackig error. Sice the phase error θ bias is ucorrelated with that due to thermal oise ad oscillator oise, the steady-state error caused by θ bias is the geometric sum relatioship to that caused by thermal oise ad oscillator oise. Therefore, compared with Equatio (3), the oe-sigma rule threshold for the INS-aided PLL trackig loop is: 2 2 2 2 Aid _ PLL tpll rv ra bias Ka /3 15 σ = σ + σ + σ + θ + θ (12) The steady-state error model of the INS-aided secod-order PLL ca be give based o Equatios (4) (12), ad it is expressed as: ( )

Sesors 215, 15 743 σ 18 = 2 2 2 B 1 π f KgG (1 + ) + C/ N 2 T C/ N 2.67B 6K ΔR coh a Aid _ PLL 2 2 2 2 π 2 2 π h (1.89 ) 2 1 4 () B πh h πδv π N + 2 π f ( + + ) + 3 2 2 2 2 2(1.89 B ) 4(1.89 B) 4 2(1.89 ) e (1.89 B) B λ g + (13) Just as the parameter optimizatio idea of the ormal PLL, if the GNSS sigal stregth ad the vehicle dyamics are kow, the optimal badwidth of the INS-aided PLLs could be calculated based o Equatio (13). Comparig Equatio (13) with Equatio (8), after the INS aidig, the effect of the INS bias-type errors is added ito the steady-state error model; but the steady-state error caused by the dyamic stress error is replaced by the INS scale factor-type errors, which is oly a small portio of the origial dyamic stress error. I the ext part, the steady-state error characteristic of PLLs before ad after INS aidig is compared i detail based o the steady-state error models. Meawhile, the optimal parameters of the ormal PLLs ad the INS-aided PLLs could be obtaied. Moreover, thaks to the detailed model of the INS brach, the INS iitial velocity error after correctio of GNSS/INS itegratio δ V N () as the mai factor of all of the INS bias-type errors is established i relatio to the carrier phase trackig error show i Equatio (1), which has ever bee discussed i previous works. 3.3. Steady-State Error Aalysis I order to aalyze the INS effect o the PLLs, a typical low-grade INS with the model of MTI-G ad a typical medium-grade INS with the model of FSAS are selected as illustratios [24,25], with their iitial velocity errors δ V N () of about.2 m/s ad.5 m/s, respectively, based o GNSS real-time kiematic (RTK)/INS itegratio testig. I additio, a ove cotrolled crystal oscillator (OCXO) is used with the parameters listed i Table 1. K g Table 1. OCXO parameters. Gg h 2 h 1 h 1e 1 (1/g).5 (g 2 /Hz) 2.51e 22 2.51e 23 2.51e 26 Sice the INS bias-type errors are extra added error sources to the PLL, their impact to the steady-state error should be aalyzed (uder static coditios). Assumig that the acceleratio ΔR equals zero, Figures 6 ad 7 show the steady-state trackig errors due to each idividual error source ad the total effect based o their steady-state error models (Equatios (8) ad (13)). Figure 6 depicts the relatioship betwee the badwidth ad the steady-state error of the low-grade INS (MTI-G)-aided PLLs with a itegratio time of 1 ms ad 3-dB-Hz sigal power uder static coditios. Whe the horizotal axis represets the oise badwidth B ( B=.53ω ) of the PLL, the vertical axis is the steady-state phase trackig error i degrees. Similar to the tred of the steady-state error due to OCXO errors σ rv, σ ra, the steady-state error due to the INS bias-type errors θ bias rapidly decreases with the wideig of the badwidth. Hece, compared with the ormal PLL s steady-state error σ PLL, the low-grade INS PLL s steady-state error σ Aid _ PLL almost has o icrease with a wide

Sesors 215, 15 744 badwidth. Oly whe the badwidth is too arrow, σ Aid _ PLL is just a little larger (less tha oe degree) tha σ PLL. Therefore, whe the acceleratio equals zero (uder static coditio), the low-grade INS does ot obviously icrease the PLL s steady-state error, uless the badwidth is excessively arrow. 12 MTI-G Aided PLL Jitter(1σ)(deg) 9 6 3 σ tpll σ rv σ ra θ bias σ PLL σ AidPLL 4 8 12 16 2 B (Hz) Figure 6. Trackig errors of MEMS INS-aided PLL uder static coditios. MTI-G is a model of a typical low-grade INS. 12 FSAS Aided PLL 9 Jitter(1σ)(deg) 6 3 σ tpll σ rv σ ra θ bias σ PLL σ AidPLL 4 8 12 16 2 B (Hz) Figure 7. Trackig errors of medium-grade INS-aided PLL uder static coditios. FSAS is a model of a typical medium-grade INS. Compared with Figure 6, Figure 7 shows the relatioship of the badwidth ad the steady-state error of the medium-grade INS FSAS-aided PLL. The INS bias-type errors caused steady-state error θ bias of the PLL, with the medium-grade INS aidig beig less tha that with the low-grade INS aidig, especially whe the badwidth is arrow. Sice the curve of σ AidPLL is i good agreemet with that of σ PLL, the medium-grade INS does ot obviously icrease the static steady-state errors, eve if

Sesors 215, 15 745 the badwidth is excessively arrow. Therefore, if the PLL is aided by a medium-grade INS, the effect of θ bias o the total phase trackig error ca be igored. Uder dyamic coditios, the steady-state error caused by the dyamic stress should be cosidered. Whe the vehicle acceleratio is 9.8 m/s 2, the carrier to oise ratio (CNR) is 4 db-hz ad the itegratio time is 1 ms, the relatioships of the steady-state trackig errors ad the badwidths caused by ormal secod-order PLL, MTI-G-aided PLL ad FSAS-aided PLL are as show i Figure 8. It ca be see that the optimal badwidth of the ormal PLL is wider tha 25 Hz, ad its miimum trackig error is larger tha five degrees; the optimal badwidth of PLL with MTI-G or FSAS aidig is arrower tha 5 Hz with the miimum trackig error beig o more tha three degrees. Whe the GNSS sigal is atteuated to 3 db-hz, with other coditios uchaged, the result is as show i Figure 9. Similar to the tred i Figure 8, the optimal badwidth of the ormal PLL must be wider tha 2 Hz, due to the dyamic stress; ad that of PLL with MTI-G or FSAS aidig ca be arrower tha 3 Hz. I additio, with the GNSS sigal atteuated to 3 db-hz, the miimum trackig error of the ormal PLL icreases to 15 degrees; ad that of the INS-aided PLL oly icreases to five degrees. 4 3 Normal PLL MTI-G Aided PLL FSAS Aided PLL Jitter(1σ)(deg) 2 1 1 2 3 4 5 B (Hz) Figure 8. Steady-state trackig errors with the acceleratio of 9.8 m/s 2 ad CNR of 4 db-hz. 4 Jitter(1σ)(deg) 3 2 Normal PLL MTI-G Aided PLL FSAS Aided PLL 1 1 2 3 4 5 B (Hz) Figure 9. Steady-state trackig errors with the acceleratio of 9.8 m/s 2 ad CNR of 3 db-hz.

Sesors 215, 15 746 Steady-state error aalysis shows that, with the assistace of INS iformatio, the dyamic trackig badwidth of the PLL could be arrower, ad the dyamic trackig error ca be reduced. It should be ote that eve the low-grade INS ca sigificatly improve the PLL performace uder dyamic coditios. We summarize the steady-state error aalysis as follows. The egative effect of the INS aidig, caused by the INS bias-type errors, is small ad ca be eglected, as show i Figures 6 ad 7. The positive effect of the INS aidig, by compesatig for the dyamic stress of vehicle motios, is large ad ca improves the total steady-state phase trackig sigificatly, as show i Figures 8 ad 9. Hece, the steady-state error model could be used for optimizig the INS-aided PLL parameters, selectig iertial sesors ad aalyzig INS-aided PLL performace. Uder static coditios with 3-dB-Hz sigal power, the optimal badwidth of the INS-aided PLLs is about 3 Hz, which is almost the same as that of the ormal PLLs, ad the static trackig error caused by INS bias-type errors is less tha oe degree. Whe the vehicle acceleratio is 9.8 m/s 2 ad the sigal power is 4 db-hz, the optimal badwidth of the INS-aided PLLs is still about 3 Hz, which is much arrower tha that of the ormal PLLs (15 Hz). The dyamic trackig error of the INS-aided PLLs with optimal badwidth is clearly lower tha that of the ormal PLLs, especially whe the sigal power drops to 3 db-hz. Therefore, the GNSS sigal trackig sesitivity ad accuracy of the PLLs ca be prove after the INS aidig uder dyamic coditios. 4. Desig ad Optimizatio of Hardware Prototype System Based o the system modelig ad error aalysis i the previous sectios, a scalar-based deeply-coupled system o a embedded platform is developed. The desig ad optimizatio methods of the hardware prototype are described i this sectio. The INS-aided PLLs i the deeply-coupled system will be desiged based o the proposed steady-state error model o the embedded hardware platform. 4.1. Hardware Prototype Desig A hardware platform [26] with the processig core of a digital sigal processor (DSP) plus a field programmable gates array (FPGA) is show i Figure 1. While the DSP specializes i complex calculatios ad task schedulig, the coprocessor FPGA is good at high-speed digital sigal processig i parallel ad the iterface cotrol. The GNSS RF uit ad the MEMS IMU uit are used to receive GNSS sigals ad iertial data, which are coected to the processor by the I/O of FPGA. The MEMS IMU o the prototype cosists of a tri-axis accelerometer (LIS344ALH), a sigle-axis gyroscope (LPR51AL) ad a double-axis gyroscope (LY51ALH). I additio, all uits o the platform share the same clock, which ca be TCXO, OCXO or other exteral clocks. The scalar-based deeply-coupled system described i Figure 3 is implemeted o the hardware platform, ad its task assigmet is show i Figure 11. While the FPGA is resposible for GNSS IF data samplig, GNSS basebad correlators, IMU data samplig ad preprocessig, etc., DSP is used for GNSS basebad cotrol, satellite positioig, INS mechaizatio, Kalma filter algorithm, the LOS Doppler estimatio ad trackig loop aidig. Usig the samplig clock geerated by the FPGA, the dow-coverted GNSS IF sigal is digitized i the RF uit ad set to the basebad for digital

Sesors 215, 15 747 sigal processig. The correlators with high speed ad multi-chaels (icludig carrier NCO, code NCO, code geerator, mixer ad accumulator) are completed i the FPGA, ad the timig module eeds to be realized i the FPGA. The accumulatig results are passed to DSP via the data bus i every iterrupt, ad the acquisitio ad trackig cotrol of all chaels are realized by the flexible DSP program. High-speed data exchage betwee the FPGA ad DSP is carried out through the exteral memory iterface (EMIF) of the DSP. Figure 1. Hardware platform of a GNSS/INS deeply-coupled system. DSP meas digital sigal processor. Figure 11. Itegrated GNSS/INS deeply-coupled software architecture. PR represets pseudo-rage, CP represets carrier-phase. There are several advatages to implemetig the deeply-coupled system o this hardware platform. (i) All of the fuctio uits are triggered by the same clock, which is beeficial for time sychroizatio. (ii) Differet types of oscillators, IMUs ad GNSS RF uits ca be chose for a series of comparative experimets. (iii) The high-speed iterface is helpful for frequet data exchagig i the deeply-coupled system.

Sesors 215, 15 748 (iv) All of the software algorithms are realized o the same DSP, which is cosistet with the itegratio feature of the deeply-coupled system. 4.2. Hardware Prototype Optimizatio Differet from the deeply-coupled system implemeted i software receivers, the hardware prototype optimizatio copes with embedded software architecture, sychroizatio of IMU ad GNSS data samplig ad INS aidig iformatio delay. 4.2.1. Embedded Software Architecture DSP eeds to respod ad process GNSS data, as well as IMU data simultaeously. Therefore, DSP should respod to two exteral iterrupts, priority iterrupt (Iterrupt 1), used for receivig ad processig GNSS correlator output, ad priority iterrupt (Iterrupt 2) used for receivig ad processig IMU raw data. Sice the correlators update every millisecod, the iterval time of Iterrupt 1 must be less tha 1 ms to receive each itegratio result. Cosiderig the processor computig power ad the maximal vehicle dyamics, the iterval time of Iterrupt 1 is set as.77 ms the Iterrupt 2 as 5 ms. Whe DSP eters a iterrupt service routie, other iterrupts are forbidde by default, whatever their priority. If the executio time of a iterrupt exceeds.77 ms, some.77-ms iterrupts will be missed. Therefore, iterrupt priority cotrol ad iterrupt estig i the software are ecessary. Iterrupt 1 with a.2-ms executio time has the highest priority, ad Iterrupt 2 with a 1-ms executio time has the secod highest priority. At the same time, iterrupt estig is allowed i the lower priority iterrupt. Tests showed that the processor was able to hadle all tasks completed withi the tolerated time, eve with abudat free time [26]. 4.2.2. Sychroizatio of Data Samplig I the GNSS/INS applicatios, ukow timig errors betwee IMU ad GNSS measuremets have a sigificat ifluece o the data fusio performace of the Kalma filter. Additioally, the most effective method is to sample IMU data uder the GNSS PPS (pulse per secod) trigger, which could realize the time sychroizatio essetially. It eeds two coditios: (i) the GNSS receiver ca provide PPS; or (ii) the IMU samplig time could be cotrolled by a exteral sigal. I this hardware prototype; the GNSS receiver subsystem could provide PPS, ad the IMU module cosists of gyroscopes ad accelerometers with aalogue iterfaces, sampled by a multiplexig aalog to digital coverter (ADC) with cotrollable samplig time. The IMU data samplig cotrol module is desiged i the FPGA, without additioal cost of hardware [26]. Six sigals from the sesors (three-axis gyroscopes ad accelerometers) are set to the iput of the ADC, ad the ADC is triggered by a 2-Hz pulse trai to sample the IMU data. The PPS sigal is geerated i the time base module of the receiver to iitialize a time-stamp couter. The, the couter could geerate the 2-Hz pulse trai to trigger the ADC, ad the time stamp is added to the IMU data. Figure 12 shows the sequece diagram of the IMU data samplig. The startig time of the first ADC chael coversio is delayed by two clock cycles compared to the PPS sigal, with the first

Sesors 215, 15 749 cycle usig PPS risig edge detectio ad geeratig 2-Hz samplig pulses ad the secod cycle for triggerig the coversio by the 2-Hz pulse trai. Sice the system clock is 39 MHz i the logic aalyzer, the sigal delay of Chael No. is.5 μs. Other chaels sigal sychroizatio errors are caused by their previous chael samplig time, ad the logest delay is five-times the ADC samplig time. Sice the shortest delay is.5 μs ad the logest oe is 22 μs, the effect of samplig time delay could be igored for the deeply-coupled system, eve i a highly dyamic eviromet. Figure 12. Sequece diagram of the IMU data samplig. PPS meas pulse per secod. 4.2.3. INS Aidig Iformatio Delay If the INS aidig iformatio caot be provided to the receiver trackig loop ad reflect the vehicle dyamics i time, its cotributio will be greatly degraded, especially with strog vehicle dyamics. To esure the performace of the deeply-coupled system, the time delay of the aidig Doppler should be short eough. Data trasmissio is carried out betwee the FPGA ad DSP i the itegrated system. O the oe had, GNSS data ad IMU data use the same trasmissio chael (EMIF), which causes basically the same delay. O the other had, the EMIF ca make commuicatio efficiet ad seamless. Therefore, the processig time differece betwee loop filter output ad INS aidig iformatio is maily caused by the differet processig time of the discrimiator, loop filter ad INS mechaizatio, as well as Doppler estimatio. I order to reduce the INS aidig iformatio delay, the Doppler estimatio is firstly executed oce the INS mechaizatio is completed. Figure 13 shows the test result of addig data delay. While the operatio time is about 382 μs, the trasmissio time is about 12 μs, which is egligible. Assume the dyamics of the platform is 1 m/s 2 ; the Doppler chage rate will be 525 Hz/s. Therefore, a delay of.4 ms causes a.21-hz Doppler error, which has very little effect to the trackig loop.

Sesors 215, 15 75 Figure 13. Time delay of the INS aidig data. Based o the desig ad optimizatio of the hardware prototype, the scalar-based deeply-coupled system was implemeted o the platform i real time. With the guidace of the proposed steady-state error model, the INS-aided secod-order PLL is desiged o the embedded hardware platform. Next, the trackig performace evaluatios of the secod-order PLL before ad after INS aidig will be carried out o the hardware prototype. 5. Trackig Performace Verificatio To verify the effect of the INS aidig to carrier phase trackig performace for dyamic applicatios, compariso testig of ormal PLLs ad INS-aided PLLs is carried out o the hardware prototype uder simulatio ad field vehicle scearios. The parameters of PLLs are selected based o the aalysis results of the steady-state models give i Sectio 3. Accordig to Figure 8, the optimal badwidth of INS-aided PLLs is about 3 Hz whe the vehicle acceleratio is 9.8 m/s 2, the badwidth of INS-aided PLLs is set as 3 Hz. Figure 6 shows that the trackig error of ormal PLLs uder static coditios is also miimum whe the badwidth is set at about 3 Hz. However, the badwidth of ormal PLLs has to be wideed to keep lock uder motio coditios i practice, as show i Figure 8. To verify the coclusio that the badwidth ca be set arrow eough uder motio coditios oly whe the PLLs are aided by INS, the trackig performace of the ormal PLLs with a badwidth of 3 Hz is compared with the INS-aided PLLs with the same badwidth. To demostrate aother coclusio that INS-aided PLLs could reduce the trackig error uder motio coditios, the trackig error of the ormal PLLs with a badwidth of 1 Hz is compared with the INS-aided PLLs with a badwidth of 3 Hz. 5.1. Simulator-Based Testig ad Verificatio A GNSS/INS hardware sigal simulator ca geerate typical scearios with strict repeatability, well cotrolled motio states, less exteral disturbace ad, most importatly, with perfect true values for error aalysis. The simulatio testig setup is show i Figure 14. GPS L1 ad IMU sigals from the simulator are coected to the deeply-coupled hardware prototype through the RF module ad the IMU module, respectively. Additioally, Table 2 shows the two typical IMU cofiguratio parameters used i the simulatio, oe for low-grade MEMS IMU, the other for medium-grade IMU. To test the PLL s dyamic trackig performace, two sets of motio scearios are desiged, icludig the static,

Sesors 215, 15 751 acceleratio/deceleratio, costat speed, turig, etc., while the maximum acceleratio is less tha 5 m/s 2 i the first set of motio scearios, ad the maximum acceleratio is about 25 m/s 2 i the secod set of motio scearios. Figure 14. Setup of the simulatio testig. Table 2. IMU cofiguratio parameters i the simulator. IXSEA is the model of a typical medium-grade INS. Parameters Low-Grade IMU (MEMS) Medium-Grade IMU (IXSEA) Gyro bias (deg/h) 36.5 Gyro white oise (deg/ h) 3..3 Gyro scale factor (ppm) 3 3 Accelerometer bias (mgal) 2 1 Accelerometer white oise (m/s/ h).12.9 Accelerometer scale factor (ppm) 3 4 I the lower dyamic sceario (the maximum acceleratio is less tha 5 m/s 2 ), the trackig error of pseudoradom oise (PRN) 22 as a example is aalyzed with a CNR of 45 db-hz ad a elevatio of 2 degrees. Figure 15 shows the trackig errors of ormal PLLs ad INS-aided PLLs. While the upper part i each subfigure is the Doppler betwee the vehicle ad satellite, which could reflect the vehicle movemet toward the satellite, the lower part is the discrimiator output, which could reflect the phase trackig error [27]. Figure 15a shows the trackig performace of the ormal secod-order PLL with a itegratio time of 2 ms ad a badwidth of 1 Hz. Sice the vehicle acceleratio is small ad the badwidth of the PLL is wide, the trackig error almost has o chage whe the vehicle movemet chages. Figure 15b depicts the trackig error of the ormal secod-order PLL with a itegratio time of 2 ms ad a badwidth of 3 Hz. The overall magitude of the trackig error does ot sigificatly reduce compared with that i Figure 15a. That is because compressig the badwidth caot remove much thermal oise whe the GNSS sigal is strog, which ca be explaied by Equatio (4). However, a larger error would appear oce the vehicle movemet chages due to the arrow badwidth. The above pheomeo illustrates that a ormal PLL is ot suitable for a arrow badwidth to suppress oise

Sesors 215, 15 752 uder dyamic coditios. As is see i Figure 15c,d, with the MEMS INS or the medium-grade INS aidig, the trackig error of the PLL with a itegratio time of 2 ms ad a badwidth of 3 Hz does ot icrease whe the vehicle accelerates/decelerates. 45 Satellite No.22 PLL(2ms,1Hz) 45 Satellite No.22 PLL(2ms,3Hz) Doppler(Hz) 4 395 Doppler(Hz) 4 395 Doppler(Hz) Trackig error(deg) Trackig error(deg) 39 3 6 9 9 45-45 -9 3 6 9 Time(s) 45 4 395 9 45-45 (a) Satellite No.22 MEMS IMU Aidig PLL(2ms,3Hz) 39 3 6 9-9 3 6 9 Time(s) (c) Doppler(Hz) 39 3 6 9 Trackig error(deg) Trackig error(deg) 9 45-45 -9 3 6 9 Time(s) 45 4 395 9 45-45 (b) Satellite No.22 IXSEA IMU Aidig PLL(2ms,3Hz) 39 3 6 9-9 3 6 9 Time(s) (d) Figure 15. GNSS carrier phase trackig error i the lower dyamic sceario testig based o the simulator. (a) Normal PLL (2 ms, 1 Hz); (b) ormal PLL (2 ms, 3 Hz); (c) MEMS INS-aided PLL (2 ms, 3 Hz); (d) medium-grade INS-aided PLL (2 ms, 3 Hz). I the higher dyamic scearios (the maximum acceleratio is about 25 m/s 2 ), the trackig error of PRN 24 as a example is aalyzed with a CNR of 5 db-hz ad a elevatio of 34 degrees. Figure 16 shows the trackig errors of ormal PLLs ad INS-aided PLLs. Figure 16a shows the trackig performace of the ormal secod-order PLL with a itegratio time of 2 ms ad a badwidth of 1 Hz. Although the badwidth is wide, the phase trackig error has a sigificat icrease due to large dyamics. The above pheomeo illustrates that a ormal PLL is ot suitable for log time itegratio ad a arrow badwidth to suppress oise whe the vehicle acceleratio is large (more tha 9.8 m/s 2 ). As see i Figure 16b, the phase trackig error of MEMS INS-aided secod-order PLL with a itegratio time of 2 ms ad a badwidth of 3 Hz slightly icreased because of the large dyamics.

Sesors 215, 15 753 26 Satellite No.24 PLL(2ms,1Hz) 26 Satellite No.24 MEMS IMU Aided PLL(2ms,3Hz) Doppler(Hz) 255 25 Doppler(Hz) 255 25 245 3 6 9 Trackig error(deg) 9 45-45 -9 3 6 9 Time(s) (a) 245 3 6 9 Trackig error(deg) 9 45-45 -9 3 6 9 Time(s) (b) Figure 16. GNSS carrier phase trackig error i the higher dyamic sceario testig based o the simulator. (a) Normal PLL (2 ms, 1 Hz); (b) MEMS INS-aided PLL (2 ms, 3 Hz). The test results i Figures 15 ad 16 are summarized i Table 3, which clearly shows the performace differeces of various types of PLLs. Table 3. Stadard deviatios of carrier phase trackig errors (i degrees) for PLLs. 1 PLL Type Testig Coditios Static Portios Motio Portios All Portios 2 3 4 5 6 7 8 Normal PLL 2 ms, 1 Hz Normal PLL 2 ms, 3 Hz MEMS-aided PLL 2 ms, 3 Hz IXSEA-aided PLL 2 ms, 3 Hz Normal PLL 2 ms, 1 Hz Normal PLL 2 ms, 3 Hz MEMS-aided PLL 2 ms, 3 Hz Acc = 5 m/s 2 CNR = 45 db-hz Acc = 5 m/s 2 CNR = 45 db-hz Acc = 5 m/s 2 CNR = 45 db-hz Acc = 25 m/s 2 CNR = 45 db-hz Acc = 25 m/s 2 CNR = 5 db-hz Acc = 25 m/s 2 CNR = 5 db-hz Acc = 25 m/s 2 CNR = 5 db-hz 6. 7.9 6.3 5.1 21. 8.7 5.4 6.1 5.5 5.2 6. 5.3 1.4 18.2 6.6 Lose lock 1.3 2.1 1.7 Comparig Lie 2 ad Lie 3 i the table, the statistical results of the ormal PLL ad the INS-aided PLL with a badwidth of 3 Hz uder a CNR of 45 db-hz ad a acceleratio of 5 m/s 2 show that the static trackig error of the ormal PLL is slightly lower tha that of the INS-aided PLL, which is because the INS bias-type errors are trasferred to the PLL. However, the dyamic trackig error of the ormal PLL is much larger tha that of the INS-aided PLL, which is cosistet with the model aalysis result i Figure 8. Hece, the badwidth of the PLL ca be set arrow eough oly whe the PLL is aided by INS to respod to the vehicle dyamics, which verifies the model aalysis coclusio i Sectio 3.3. Comparig the statistical results of the ormal PLL with a badwidth of 1 Hz (Lie 1) with the INS-aided PLL with a badwidth of 3 Hz (Lie 3) uder a CNR of 45 db-hz ad a

Sesors 215, 15 754 acceleratio of 5 m/s 2, the static ad dyamic trackig errors of the INS-aided PLL are both lower tha that of the ormal PLL, which is cosistet with the model aalysis result show i Figure 8. The advatage of the PLL with INS aidig would be more apparet with the GNSS sigal atteuatio, as show i Figure 9. Whe the maximum acceleratio is up to 25 m/s 2, the dyamic trackig error of the ormal PLL with a badwidth of 1 Hz has sigificat icreases. Therefore, the badwidth of the ormal PLL eeds to be wider to reduce the dyamic error. O the cotrary, the INS-aided PLL s dyamic trackig error oly has a small icrease, compared to its static trackig error. Therefore, the INS-aided PLL could reduce the carrier phase trackig error by compressig the badwidth uder motio coditios, which agrees with the aalysis coclusio i Sectio 3. Comparig Lie 2 ad Lie 3, the static trackig error of the INS-aided PLL is slightly worse (ot more tha oe degree) tha that of the ormal PLL, because of the INS bias-type errors, which is cosistet with the aalysis result show i Figure 6. The dyamic trackig error of the PLL aided by the MEMS INS is almost the same as that aided by the medium-grade INS uder vehicle dyamic coditios, which agrees with the model aalysis results i Figures 8 ad 9. All test results are cosistet with the aalysis results of the models, which verifies the feasibility of the proposed models i Sectio 3. 5.2. Vehicle-Based Testig ad Verificatio The objective of the field vehicle test is to validate the simulatio results obtaied i the previous sectio ad to evaluate the real-time avigatio performace of the deeply-coupled hardware prototype uder realistic coditios. Figure 17. Setup of vehicle testig. The vehicle dyamic testig was carried out i the suburbs of Wuha uder the ope sky o 21 Jue 213, to further verify the trackig performace. The test cosists of a vehicle equipped with the self-built deeply-coupled prototype, medium-grade INS (FSAS), etc., ad the ope sky drive test, as show i Figure 17. A GPS itermediate frequecy (IF)/IMU raw data recordig ad playback uit is developed based o the hardware prototype, which caot oly replay GPS IF/IMU data to debug the deeply-coupled hardware prototype, but also ca replace the oboard MEMS IMU data by other

Sesors 215, 15 755 IMU data, such as FSAS, to achieve medium-grade INS-aided PLLs testig. The acceleratio ad deceleratio of the road vehicle tests were less tha 5 m/s 2. Usig PRN 13 as a example, the trackig error was aalyzed with a CNR of 48 db-hz ad a elevatio of 45 degree. 6 Satellite No.13 PLL(2ms,1Hz) 6 Satellite No.13 PLL(2ms,3Hz) Doppler(Hz) 4 2 Doppler(Hz) 4 2 Trackig error(deg) Doppler(Hz) Trackig error(deg) -2 15 3 45 6 75 9 9 45-45 -9 15 3 45 6 75 9 Time(s) 6 4 2 (a) -2 15 3 45 6 75 9 9 45-45 Satellite No.13 MEMS IMU Aided PLL(2ms,3Hz) -9 15 3 45 6 75 9 Time(s) (c) Trackig error(deg) Doppler(Hz) Trackig error(deg) -2 15 3 45 6 75 9 9 45-45 -9 15 3 45 6 75 9 Time(s) 6 4 2 (b) Satellite No.13 FSAS Aided PLL(2ms,3Hz) -2 15 3 45 6 75 9 9 45-45 -9 15 3 45 6 75 9 Time(s) (d) Figure 18. GNSS carrier phase trackig error testig based o the real vehicle test. (a) Normal PLL (2 ms, 1 Hz); (b) ormal PLL (2 ms, 3 Hz); (c) MEMS INS-aided PLL (2 ms, 3 Hz); (d) medium-grade INS-aided PLL (2 ms, 3 Hz). Figure 18 shows the trackig errors of ormal PLLs ad INS-aided PLLs. Figure 18a depicts the trackig error of a ormal secod-order PLL with a itegratio time of 2 ms ad a badwidth of 1 Hz. The trackig error almost has o chage whe the vehicle movemet chages, similar to the simulator testig results i Figure 15a. Although the road vehicle dyamics are small (less tha 5 m/s 2 ), the dyamic trackig error icreases sigificatly whe the badwidth of the ormal PLL is compressed to 3 Hz, as show i Figure 18b, similar to the simulator testig results i Figure 15b. Therefore, if the badwidth of the ormal PLL is compressed to ehace the trackig sesitivity of the carrier phase, its dyamic respose error would icrease, which is cosistet with the ormal PLL s error model, show i Equatio (8). Figure 18c,d respectively depict the trackig error of the MEMS INS-aided PLL ad the medium-grade INS-aided PLL with a itegratio time of 2 ms ad a badwidth of 3 Hz. The carrier phase trackig error does ot icrease with the vehicle dyamics, which is cosistet with the