PRODUCT DESCRIPTION Th SGM7 (singl), SGM7 (dual), SGM7 (singl with shutdown) and SGM74 (quad) ar low nois, low voltag, and low powr oprational amplifirs, that can b dsignd into a wid rang of applications. Th SGM7///4 hav a high Gain- Bandwidth Product of MHz, a slw rat of 8.5V/µs, and a quiscnt currnt of.97ma/amplifir at 5V. Th SGM7 has a powr-down disabl fatur that rducs th supply currnt to 6nA. Th SGM7///4 ar dsignd to provid optimal prformanc in low voltag and low nois systms. Thy provid rail-to-rail output swing into havy loads. Th input common-mod voltag rang includs ground, and th maximum input offst voltag is 4mV for SGM7///4. Thy ar spcifid ovr th xtndd industrial tmpratur rang ( 4 C to +5 C). Th oprating rang is from.5v to 5.5V. Th singl vrsion, SGM7 is availabl in SC7-5, SOT-5 and SO-8 packags. SGM7 is availabl in SOT-6 and SO-8 packags. Th dual vrsion SGM7 is availabl in SO-8 and MSOP-8 packags. Th quad vrsion SGM74 is availabl in SO-4 and TSSOP-4 packags. FEATURES Low Cost Rail-to-Rail Input and Output mv Typical V OS High Gain-Bandwidth Product: MHz High Slw Rat: 8.5V/µs Sttling Tim to.% with V Stp:.6µs Ovrload Rcovry Tim:.4µs Low Nois : 8nV/ Hz Oprats on.5v to 5.5V Supplis Input Voltag Rang = -.V to +5.6V with V S = 5.5V Low Powr.97mA/Amplifir Typical Supply Currnt SGM7 6nA whn Disabld Small Packaging SGM7 Availabl in SC7-5, SOT-5 and SO-8 SGM7 Availabl in MSOP-8 and SO-8 SGM7 Availabl in SOT-6 and SO-8 SGM74 Availabl in TSSOP-4 and SO-4 PIN CONFIGURATIONS (Top Viw) OUT SGM7 5 +VS NC SGM7/7 8 DISABLE (SGM7 ONLY) APPLICATIONS Snsors Audio Activ Filtrs A/D Convrtrs Communications Tst Equipmnt Cllular and Cordlss Phons Laptops and PDAs Photodiod Amplification Battry-Powrd Instrumntation -VS -IN +IN 4 -IN +IN -VS SC7-5 / SOT-5 OUT SGM7 7 6 +VS -VS 5 DISABLE OUT A +IN 4 -IN -IN A SOT-6 +IN A SGM7 +VS OUT A 8 +VS +INB -IN A +IN A -VS 4 7 6 5 OUT B -IN B +IN B -INB OUT B 7 6 4 5 NC = NO CONNECT SO-8 4 5 6 7 SGM74 4 9 8 TSSOP-4 / SO-4 +VS OUT NC OUT D -IND +IND -VS +INC -INC OUTC SO-8 / MSOP-8 REV. B.
PACKAGE/ORDERING INFORMATION MODEL SGM7 SGM7 SGM7 SGM74 ORDER NUMBER PACKAGE DESCRIPTION PACKAGE OPTION MARKING INFORMATION SGM7XC5/TR SC7-5 Tap and Rl, 7 SGM7XN5/TR SOT-5 Tap and Rl, 7 SGM7XS/TR SO-8 Tap and Rl, 5 SGM7XS SGM7XMS/TR MSOP-8 Tap and Rl, SGM7XMS SGM7XS/TR SO-8 Tap and Rl, 5 SGM7XS SGM7XN6/TR SOT-6 Tap and Rl, 7 SGM7XS/TR SO-8 Tap and Rl, 5 SGM7XS SGM74XS4/TR SO-4 Tap and Rl, 5 SGM74XS4 SGM74XTS4/TR TSSOP-4 Tap and Rl, SGM74XTS4 Not: SC7-5 packag is sam as SOT-5 packag. ABSOLUTE MAXIMUM RATINGS Supply Voltag, V+ to V-... 7.5V Common-Mod Input Voltag... ( V S).5V to (+V S) +.5V Storag Tmpratur Rang... 65 to +5 Junction Tmpratur...6 Oprating Tmpratur Rang... 55 to +5 Packag Thrmal Rsistanc @ T A = 5 SC7-5, θ JA... /W SOT-5, θ JA... 9 /W SOT-6, θ JA... 9 /W SO-8, θ JA...5 /W MSOP-8, θ JA... 6 /W Lad Tmpratur Rang (Soldring sc)...6 ESD Suscptibility HBM...5V MM...4V NOTES. Strsss abov thos listd undr Absolut Maximum Ratings may caus prmannt damag to th dvic. This is a strss rating only; functional opration of th dvic at ths or any othr conditions abov thos indicatd in th oprational sction of this spcification is not implid. Exposur to absolut maximum rating conditions for xtndd priods may affct dvic rliability. CAUTION This intgratd circuit can b damagd by ESD if you don t pay attntion to ESD protction. SGMICRO rcommnds that all intgratd circuits b handld with appropriat prcautions. Failur to obsrv propr handling and installation procdurs can caus damag. ESD damag can rang from subtl prformanc dgradation to complt dvic failur. Prcision intgratd circuits may b mor suscptibl to damag bcaus vry small paramtric changs could caus th dvic not to mt its publishd spcifications.
ELECTRICAL CHARACTERISTICS: V S = +5V (At T A = +5, V CM = Vs/, R L = 6Ω, unlss othrwis notd.) SGM7///4 PARAMETER CONDITIONS +5 +5 MIN/MAX OVER TEMPERATURE to -4 to -4 to 7 85 5 UNITS MIN/ MAX INPUT CHARACTERISTICS Input Offst Voltag (V OS ) Input Bias Currnt (I B) Input Offst Currnt (I OS ) Common-Mod Voltag Rang (V CM) Common-Mod Rjction Ratio (CMRR) Opn-Loop Voltag Gain ( A OL ) Input Offst Voltag Drift ( V OS / T ) V S = 5.5V V S = 5.5V, V CM = -.V to 4V V S = 5.5V, V CM = -.V to 5.6V R L = 6Ω,Vo =.5V to 4.85V R L = KΩ,Vo =.5V to 4.95V -. to +5.6 9 86 9. 4 75 64 84 95 4.5 74 64 8 9 4.75 7 6 8 88 5 7.5 6 7 77 mv pa pa V db db db db µv/ MAX MIN MIN MIN MIN OUTPUT CHARACTERISTICS Output Voltag Swing from Rail Output Currnt (I OUT ) Closd-Loop Output Impdanc R L = 6Ω R L = KΩ F = MHz, G = +..5 57 5.7 5 5 5 45 V V ma Ω MIN POWER-DOWN DISABLE Turn-On Tim Turn-Off Tim DISABLE Voltag-Off DISABLE Voltag-On..8.8 µs µs V V MAX MIN POWER SUPPLY Oprating Voltag Rang Powr Supply Rjction Ratio (PSRR) Quiscnt Currnt/ Amplifir (I Q ) Supply Currnt whn Disabld (SGM7 only) V s = +.5 V to + 5.5 V V CM = (-V S) +.5V I OUT =.97.6.5 5.5 8..5 5.5 79.5.5 5.5 78.8.5 5.5 77.8 V V db ma µa MIN MAX MIN MAX MAX DYNAMIC PERFORMANCE Gain-Bandwidth Product (GBP) Phas Margin (φ O ) Full Powr Bandwidth (BW P) Slw Rat (SR) Sttling Tim to.% ( t S) Ovrload Rcovry Tim R L = 6Ω <% distortion G = +, V Output Stp G = +, V Output Stp V IN Gain = Vs 6.5 4 8.5.6.4 MHz dgrs khz V/µs µs µs NOISE PERFORMANCE Voltag Nois Dnsity ( n ) Currnt Nois Dnsity ( i n ) f = khz f = khz f = khz 8 6.4 nv/ Hz nv/ Hz fa/ Hz Spcifications subjct to changs without notic.
ICAL PERFORMANCE CHARACTERISTICS At T A = +5, V CM = Vs/, R L = 6Ω, unlss othrwis notd. Output Voltag (V P-P ) 6 5 4 Closd-Loop Output Voltag Swing V IN = 4.9V P-P T A = 5 R L = KΩ G = + Frquncy (khz) Output Impdanc (Ω) 8 6 4 Output Impdanc vs. Frquncy G = G = G = Frquncy (khz) Positiv Ovrload Rcovry Ngativ Ovrload Rcovry V V -5mV +.5V V S = ±.5V R L = KΩ V IN = 5mV G = V V +.5V -5mV V S = ±.5V R L = KΩ V IN = 5mV G = Tim (5ns/div) Tim (5ns/div) Larg-Signal Stp Rspons Small-Signal Stp Rspons Voltag (V/div) G = + C L = pf R L = KΩ Voltag (5mV/div) G = + C L = pf R L = KΩ Tim (5ns/div) Tim (ns/div) 4
ICAL PERFORMANCE CHARACTERISTICS At T A = +5, V CM = Vs/, R L = 6Ω, unlss othrwis notd. PSRR (db) 8 6 4 PSRR vs. Frquncy Frquncy (khz) CMRR (db) 9 8 7 6 5 4 CMRR vs. Frquncy Frquncy (khz) Small-Signal Ovrshoot (%) 7 6 5 4 Small-Signal Ovrshoot vs. Load Capacitanc R L = kω T A = 5 G = +OS -OS Voltag Nois(nV/ Hz) Input Voltag Nois Spctral Dnsity vs. Frquncy R L = 6Ω Load Capacitanc (pf) Frquncy(Hz) Channl Sparation vs. Frquncy Opn-Loop Gain vs. Tmpratur Channl Sparation (db) 9 8 7 R L = 6Ω T A = 5 G =. k k k Frquncy (khz) Opn Loop Gain (db) R L = KΩ 9 R L = 6Ω 8 7-5 - - 5 7 9 Tmpratur ( ) 5
ICAL PERFORMANCE CHARACTERISTICS At T A = +5, V CM = Vs/, R L = 6Ω, unlss othrwis notd. V S = 5.5V CMRR vs. Tmpratur V CM = -.V to 4V PSRR vs. Tmpratur V S =.5V to 5.5V CMRR (db) 9 8 V CM = -.V to 5.6V PSRR (db) 9 7 8 6-5 - - 5 7 9 7-5 - - 5 7 9 Tmpratur ( ) Tmpratur ( ).4 Supply Currnt vs. Tmpratur Shutdown Currnt vs. Tmpratur Supply Currnt (ma)....9.8.7 V S =.5V V S = V Shutdown Currnt (na) 6 8 4 6 V S = V V S =.5V.6-5 - - 5 7 9 Tmpratur ( ) -5 - - 5 7 9 Tmpratur ( ) Output Voltag (V) 5 4 Output Voltag Swing vs. Output Currnt Sourcing Currnt 5 5-5 Sinking Currnt 4 5 6 7 8 9 Output Currnt (ma) Output Voltag (V) Output Voltag Swing vs. Output Currnt V S = V Sourcing Currnt 5 5-5 Sinking Currnt 4 5 6 Output Currnt (ma) 6
ICAL PERFORMANCE CHARACTERISTICS At T A = +5, V CM = Vs/, R L = 6Ω, unlss othrwis notd. Small-Signal Ovrshoot (%) 7 6 5 4 Small-Signal Ovrshoot vs. Load Capacitanc V S =.7V R L = kω T A = 5 G = +OS -OS Load Capacitanc (pf) Output Impdanc (Ω) 8 6 4 V S =.7V Output Impdanc vs. Frquncy G = G = G = Frquncy (khz) Closd-Loop Output Voltag Swing Channl Sparation vs. Frquncy Output Voltag (V P-P ).5.5.5 V S =.7V V IN =.6V P-P T A = 5 R L = KΩ G = Frquncy (khz) Channl Sparation (db) 9 8 7 V S =.7V R L = 6Ω T A = 5 G =. k k k Frquncy (khz) Larg-Signal Stp Rspons Small-Signal Stp Rspons Voltag (V/div) Vs =.7V G = + C L = pf R L = KΩ Tim(5ns/div) Voltag (5mV/div) Vs =.7V G = + C L = pf R L = KΩ Tim(ns/div) Tim (5ns/div) Tim (ns/div) 7
ICAL PERFORMANCE CHARACTERISTICS At T A = +5, V CM = Vs/, R L = 6Ω, unlss othrwis notd. Prcnt of Amplifirs (%) 7 4 8 5 9 6 Offst Voltag Production Distribution Typical production distribution of packagd units. -4 - - - 4 Offst Voltag (mv) 8
APPLICATION NOTES Driving Capacitiv Loads Th SGM7x can dirctly driv 47pF in unity-gain without oscillation. Th unity-gain followr (buffr) is th most snsitiv configuration to capacitiv loading. Dirct capacitiv loading rducs th phas margin of amplifirs and this rsult in ringing or vn oscillation. Applications that rquir gratr capacitiv driv capability should us an isolation rsistor btwn th output and th capacitiv load lik th circuit in Figur. Th isolation rsistor R ISO and th load capacitor C L form a zro to incras stability. Th biggr th R ISO rsistor valu, th mor stabl V OUT will b. Not that this mthod rsults in a loss of gain accuracy bcaus R ISO forms a voltag dividr with th R LOAD. Powr-Supply Bypassing and Layout Th SGM7x family oprats from ithr a singl +.5V to +5.5V supply or dual ±.5V to ±.75V supplis. For singl-supply opration, bypass th powr supply V DD with a.µf cramic capacitor which should b placd clos to th V DD pin. For dual-supply opration, both th V DD and th V SS supplis should b bypassd to ground with sparat.µf cramic capacitors..µf tantalum capacitor can b addd for bttr prformanc. Good PC board layout tchniqus optimiz prformanc by dcrasing th amount of stray capacitanc at th op amp s inputs and output. To dcras stray capacitanc, minimiz trac lngths and widths by placing xtrnal componnts as clos to th dvic as possibl. Us surfac-mount componnts whnvr possibl. VIN SGM7 RISO CL VOUT For th oprational amplifir, soldring th part to th board dirctly is strongly rcommndd. Try to kp th high frquncy big currnt loop ara small to minimiz th EMI (lctromagntic intrfacing). Figur. Indirctly Driving Havy Capacitiv Load V DD μf V DD μf An improvmnt circuit is shown in Figur. It provids DC accuracy as wll as AC stability. R F provids th DC accuracy by conncting th invrting signal with th output. C F and R ISO srv to countract th loss of phas margin by fding th high frquncy componnt of th output signal back to th amplifir s invrting input, thrby prsrving phas margin in th ovrall fdback loop. Vn Vp SGM7.μF V OUT Vn Vp SGM7.μF μf V OUT C F V SS(GND).μF R F V IN SGM7 R ISO C L R L V OUT Figur. Amplifir with Bypass Capacitors V SS Figur. Indirctly Driving Havy Capacitiv Load with DC Accuracy For no-buffr configuration, thr ar two othrs ways to incras th phas margin: (a) by incrasing th amplifir s gain or (b) by placing a capacitor in paralll with th fdback rsistor to countract th parasitic capacitanc associatd with invrting nod. Grounding A ground plan layr is important for SGM7x circuit dsign. Th lngth of th currnt path spd currnts in an inductiv ground rturn will crat an unwantd voltag nois. Broad ground plan aras will rduc th parasitic inductanc. Input-to-Output Coupling To minimiz capacitiv coupling, th input and output signal tracs should not b paralll. This hlps rduc unwantd positiv fdback. 9
Typical Application Circuits Diffrntial Amplifir Th circuit shown in Figur 4 prforms th diffrnc function. If th rsistors ratios ar qual (R 4 /R = R /R ), thn V OUT = (V P V n ) R / R + V REF. V n V P R R SGM7 V OUT Low Pass Activ Filtr Th low pass filtr shown in Figur 6 has a DC gain of (-R /R ) and th db cornr frquncy is /πr C. Mak sur th filtr is within th bandwidth of th amplifir. Th Larg valus of fdback rsistors can coupl with parasitic capacitanc and caus undsird ffcts such as ringing or oscillation in high-spd amplifirs. Kp rsistors valu as low as possibl and consistnt with output loading considration. R C V REF R 4 Figur 4. Diffrntial Amplifir Instrumntation Amplifir V IN R R SGM7 V OUT Th circuit in Figur 5 prforms th sam function as that in Figur 4 but with th high input impdanc. R =R //R Vn SGM7 R R Figur 6. Low Pass Activ Filtr SGM7 V OUT Vp SGM7 R R 4 V REF Figur 5. Instrumntation Amplifir
PACKAGE OUTLINE DIMENSIONS SC7-5 / SOT-5 b D A A E A L L C θ. E Symbol In Millimtrs In Inchs Min Max Min Max A.9..5.4 A....4 A.9..5.9 b.5.5.6.4 C.8.5..6 D...79.87 E.5.5.45.5 E.5.45.85.96.65.6..4.47.55 L.55REF.REF L.6.46..8 θ 8 8
PACKAGE OUTLINE DIMENSIONS SOT-5 E D b A E A A L L C θ. Symbol In Millimtrs In Inchs Min Max Min Max A.5.5.4.49 A....4 A.5.5.4.45 b..4..6 C...4.8 D.8...9 E.5.7.59.67 E.65.95.4.6.95.7.8..7.79 L.7REF.8REF L..6..4 θ 8 8
PACKAGE OUTLINE DIMENSIONS SOT-6 D L θ. In Millimtrs In Inchs Symbol Min Max Min Max A.5.5.4.49 A....4 A.5.5.4.45 E b A E A A L C b..4..6 C...4.8 D.8...9 E.5.7.59.67 E.65.95.4.6.95.7.8..7.79 L.7REF.8REF L..6..4 θ 8 8
PACKAGE OUTLINE DIMENSIONS SO-8 C D Symbol In Millimtrs In Inchs L Min Max Min Max A.5.75.5.69 A..5.4. A.5.55.5.6 θ E E B A A A B..5.. C.9.5.7. D 4.78 5..88.97 E.8 4..5.57 E 5.8 6..8.48.7.5 L.4.7.6.5 θ 8 8 4
PACKAGE OUTLINE DIMENSIONS MSOP-8 b C E E A L θ A A Symbol In Millimtrs In Inchs Min Max Min Max A.8...47 A....8 A.76.97..8 b.. C.5.6 D.9..4..65.6 E.9..4. E 4.7 5..85. L.4.65.6.6 θ 6 6 D 5
PACKAGE OUTLINE DIMENSIONS SO-4 E E A A A b.5 M θ θ4. b D BASE METAL b WITH PLATING c c INDEX Ф.8 ±. DEP. ±. Ф. ±. BTM E-MARK DEP.±.5 SECTION B -B A L R R h h θ θl θ B B L Symbol In Millimtrs MIN NOM MAX A.5.6.75 A..5.5 A.5.45.65 A.55.65.75 b.6.49 b.5.4.45 c.6.5 c.5..5 D 8.5 8.6 8.7 E 5.8 6. 6. E.8.9 4..7 BSC L.45.6.8 L.4 REF L.5 BSC R.7 R.7 h..4.5 θ 8 θ 6 8 θ 6 8 θ 5 7 9 θ4 5 7 9 6
PACKAGE OUTLINE DIMENSIONS TSSOP-4 E # PIN D + INDEX Φ.±.5. -. DEP A E A A A B B L BASE METAL c c θ S R R L L b b θ θ Symbol In Millimtrs MIN NOM MAX A. A.5.5 A.9..5 A.4.44.54 b..8 b...4 c..9 c...5 D 4.86 4.96 5.6 E 6. 6.4 6.6 E 4. 4.4 4.5.65 BSC L.45.6.75 L L. REF.5 BSC R.9. SECTION B-B R.9 S. θ 8 θ 4 θ 4 4/9 REV. B. SGMICRO is ddicatd to provid high quality and high prformanc analog IC products to customrs. All SGMICRO products mt th highst industry standards with strict and comprhnsiv tst and quality control systms to achiv world-class consistncy and rliability. For information rgarding SGMICRO Corporation and its products, s 7