STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5 N-channel 800 V, 3.5 Ω typ., 2 A Zener-protected SuperMESH 5 Power MOSFET in DPAK, TO-220FP, TO-220 and IPAK packages Datasheet production data TAB Features TAB DPAK 3 TO-220FP 2 3 Order codes V DS R DS(on) max I D P TOT STD2N80K5 45 W STF2N80K5 20 W 800 V 4.5 Ω 2 A STP2N80K5 45 W STU2N80K5 TO-220 2 3 TAB Figure. Internal schematic diagram D(2, TAB) IPAK 3 2 TO-220 worldwide best R DS(on) Worldwide best FOM (figure of merit) Ultra low gate charge 00% avalanche tested Zener-protected Applications Switching applications G() S(3) AM0476v Description These devices are N-channel Power MOSFETs developed using SuperMESH 5 technology. This revolutionary, avalanche-rugged, high voltage Power MOSFET technology is based on an innovative proprietary vertical structure. The result is a drastic reduction in on-resistance and ultra low gate charge for applications which require superior power density and high efficiency. Table. Device summary Order codes Marking Package Packaging STD2N80K5 DPAK Tape and reel STF2N80K5 STP2N80K5 2N80K5 TO-220FP TO-220 Tube STU2N80K5 IPAK February 204 DocID024993 Rev 2 /23 This is information on a product in full production. www.st.com 23
Contents STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5 Contents Electrical ratings............................................ 3 2 Electrical characteristics..................................... 4 2. Electrical characteristics (curves)............................... 6 3 Test circuits.............................................. 9 4 Package mechanical data.................................... 0 5 Packaging information...................................... 20 6 Revision history........................................... 22 2/23 DocID024993 Rev 2
STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5 Electrical ratings Electrical ratings Table 2. Absolute maximum ratings Value Symbol Parameter DPAK, TO-220, IPAK TO-220FP Unit V GS Gate- source voltage 30 V I D Drain current (continuous) at T C = 25 C 2 () A I D Drain current (continuous) at T C = 00 C.3 A (2) I DM Drain current (pulsed) 8 A P TOT Total dissipation at T C = 25 C 45 20 W Max current during repetitive or single pulse I AR 0.5 A avalanche (pulse width limited by T jmax ) E AS dv/dt (3) dv/dt (4) Single pulse avalanche energy (starting T J = 25 C, I D =I AS, V DD = 50 V). For TO-220FP limited by maximum junction temperature. 2. Pulse width limited by safe operating area. 3. I SD 2 A, di/dt 00 A/μs, peak V DS V (BR)DSS 4. V DS 640 V 60.5 mj Peak diode recovery voltage slope 4.5 V/ns MOSFET dv/dt ruggedness 50 V/ns T j Operating junction temperature C -55 to 50 T stg Storage temperature C Table 3. Thermal data Symbol Parameter Value DPAK TO-220FP TO-220 IPAK Unit R thj-case Thermal resistance junction-case 2.78 6.25 2.78 2.78 R thj-pcb Thermal resistance junction-pcb 50 () R thj-amb Thermal resistance junction-amb 62.5 00 C/W. When mounted on FR-4 board of inch², 2 oz Cu. DocID024993 Rev 2 3/23
Electrical characteristics STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5 2 Electrical characteristics (T CASE = 25 C unless otherwise specified). Table 4. On/off states Symbol Parameter Test conditions Min. Typ. Max. Unit V (BR)DSS I DSS Drain-source breakdown voltage (V GS = 0) Zero gate voltage drain current (V GS = 0) I D = ma 800 V V DS = 800 V μa V DS = 800 V T j =25 C 50 μa I GSS Gate body leakage current (V DS = 0) V GS = ± 20 V ±0 μa V GS(th) Gate threshold voltage V DS = V GS, I D = 00 μa 3 4 5 V R DS(on) Static drain-source onresistance V GS = 0 V, I D = A 3.5 4.5 Ω Table 5. Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit C iss Input capacitance - 05 - pf C oss Output capacitance V DS =00 V, f= MHz, V GS =0-8 - pf C rss Reverse transfer capacitance - 0.5 - pf C o(tr) () Equivalent capacitance time related V GS = 0, V DS = 0 to 640 V - 6 - pf (2) Equivalent capacitance C o(er) - 7 - pf energy related R G Intrinsic gate resistance f = MHz, I D =0-8 - Ω Q g Total gate charge - 9.5 - nc Q gs Gate-source charge V DD = 640 V, I D = 2 A V GS =0 V -.5 - nc Q gd Gate-drain charge - 7.5 - nc. Time related is defined as a constant equivalent capacitance giving the same charging time as C oss when V DS increases from 0 to 80% V DSS 2. Energy related is defined as a constant equivalent capacitance giving the same stored energy as C oss when V DS increases from 0 to 80% V DSS 4/23 DocID024993 Rev 2
STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5 Electrical characteristics Table 6. Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit t d(on) Turn-on delay time - 8 - ns t r Rise time V DD = 400 V, I D = A, - 2 - ns t d(off) Turn-off delay time R G =4.7 Ω, V GS =0 V - 9 - ns t f Fall time - 32 - ns Table 7. Source drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit I SD Source-drain current - 2 A () I SDM Source-drain current (pulsed) - 8 A V (2) SD Forward on voltage I SD = 2 A, V GS =0 -.5 V t rr Reverse recovery time - 255 ns Q rr Reverse recovery charge I SD = 2 A, V DD = 60 V di/dt = 00 A/μs, - μc I RRM Reverse recovery current - 8 A t rr Reverse recovery time I SD = 2 A,V DD = 60 V - 285 ns Q rr Reverse recovery charge di/dt=00 A/μs, -.45 μc I RRM Reverse recovery current Tj=50 C - 7.5 A. Pulse width limited by safe operating area 2. Pulsed: pulse duration = 300 μs, duty cycle.5% Table 8. Gate-source Zener diode Symbol Parameter Test conditions Min. Typ. Max. Unit V (BR)GSO Gate-source breakdown voltage I GS = ± ma, I D = 0 30 - - V The built-in back-to-back Zener diodes have been specifically designed to enhance not only the device s ESD capability, but also to make them capable of safely absorbing any voltage transients that may occasionally be applied from gate to source. In this respect, the Zener voltage is appropriate to achieve efficient and cost-effective protection of device integrity. The integrated Zener diodes thus eliminate the need for external components. DocID024993 Rev 2 5/23
Electrical characteristics STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5 2. Electrical characteristics (curves) Figure 2. Safe operating area for DPAK and IPAK Figure 3. Thermal impedance for DPAK and IPAK ID (A) AM8072v 0 0. Operation in this area is Limited by max RDS(on) Tj=50 C Tc=25 C Single pulse 0.0 0. 0 00 VDS(V) 0ms 00µs ms 0ms Figure 4. Safe operating area for TO-220FP Figure 5. Thermal impedance for TO-220FP ID (A) AM8073v 0 0. Operation in this area is Limited by max RDS(on) Tj=50 C Tc=25 C Single pulse 0.0 0. 0 00 VDS(V) 0µs 00µs ms 0ms Figure 6. Safe operating area for TO-220 Figure 7. Thermal impedance for TO-220 ID (A) AM8074v 0. Operation in this area is Limited by max RDS(on) 0µs 00µs ms 0ms Tj=50 C Tc=25 C Single pulse 0.0 0. 0 00 VDS(V) 6/23 DocID024993 Rev 2
STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5 Electrical characteristics Figure 8. Output characteristics Figure 9. Transfer characteristics ID (A) 3.0 VGS=0, V AM8075v ID (A) VDS=20V AM8085v 2.5 9V 2.0.5 8V.0 0.5 7V 6V 0.0 0 2 4 6 8 0 2 4 6 VDS(V) Figure 0. Gate charge vs gate-source voltage 3 2.5 2.5 0.5 0 5 6 7 8 9 0 VGS(V) Figure. Static drain-source on-resistance VGS (V) 2 VDS AM8076v VDS (V) 600 RDS(on) (Ω) 6 VGS=0V AM8077v 0 500 5 8 400 4 6 300 3 4 200 2 2 00 0 0 4 8 2 6 0 Qg(nC) 0 0.0 0.4 0.8.2.6 ID(A) Figure 2. Capacitance variations Figure 3. Output capacitance stored energy C (pf) AM8078v Eoss (µj) AM8079v 00 00 Ciss 2 0 Coss Crss 0. 0. 0 00 VDS(V) 0 0 200 400 600 800 VDS(V) DocID024993 Rev 2 7/23
Electrical characteristics STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5 Figure 4. Normalized gate threshold voltage vs temperature Figure 5. Normalized on-resistance vs temperature VGS(th) (norm).2. ID=00 µa AM8082v RDS(on) (norm) 2.5 ID= A VGS=0 V AM808v 0.9 0.8 2.5 0.7 0.6 0.5 0.4-00 -50 0 50 00 50 TJ( C) 0.5 0-00 -50 0 50 00 50 TJ( C) Figure 6. Normalized V DS vs temperature Figure 7. Source-drain diode forward characteristics VDS (norm). ID=mA AM8083v VSD (V) TJ=-50 C AM8084v.05 0.9 TJ=25 C 0.8 0.95 0.7 TJ=50 C 0.9 0.6 0.85-00 -50 0 50 00 TJ( C) 0.5 0 0.5.5 2 ISD(A) Figure 8. Maximum avalanche energy vs starting T J EAS (mj) 60 AM8086v 50 40 30 20 0 0 0 20 40 60 80 00 20 40 TJ( C) 8/23 DocID024993 Rev 2
STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5 Test circuits 3 Test circuits Figure 9. Switching times test circuit for resistive load Figure 20. Gate charge test circuit VDD VGS VD RG RL D.U.T. 2200 μf 3.3 μf VDD Vi=20V=VGMAX 2200 μf 2V IG=CONST 2.7kΩ 47kΩ 00Ω 00nF D.U.T. kω VG PW 47kΩ PW kω AM0468v AM0469v Figure 2. Test circuit for inductive load switching and diode recovery times Figure 22. Unclamped inductive load test circuit G 25 Ω D S A D.U.T. B A FAST DIODE B A B D L=00μH 3.3 000 μf μf VDD VD ID L 2200 μf 3.3 μf VDD G RG S Vi D.U.T. AM0470v Pw AM047v Figure 23. Unclamped inductive waveform Figure 24. Switching time waveform V(BR)DSS ton toff VD tdon tr tdoff tf ID IDM 0 90% 0% VDS 0% 90% VDD VDD VGS 90% AM0472v 0 0% AM0473v DocID024993 Rev 2 9/23
Package mechanical data STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5 4 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 0/23 DocID024993 Rev 2
STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5 Package mechanical data Figure 25. DPAK (TO-252) type A drawing 0068772_M_type_A DocID024993 Rev 2 /23
Package mechanical data STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5 Table 9. DPAK (TO-252) type A mechanical data Dim. mm Min. Typ. Max. A 2.20 2.40 A 0.90.0 A2 0.03 0.23 b 0.64 0.90 b4 5.20 5.40 c 0.45 0.60 c2 0.48 0.60 D 6.00 6.20 D 5.0 E 6.40 6.60 E 4.70 e 2.28 e 4.40 4.60 H 9.35 0.0 L.00.50 (L) 2.80 L2 0.80 L4 0.60.00 R 0.20 V2 0 8 2/23 DocID024993 Rev 2
STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5 Package mechanical data Figure 26. DPAK (TO-252) type A footprint (a) Footprint_REV_M_type_A a. All dimensions are in millimeters DocID024993 Rev 2 3/23
Package mechanical data STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5 Figure 27. TO-220FP drawing 70250_Rev_K_B 4/23 DocID024993 Rev 2
STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5 Package mechanical data Table 0. TO-220FP mechanical data Dim. mm Min. Typ. Max. A 4.4 4.6 B 2.5 2.7 D 2.5 2.75 E 0.45 0.7 F 0.75 F.5.70 F2.5.70 G 4.95 5.2 G 2.4 2.7 H 0 0.4 L2 6 L3 28.6 30.6 L4 9.8 0.6 L5 2.9 3.6 L6 5.9 6.4 L7 9 9.3 Dia 3 3.2 DocID024993 Rev 2 5/23
Package mechanical data STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5 Figure 28. TO-220 drawing 6/23 DocID024993 Rev 2
STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5 Package mechanical data Table. TO-220 mechanical data Dim. mm Min. Typ. Max. A 4.40 4.60 b 0.6 0.88 b.4.70 c 0.48 0.70 D 5.25 5.75 D.27 E 0 0.40 e 2.40 2.70 e 4.95 5.5 F.23.32 H 6.20 6.60 J 2.40 2.72 L 3 4 L 3.50 3.93 L20 6.40 L30 28.90 P 3.75 3.85 Q 2.65 2.95 DocID024993 Rev 2 7/23
Package mechanical data STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5 Figure 29. IPAK (TO-25) drawing 006877_K 8/23 DocID024993 Rev 2
STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5 Package mechanical data Table 2. IPAK (TO-25) mechanical data DIM mm. min. typ. max. A 2.20 2.40 A 0.90.0 b 0.64 0.90 b2 0.95 b4 5.20 5.40 B5 0.30 c 0.45 0.60 c2 0.48 0.60 D 6.00 6.20 E 6.40 6.60 e 2.28 e 4.40 4.60 H 6.0 L 9.00 9.40 L 0.80.20 L2 0.80.00 V 0 DocID024993 Rev 2 9/23
Packaging information STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5 5 Packaging information Figure 30. Tape for DPAK 0 pitches cumulative tolerance on tape +/- 0.2 mm T Top cover tape P0 D P2 E B K0 B0 F W For machine ref. only including draft and radii concentric around B0 A0 P D User direction of feed R User direction of feed Bending radius AM08852v 20/23 DocID024993 Rev 2
STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5 Packaging information REEL DIMENSIONS Figure 3. Reel for DPAK 40mm min. T Access hole At slot location D B C A N Full radius Tape slot in core for tape start 25 mm min. width G measured at hub AM0885v2 Table 3. DPAK tape and reel mechanical data Tape Reel Dim. mm mm Dim. Min. Max. Min. Max. A0 6.8 7 A 330 B0 0.4 0.6 B.5 B 2. C 2.8 3.2 D.5.6 D 20.2 D.5 G 6.4 8.4 E.65.85 N 50 F 7.4 7.6 T 22.4 K0 2.55 2.75 P0 3.9 4. Base qty. 2500 P 7.9 8. Bulk qty. 2500 P2.9 2. R 40 T 0.25 0.35 W 5.7 6.3 DocID024993 Rev 2 2/23
Revision history STD2N80K5, STF2N80K5, STP2N80K5, STU2N80K5 6 Revision history Table 4. Document revision history Date Revision Changes -Jul-203 First release. 8-Feb-204 2 Added: IPAK package Modified: E AS value in Table 2 Modified: R thj-case in Table 3 Modified: typical values in Table 5, 6 and 7 Added: Section 2.: Electrical characteristics (curves) Updated: Figure 25, 26 and Table 9 Added: Table 2 and Figure 29 Minor text changes 22/23 DocID024993 Rev 2
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