MMUNLT Series Preferred Devices Bias Resistor Transistors PNP Silicon Surface Mount Transistors with Monolithic Bias Resistor Network This new series of digital transistors is designed to replace a single device and its external resistor bias network. The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base-emitter resistor. The BRT eliminates these individual components by integrating them into a single device. The use of a BRT can reduce both system cost and board space. The device is housed in the SOT- package which is designed for low power surface mount applications. Features Simplifies Circuit Design Reduces Board Space Reduces Component Count The SOT- package can be soldered using wave or reflow. The modified gull-winged leads absorb thermal stress during soldering eliminating the possibility of damage to the die. Available in mm embossed tape and reel. PbFree Packages are Available PIN BASE (INPUT) R R SOT CASE STYLE PIN COLLECTOR (OUTPUT) PIN EMITTER (GROUND) MARKING DIAGRAM Ax M MAXIMUM RATINGS (T A = unless otherwise noted) Rating Symbol Value Unit Collector-Base Voltage V CBO Vdc Collector-Emitter Voltage V CEO Vdc Collector Current I C madc THERMAL CHARACTERISTICS Characteristic Symbol Max Unit Total Device Dissipation T A = Derate above Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Lead Junction and Storage, Temperature Range P D (Note ) (Note ). (Note ). (Note ) R JA (Note ) (Note ) R JL 7 (Note ) (Note ) mw mw/ C C/W C/W T J, T stg to + C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.. FR @ Minimum Pad. FR @. x. inch Pad Ax = Device Code x = A L (Refer to page ) M = Date Code* = PbFree Package (Note: Microdot may be in either location) *Date Code orientation may vary depending upon manufacturing location. ORDERING INFORMATION Device Package Shipping MMUNxxLT SOT /Tape & Reel MMUNxxLTG MMUNxxLTG SOT (PbFree) SOT (PbFree) /Tape & Reel MMUNxxLT SOT /Tape & Reel /Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD/D. DEVICE MARKING INFORMATION See specific marking information in the device marking table on page of this data sheet. Preferred devices are recommended choices for future use and best overall value. Semiconductor Components Industries, LLC, December, Rev. 9 Publication Order Number: MMUNLT/D
MMUNLT Series DEVICE MARKING AND RESISTOR VALUES Device* Package Marking R (K) R (K) Shipping MMUNLT, G MMUNLT, G SOT AA /Tape & Reel,/Tape & Reel MMUNLT, G SOT AB /Tape & Reel MMUNLT, G MMUNLT, G MMUNLT, G MMUNLTG SOT AC 7 7 /Tape & Reel,/Tape & Reel SOT AD 7 /Tape & Reel,/Tape & Reel MMUNLT, G SOT AE /Tape & Reel MMUNLT, G SOT AF.7 /Tape & Reel MMUNLT, G (Note ) SOT AG.. /Tape & Reel MMUNLT, G (Note ) SOT AH.. /Tape & Reel MMUNLT, G SOT AJ.7.7 /Tape & Reel MMUNLT, G SOT AK.7 7 /Tape & Reel MMUNLT, G (Note ) SOT AL 7 /Tape & Reel *The G suffix indicates PbFree package available.. New devices. Updated curves to follow in subsequent data sheets. ELECTRICAL CHARACTERISTICS (T A = unless otherwise noted) Characteristic Symbol Min Typ Max Unit OFF CHARACTERISTICS Collector-Base Cutoff Current (V CB = V, I E = ) I CBO nadc Collector-Emitter Cutoff Current (V CE = V, I B = ) I CEO nadc Emitter-Base Cutoff Current MMUNLT, G I EBO. madc (V EB =. V, I C = ) MMUNLT, G MMUNLT, G MMUNLT, G MMUNLT, G MMUNLT, G MMUNLT, G MMUNLT, G MMUNLT, G MMUNLT, G MMUNLT, G....9.9..... Collector-Base Breakdown Voltage (I C = A, I E = ) V (BR)CBO Vdc Collector-Emitter Breakdown Voltage (Note ) (I C =. ma, I B = ). Pulse Test: Pulse Width < s, Duty Cycle <.% V (BR)CEO Vdc
MMUNLT Series ELECTRICAL CHARACTERISTICS (T A = unless otherwise noted) (Continued) Characteristic Symbol Min Typ Max Unit ON CHARACTERISTICS (Note ) DC Current Gain MMUNLT, G (V CE = V, I C =. ma) MMUNLT, G MMUNLT, G MMUNLT, G MMUNLT, G MMUNLT, G MMUNLT, G MMUNLT, G MMUNLT, G MMUNLT, G MMUNLT, G h FE... 7 Collector-Emitter Saturation Voltage (I C = ma, I B =. ma) MMUNLT, G MMUNLT, G MMUNLT, G MMUNLT, G MMUNLT, G (I C = ma, I B = ma) MMUNLT, G MMUNLT, G (I C = ma, I B = ma) MMUNLT, G MMUNLT, G MMUNLT, G MMUNLT, G V CE(sat)........... Vdc Output Voltage (on) (V CC =. V, V B =. V, R L =. k ) MMUNLT, G MMUNLT, G MMUNLT, G MMUNLT, G MMUNLT, G MMUNLT, G MMUNLT, G MMUNLT, G MMUNLT, G MMUNLT, G (V CC =. V, V B =. V, R L =. k ) MMUNLT, G Output Voltage (off) (V CC =. V, V B =. V, R L =. k ) MMUNLT, G MMUNLT, G MMUNLT, G MMUNLT, G MMUNLT, G MMUNLT, G (V CC =. V, V B =. V, R L =. k ) MMUNLT, G MMUNLT, G MMUNLT, G MMUNLT, G (V CC =. V, V B =. V, R L =. k ) MMUNLT, G V OL........... Vdc V OH.9.9.9.9.9.9.9.9.9.9.9 Vdc
MMUNLT Series ELECTRICAL CHARACTERISTICS (T A = unless otherwise noted) (Continued) Characteristic Symbol Min Typ Max Unit ON CHARACTERISTICS (Note ) Input Resistor MMUNLT, G MMUNLT, G MMUNLT, G MMUNLT, G MMUNLT, G MMUNLT, G MMUNLT, G MMUNLT, G MMUNLT, G MMUNLT, G MMUNLT, G R 7...9 7. 7...7.... 7.7...7.7.....9... k Resistor Ratio MMUNLT, G MMUNLT, G MMUNLT, G MMUNLT, G MMUNLT, G MMUNLT, G MMUNLT, G MMUNLT, G MMUNLT, G MMUNLT, G MMUNLT, G R /R....7..............7.......... Pulse Test: Pulse Width < s, Duty Cycle <.%
MMUNLT Series MMUNLT PD, POWER DISSIPATION (MILLIWATTS) R JA = /W - T A, AMBIENT TEMPERATURE ( C) VCE(sat), MAXIMUM COLLECTOR VOLTAGE (VOLTS) I C /I B = T A = -.. Figure. Derating Curve Figure. V CE(sat) versus I C h FE, DC CURRENT GAIN (NORMALIZED) V CE = V T A = - Cob, CAPACITANCE (pf) f = MHz l E = V T A = Figure. DC Current Gain Figure. Output Capacitance IC, COLLECTOR CURRENT (ma) T A = -.. V O = V. 7 9 Figure. Output Current versus Input Voltage Vin, INPUT VOLTAGE (VOLTS) V O =. V T A = -. Figure. Input Voltage versus Output Current
MMUNLT Series MMUNLT VCE(sat), MAXIMUM COLLECTOR VOLTAGE (VOLTS) I C /I B = T A = -.. Figure 7. V CE(sat) versus I C h FE, DC CURRENT GAIN (NORMALIZED) V CE = V T A = - Figure. DC Current Gain Cob, CAPACITANCE (pf) f = MHz l E = V T A = IC, COLLECTOR CURRENT (ma).. T A = - V O = V Figure 9. Output Capacitance. 7 9 Figure. Output Current versus Input Voltage V O =. V Vin, INPUT VOLTAGE (VOLTS) T A = -. Figure. Input Voltage versus Output Current
MMUNLT Series MMUNLT V CE(sat), MAXIMUM COLLECTOR VOLTAGE (VOLTS) I C /I B = T A = -.. h FE, CURRENT GAIN (NORMALIZED) T A = - Figure. V CE(sat) versus I C Figure. DC Current Gain Cob, CAPACITANCE (pf).... f = MHz l E = V T A =.. V O = V T A = - Figure. Output Capacitance. 7 9 Figure. Output Current versus Input Voltage V O = V Vin, INPUT VOLTAGE (VOLTS) T A = -. Figure. Input Voltage versus Output Current 7
MMUNLT Series MMUNLT V CE(sat), MAXIMUM COLLECTOR VOLTAGE (VOLTS) I C /I B = T A = -... Figure 7. V CE(sat) versus I C hfe, DC CURRENT GAIN (NORMALIZED) V CE = V T A = - 7 9 Figure. DC Current Gain. Cob, CAPACITANCE (pf).... f = MHz l E = V T A = IC, COLLECTOR CURRENT (ma) T A = - V O = V Figure 9. Output Capacitance Figure. Output Current versus Input Voltage V O =. V T A = - Vin, INPUT VOLTAGE (VOLTS). Figure. Input Voltage versus Output Current
MMUNLT Series MMUNLT V CE(sat), COLLECTOR VOLTAGE (VOLTS)... I C /I B = h FE, DC CURRENT GAIN T A = V CE = V Figure. V CE(sat) versus I C Figure. DC Current Gain C ob, CAPACITANCE (pf) f = MHz l E = V T A =.. T A = V O = V. 7 9 Figure. Output Capacitance Figure. Output Current versus Input Voltage V O =. V T A =. Figure. Input Voltage versus Output Current 9
MMUNLT Series MMUNLT V CE(sat), COLLECTOR VOLTAGE (VOLTS)... I C /I B = h FE, DC CURRENT GAIN T A = V CE = V Figure 7. V CE(sat) versus I C Figure. DC Current Gain C ob, CAPACITANCE (pf) f = MHz l E = V T A =.. T A = V O = V. 7 9 Figure 9. Output Capacitance Figure. Output Current versus Input Voltage T A = V O =. V. Figure. Input Voltage versus Output Current
MMUNLT Series MMUNLT V CE(sat), COLLECTOR VOLTAGE (VOLTS)... I C /I B = h FE, DC CURRENT GAIN T A = V CE = V Figure. V CE(sat) versus I C Figure. DC Current Gain C ob, CAPACITANCE (pf) f = MHz l E = V T A =.. T A = V O = V. 7 9 Figure. Output Capacitance Figure. Output Current versus Input Voltage T A = V O =. V. Figure. Input Voltage versus Output Current
MMUNLT Series MMUNLT V CE(sat), COLLECTOR VOLTAGE (VOLTS)... I C /I B = h FE, DC CURRENT GAIN T A = V CE = V Figure 7. V CE(sat) versus I C Figure. DC Current Gain C ob, CAPACITANCE (pf) 7 f = MHz l E = V T A =.. T A = V O = V. 7 9 Figure 9. Output Capacitance Figure. Output Current versus Input Voltage + V T A = V O =. V Typical Application for PNP BRTs LOAD. Figure. Input Voltage versus Output Current Figure. Inexpensive, Unregulated Current Source
MMUNLT Series PACKAGE DIMENSIONS SOT (TO) CASE ISSUE AN A E A D e b HE SEE VIEW C L L VIEW C c. NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y.M, 9.. CONTROLLING DIMENSION: INCH.. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL.. THRU 7 AND 9 OBSOLETE, NEW STANDARD. MILLIMETERS INCHES DIM MIN NOM MAX MIN NOM MAX A.9..... A...... b.7..... c.9.....7 D..9.... E....7.. e.7.9..7.7. L...... L...9...9 H E.....9. STYLE : PIN. BASE. EMITTER. COLLECTOR.9.7 SOLDERING FOOTPRINT*.9.7..79.9... SCALE : mm inches *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box, Denver, Colorado 7 USA Phone: 77 or Toll Free USA/Canada Fax: 77 or 7 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 9 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 79 9 Japan Customer Focus Center Phone: 77 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative MMUNLT/D