MUSES9 High Quality Audio J-FET Input Dual Operational Amplifier GENERAL DESCRIPTION The MUSES9 is a high quality audio J-FET input dual operational amplifier, which is optimized for high-end audio, professional audio and portable audio applications. It is suitable for audio preamplifiers, active filters, and line amplifiers. In addition, J-FET input type has advantage of the low input bias current, it is suitable for transimpedance amplifier (I/V converter). PACKAGE OUTLINE MUSES9D (DIP) MUSES9E (SOP JEDEC mil (EMP)) FEATURES Operating Voltage ±.V to ±7V Low Noise nv/ Hz typ. THD.% typ. (Av=) Slew Rate V/µs typ. GBW MHz typ. High Current ma typ.(short-circuit current) J-FET Input Bipolar Technology Package Outline DIP, SOP JEDEC mil DFN-X7 (ESON-X7)(.mm x.mm) PIN CONFIGLATION A MUSES9KX7 (DFN-X7 (ESON-X7)) DIP, SOP JEDEC mil B 7. A OUTPUT. A -INPUT. A +INPUT. V-. B +INPUT. B -INPUT 7. B OUTPUT.V+ DFN-X7 (ESON-X7) APPLICATIONS Portable Audio Home Audio Professional Audio Car Audio Top View A B 7 7 Bottom View Exposed Pad About Exposed Pad Connect the Exposed Pad on the GND. I/V Digital Input DA Converter I/V LPF Buff DAC I/V converter + LPF circuit MUSES and this logo are trademarks of New Japan Radio Co., Ltd. Ver. - -
MUSES9 ABSOLUTE MAXIMUM RATING (Ta=ºC unless otherwise specified) PARAMETER SYMBOL RATING UNIT Supply Voltage V + /V - ± V Differential Input Voltage Range V ID ± V Common Mode Input Voltage Range V ICM ± (Note) V Power Dissipation P D DIP:7 SOP:9 (Note) DFN-X7: 9 (Note) mw 9 (Note) Operating Temperature Range Topr - to + ºC Storage Temperature Range Tstg - to + ºC (Note) For supply Voltages less than ± V, the maximum input voltage is equal to the Supply Voltage. (Note) Mounted on the EIA/JEDEC standard board (. 7..mm, two layer, FR-). DFN is connecting to GND in the center part on the back. (Note) EIA/JEDEC STANDARD Test board (7. x. x.mm, layers, FR-, Applying a thermal via hole to a board based on JEDEC standard JESD-) mounting. The PAD connecting to GND in the center part on the back. (Note) NJM9 is ESD (electrostatic discharge) sensitive device. Therefore, proper ESD precautions are recommended to avoid permanent damage or loss of functionality. RECOMMENDED OPERATING VOLTAGE (Ta=ºC) PARAMETER SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT Supply Voltage V + /V - ±. - ±7 V ELECTRICAL CHARACTERISTICS DC CHARACTERISTICS (V + /V - =±V, Ta=ºC, unless otherwise specified) PARAMETER SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT Supply Current Icc RL=, No Signal - 9 ma Input Offset Voltage V IO R S =Ω, -. mv Input Bias Current I B - pa Input Offset Current I IO - pa Voltage Gain A V R L =kω, Vo=±V - db Voltage Gain A V R L =kω, Vo=±.V - db Voltage Gain A V R L =Ω, Vo=.V - db Common Mode Rejection Ratio CMR V ICM =±.V (Note) - db Supply Voltage Rejection Ratio SVR V + /V - =±. to ±7V (Note) - db Maximum Voltage V OM R L =kω ± ± - V Maximum Voltage V OM R L =kω ±. ±. - V Maximum Voltage V OM R L =Ω ±. ±. - V Common Mode Input Voltage Range V ICM CMR db ±. ± - V (Note) CMR is calculated by specified change in offset voltage. (V ICM =V to +.V, V ICM =V to -.V) (Note) SVR is calculated by specified change in offset voltage. (V + /V - =±. to ±7V) AC CHARACTERISTICS (V + /V - =±V, Ta=ºC, unless otherwise specified) PARAMETER SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT Gain Bandwidth Product GB f=khz - - MHz Unity Gain Frequency f T A V =+, R S =Ω, R L =kω, C L =pf - - MHz Phase Margin Φ M A V =+, R S =Ω, R L =kω, C L =pf - 7 - Deg Equivalent Input Noise Voltage V NI f=khz - - nv/ Hz Equivalent Input Noise Voltage V NI RIAA, R S =.kω, khz, LPF (Note7) -.. μvrms Equivalent Input Noise Voltage V NI f= to khz (Note) -. - μvrms Total Harmonic Distortion THD f=khz, A V =+, Vo=Vrms, R L =kω -. - % Channel Separation CS f=khz, A V =-, R L =kω - - db Slew Rate SR A V =, V IN =Vp-p, R L =kω, C L =pf - - V/us (Note7) DIP and SOP (Note) DFN-X7 - - Ver.
MUSES9 POWER DISSIPATION vs. AMBIENT TEMPERATURE IC is heated by own operation and possibly gets damage when the junction power exceeds the acceptable value called Power Dissipation P D. The dependence of the MUSES9 P D on ambient temperature is shown in Fig. The plots are depended on following two points. The first is P D on ambient temperature ºC, which is the maximum power dissipation. The second is W, which means that the IC cannot radiate any more. Conforming the maximum junction temperature Tjmax to the storage temperature Tstg derives this point. Fig. is drawn by connecting those points and conforming the P D lower than ºC to it on ºC. The P D is shown following formula as a function of the ambient temperature between those points. Dissipation Power P D = Tjmax - Ta ja [W] (Ta=ºC to Ta=ºC) Where, ja is heat thermal resistance which depends on parameters such as package material, frame material and so on. Therefore, P D is different in each package. While, the actual measurement of dissipation power on MUSES9 is obtained using following equation. (Actual Dissipation Power) = (Supply Current Icc) X (Supply Voltage V + V-) ( Power Po) The MUSES9 should be operated in lower than P D of the actual dissipation power. To sustain the steady state operation, take account of the Dissipation Power and thermal design. DFN-X7 layers Fig Power Dissipation Pd [mw] SOP DIP DFN-X7 layers Ambient Temperature Ta [ C] Ver. - -
MUSES9 PACKAGE OUTLINE (DFN-X7) - - Ver.
MUSES9 TYPICAL CARACTERISTICS THD+N vs. Voltage (Frequency) V + /V - =±V, A V =+, R L =k, Ta=ºC THD+N vs. Voltage (Frequency) V + /V - =±.V, A V =+, R L =k, Ta=ºC f=hz THD+N [%]... f=khz f=khz f=khz THD+N [%]... f=khz f=khz... Voltage [Vrms]... Voltage [Vrms] Voltage Noise vs. Frequency V + /V - =±V, A V =+, R S =Ω, R L =, Ta=ºC - Channel Separation vs. Frequency V + /V - =±V, A V =-, R L =kω, Ta=ºC Equivalent Input Noise Voltage [nv/ Hz] Channel Separation [db] - - - - - - - k k k Frequency [Hz] - k k k Frequency [Hz] Gain vs. Frequency V + /V - =±V, A V =+, R L =kω, C L =pf Phase Margin vs. Temperature (Supply Voltage) V + /V - =±V, A V =+, R S =Ω, R L =kω, C L =pf, V IN =-dbm 9 Gain Voltage Gain [db] - - Phase Ta=-ºC Ta=-ºC - -9 - Phase [deg] Phase Margin [deg] 7 V + /V - =±V V + /V - =±.V - - k k M M M Frequency [Hz] - - 7 Ver. - -
MUSES9 TYPICAL CARACTERISTICS Pulse Response V + /V - =±V, Gv=dB, C L =pf, R L =kω, Ta=ºC Input 7 Slew Rate vs. Temperature V + /V - =±V, V IN =V P-P, f=khz, Gv=dB, C L =pf, R L =kω Voltage [V/div] Slew Rate [V/μs] Fall Rise Time [μs/div] - - 7 Supply Current vs. Supply Voltage A V =db Supply Current vs. Temperature (Supply Voltage) A V =db V + /V - =±V Supply Current [ma] Ta=-ºC Supply Current [ma] V + /V - =±.V ± ± ± ± ± Supply Voltage V + /V - [V] - - 7 Input Offset Voltage vs. Supply Voltage V ICM =V, V IN =V. Input Offset Voltage vs. Temperature (Supply Voltage) V ICM =V, V IN =V. Input Offset Voltage [mv].... -. Ta=-ºC Input Offset Voltage [mv].... -. V + /V - =±V V + /V - =±.V -. ± ± ± ± Supply Voltage V + /V - [V] -. - - 7 - - Ver.
MUSES9 TYPICAL CARACTERISTICS. Input Offset Voltage vs. Common Mode Input Voltage V + /V - =±V. Input Offset Voltage vs. Common Mode Input Voltage V + /V - =±.V Input Offset Voltage [mv].... -. Ta=-ºC Input Offset Voltage [mv].... -. Ta=-ºC -. - - - Common Mode Input Voltage [V] -. - - - - Common Mode Input Voltage [V] Input Bias Current vs. Temperature (Supply Voltage) V ICM =V, V + /V - =±V n n Input Bias Current vs. Common Mode Input Voltage V + /V - =±V, Ta=ºC 9 Input Bias Current [A] n n p p Input Bias Current [pa] 7 p - - 7 - - - Common Mode Input Voltage [V] CMR vs. Temperature V + /V - =±V SVR vs. Temperature V ICM =V, V + /V - =±.V ±V Common Mode Rejection Ratio [db] 9 V ICM =-.V V V ICM =V +.V Supply Voltage Rejection Ratio [db] 9 - - 7 - - 7 Ver. - 7 -
MUSES9 TYPICAL CARACTERISTICS Voltage [V] - - Voltage vs. Current V + /V - =±V Isource Isink Ta=-ºC Ta=-ºC Voltage [V] - - - Voltage vs. Current V + /V - =±.V Isource Isink Ta=-ºC Ta=+ºC - k Current [ma] - k Current [ma] Maximum Voltage vs. Load Resistance V + /V - =±V, Gv=open, R L to V Maximum Voltage vs. Load Resistance V + /V - =±.V, Gv=open, R L to V Maximum Voltage [V] - - Ta=-ºC Maximum Voltage [V] - - - Ta=-ºC - k k k Load Resistance [Ω] - k k k Load Resistance [Ω] - - Ver.
MUSES9 APPLICATION CIRCUIT Input Gain Stage Att Buff AD Converter Digital Digital Input DA Converter I/V I/V LPF Buff (Fig.: ADC Input) (Fig.:DAC ) L-ch. Intput L-ch. R-ch. Intput R-ch. DAC HPF Vcc /Vcc /Vcc (Fig.: Half Vcc Buffer on Single Supply Application) (Fig.:DAC LPF Circuit ) NOTE Precaution for counterfeit semiconductor products We have recently detected many counterfeit semiconductor products that have very similar appearances to our operational amplifier MUSES in the world-wide market.in most cases, it is hard to distinguish them from our regular products by their appearance, and some of them have very poor quality and performance. They can not provide equivalent quality of our regular product, and they may cause breakdowns or malfunctions if used in your systems or applications. We would like our customers to purchase MUSES through our official sales channels : our sales branches, sales subsidiaries and distributors. Please note that we hold no responsibilities for any malfunctions or damages caused by using counterfeit products. We would appreciate your understanding. <CAUTION> The specifications on this data book are only given for information, without any guarantee as regards either mistakes or omissions. The application circuits in this data book are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights. Ver. - 9 -