Switched apacitor oncepts & ircuits
Outline Why Switched apacitor circuits? Historical Perspective Basic Building Blocks Switched apacitors as Resistors Switched apacitor Integrators Discrete time & charge transfer concepts Parasitic insensitive circuits Signal Flow Graphs Switched apacitor Filters omparison to Active R filters Advantages of Fully Differential filters Switched apacitor Gain ircuits Reducing the Effects of harge Injection Tradeoff between Speed and harge Injection
Why Switched apacitor ircuits? Historical Perspective As MOS processes came to the forefront in the late 970s and early 980s, the advantages of integrating analog blocks such as active filters on the same chip with digital logic became a driving force for inovation. Integrating active filters using resistors and capacitors to acturately set time constants has always been difficult, because of large process variations (> +/- 30%) and the fact that resistors and capacitors don t naturally match each other. So, analog engineers turned to the building blocks native to MOS processes to build their circuits, switches & capacitors. Since time constants can be set by the ratio of capacitors, very accurate filter responses became possible using switched capacitor techniques Mixed-Signal Design was born!
Switched apacitor Building Blocks apacitors: poly-poly, MiM, metal sandwich & finger caps Switches: NMOS, PMOS, T-gate Op Amps: at first all NMOS designs, now MOS
Non-Overlapping locks Non-overlapping clocks are used to insure that one set of switches turns off before the next set turns on, so that charge only flows where intended. ( break before make ) Note the notation used to indicate time based on clock periods:... (n-)t, (n-½)t, nt, (n+½)t, (n+)t...
Switched apacitors as Resistors I = dq/dt = q/ t = (V V 2 )/T where T = clock period compare this to: I = (V V 2 )/R eq R eq = T/ or R eq = /fs
Switched apacitors as Resistors (cont.)
Switched apacitor Integrator The resistor input of a traditional op amp integrator is replaced by a switched capacitor resistor This S integrator operates in discrete time increments, first sampling the input signal onto, and then switching to transfer this charge onto 2 : Q (n-) = V i (n-) and Q 2 (n-½) = Q 2 (n-) - Q (n-) V o (n) = V o (n-½) = Q 2 (n-½)/ 2 = V o (n-) - ( / 2 ) V i (n-) V o (z) = z - V o (z) - ( / 2 ) z - V i (z) H(z) = -( / 2 )/(z-)
Switched apacitor Integrator (cont.)
Effect of Parasitic apacitors p2 and p3 cause no errors because they are in parallel with ground and virtual ground, respectively, and so remain uncharged. p4 does increase the load capacitance that the op amp must drive, but causes no errors. p, the parasitic cap associated with the top plate of,appears directly in parallel with and changes the transfer function to : H(z) + = 2 p z
Parasitic Insensitive Integrators During clock phase, is charged to the input voltage During clock phase 2, this charge is transferred to 2 However, since the + side of is tied to ground, this results in a non-inverting transfer function : H(z) = 2 z
Parasitic Insensitive Integrators (cont.) p2, p3 are in parallel with ground or virtual ground and p4 is in parallel with the output, so they cause no errors. In this circuit, p is once again charged to the input voltage on clock phase. However, this time p is discharged to ground on clock phase 2. Since no error charge is transferred to 2, the transfer function is insensitive to this parasitic cap and remains unchanged.
Parasitic Insensitive Integrators (cont.) Similar to the previous circuit, just the clock phases changed ( ) ( ) ( ) ( ) ( ) ( ) () () () () () () = = = = = = z z z z V z V H z z V z V z z V n V n V n V n V n V n V 2 2 i O i 2 O O i 2 O O i O 2 O 2
Signal Flow Graphs an be used to show a function symbolically Sometimes easier than keeping track of charge movement for a complicated circuit (e.g., S filters) The example shown is just a superposition of our previous 2 cases, plus a non-switched capacitor input
Switched apacitor Filters Take an active R filter and replace the R s with S equivalents () H z = + 2 A + 3 A z z A
substituting z = e jωt = cos(ωt) + jsin(ωt) into H(z) and solving assuming ωt << 3 A jωpt = eq. 0.42 3 + 2 A
For cases where we can t assume that ωt <<, we have to pre-warp the pole/zero frequencies to convert from the s-domain to z-domain using Ω = tan(ω/2) This makes use of the bilinear transform p = (z )/(z + ) where p = σ p + jω Note that this maps the unit circle in the z-domain onto the jω-axis
Switched apacitor Filters (cont.) This circuit is identical to the previous one, except the switches on the left side of 3 are now being shared with the switches on the right side of 2 to reduce area and wiring complexity
Fully Differential S Filters Key Advantages of fully differential circuits : Noise appears as a common-mode signal Even-order distortion terms cancel
Switched apacitor Gain ircuits H(z) = V V out in ( z) () z = K
S Gain ircuits with Reset Voltage gain = - / 2 Output is reset every clock period during Φ 2 ancels offset by storing V os on and 2 during reset But, the op amp must : Be able to slew fast Be stable for unity gain
S Gain ircuits with Reset (cont.) Very similar to previous circuit, with V os cancellation and gain = - / 2, except V out is stored on 3, which is used during reset to keep the output voltage from needing to slew down to 0V 4 is an optional deglitching cap sometimes used to provide feedback during the clock s non-overlap time
Quazi-Differential S ircuits By including a replica of all caps and switches on the op amp s + input, a single-ended circuit can be made to appear quazi-differential, thus making charge injection errors look common-mode (max improvement ~ 20dB) Also provides differential to single-ended conversion
Reducing the Effects of harge Injection harge injection errors can be greatly reduced by the used of advanced clocks, which switch just slightly earlier than the main clocks Once Q 3,4 above turn off, one side of 2,3 is an open circuit the charge injected by the other switches can t change the charge stored on these caps! Still have charge injection from Q 3,4, but since these are tied to a virtual ground this just looks like an offset
Tradeoff between Speed & harge Injection For high speed, we need to use large switches to settle fast, but this means more charge injection! T 2 R f > 5R ON LK = ON µ µ V 5L OX QH VERR = 2 substituting < ERR 2 f LK < 0R W VON L WLOXV = 2 ON ON
Tradeoff between Speed & harge Injection Note that this result is independent of cap size and supply voltage, and is proportional to /L 2 Big improvements as we scale to smaller processes!