Fast Transient Response Using Small Output Capacitor ( µf) 2-mA Low-Dropout Voltage Regulator Available in.5-v,.8-v, 2.5-V, 3-V and 3.3-V Dropout Voltage Down to 7 mv at 2 ma () 3% Tolerance Over Specified Conditions 8-Pin SOIC Package Thermal Shutdown Protection TPS745, TPS748, TPS7425, TPS743, 2-mA LOW-DROPOUT VOLTAGE REGULATORS EN NC NC D PACKAGE (TOP VIEW) 2 3 4 8 7 6 5 SENSE OUT GND NC No internal connection description This device is designed to have a fast transient response and be stable with -µf capacitors. This combination provides high performance at a reasonable cost. Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 7 mv at an output current of 2-mA for the ). This LDO family also features a sleep mode; applying a TTL high signal to EN (enable) shuts down the regulator, reducing the quiescent current to less than µa at T J = 25 C. The TPS74xx is offered in.5-v,.8-v, 2.5-V, 3-V, and 3.3-V. Output voltage tolerance is specified as a maximum of 3% over line, load, and temperature ranges. The TPS74xx family is available in 8 pin SOIC package. DROPOUT VOLTAGE JUNCTION TEMPERATURE TPS748 LOAD TRANSIENT RESPONSE V DO Dropout Voltage mv 3 25 2 5 5 5 VI = 3.2 V IO = 2 ma IO = 75 ma IO = 5 ma IO = ma 25 25 5 75 25 5 TJ Junction Temperature C VO Change in Output Voltage mv I O Output Current ma 5 5 2 di/dt = 2 ma 25 µs CO = µf 2 3 4 5 6 7 8 9 t Time µs Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 999, Texas Instruments Incorporated POST OFFICE BOX 65533 DALLAS, TEXAS 75265
TPS745, TPS748, TPS7425, TPS743, 2-mA LOW-DROPOUT VOLTAGE REGULATORS TJ AVAILABLE OPTIONS OUTPUT VOLTAGE PACKAGED DEVICES (V) SOIC TYP (D) 3.3 D 3 TPS743D 4 C to 25 C 2.5 TPS7425D.8 TPS748D.5 TPS745D The D package is available taped and reeled. Add an R suffix to the device type (e.g., DR). TPS74xx VI 4 5 SENSE 8 SENSE µf OUT EN GND 7 VO CO + µf 6 ESR See application information section for capacitor selection details. Figure. Typical Application Configuration functional block diagram EN _ + OUT Vref R SENSE R2 GND 2 POST OFFICE BOX 65533 DALLAS, TEXAS 75265
TPS745, TPS748, TPS7425, TPS743, 2-mA LOW-DROPOUT VOLTAGE REGULATORS Terminal Functions TERMAL NAME NO. I/O EN I Enable input GND 6 Regulator ground 4, 5 I Input voltage NC 2, 3 Not connected OUT 7 O Regulated output voltage SENSE 8 I Sense DESCRIPTION absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Input voltage range, V I..............................................................3 V to 8 V Voltage range at EN............................................................3 V to V I +.3 V Peak output current.............................................................. Internally limited Continuous total power dissipation...................................... See dissipation rating tables Operating virtual junction temperature range, T J..................................... 4 C to 25 C Storage temperature range, T stg................................................... 65 C to 5 C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to network terminal ground. PACKAGE D AIR FLOW (CFM) DISSIPATION RATG TABLE FREE-AIR TEMPERATURES TA < 25 C POWER RATG DERATG FACTOR ABOVE TA = 25 C TA = 7 C POWER RATG TA = 85 C POWER RATG 568 mw 5.68 mw/ C 32 mw 227 mw 25 94 mw 9.4 mw/ C 497 mw 36 mw recommended operating conditions M MAX UNIT Input voltage, VI 2.5 7 V Output current, IO (see Note ) 2 ma Operating virtual junction temperature, TJ (see Note ) 4 25 C To calculate the minimum input voltage for your maximum output current, use the following equation: VI(min) = VO(max) + VDO(max load). NOTE : Continuous current and operating junction temperature are limited by internal protection circuitry, but it is not recommended that the device operate under conditions beyond those specified in this table for extended periods of time. POST OFFICE BOX 65533 DALLAS, TEXAS 75265 3
TPS745, TPS748, TPS7425, TPS743, 2-mA LOW-DROPOUT VOLTAGE REGULATORS electrical characteristics over recommended operating free-air temperature range, V i = V O(typ) + V, I O = ma, EN = V, C O = µf (unless otherwise noted) Output voltage ( µa to 2 ma load) (see Note 2) PARAMETER TEST CONDITIONS TEST CONDITIONS M TYP MAX UNIT TPS745 TPS748 TPS7425 TPS743 2.5 V < VI < 7 V 2.8 V < VI < 7 V 3.5 V < VI < 7 V 4. V < VI < 7 V 4.3 V < VI < 7 V IO = ma, EN = V Quiescent current (GND current) (See Note 2) IO = ma, EN = V Output voltage line regulation ( VO/VO) (see Notes 2 and 3) TJ = 25 C.5 TJ = 4 C to 25 C.455.545 TJ = 25 C.8 TJ = 4 C to 25 C.746.854 TJ = 25 C 2.5 TJ = 4 C to 25 C 2.425 2.575 TJ = 25 C 3. TJ = 4 C to 25 C 2.9 3.9 TJ = 25 C 3.3 TJ = 4 C to 25 C 3.2 3.399 TJ = 25 C 8 TJ = 4 C to 25 C 5 TJ = 25 C 55 TJ = 4 C to 25 C 85 =2mA EN=V T J = 25 C 3 IO ma, T J = 4 C to 25 C 5 VO + V < VI 7 V, TJ = 25 C.6 %/V Load regulation 5 mv Output noise voltage BW = 3 Hz to 5 khz, TJ = 25 C CO = µf, V µa µa µa 9 µvrms Output current Limit VO = V 5 75 ma Thermal shutdown junction temperature 5 C Standby current 2.5 V < VI < 7 V, TJ = 25 C 2.5 V < VI < 7 V, TJ = 4 C to 25 C EN = VI, EN = VI, µa 3 µa High level enable input voltage 2 V Low level enable input voltage.7 V Input current (EN) Power supply ripple rejection (see Note 2) Dropout voltage (see Note 4) TPS743 EN = V EN = VI f = Hz, TJ = 25 C CO = µf, IO = 2 ma, TJ = 25 C 8 µa 55 db IO = 2 ma, TJ = 4 C to 25 C 35 IO = 2 ma, TJ = 25 C 7 IO = 2 ma, TJ = 4 C to 25 C 35 NOTES: 2. Minimum operating voltage is 2.5 V or VO(typ) + V, whichever is greater. Maximum voltage 7 V. 3. If VO =.5 V then Vimax = 7 V, Vimin = 2.5 V: 4. voltage equals VO(Typ) mv; TPS743 and dropout limited by input voltage range limitations (i.e., TPS743 input voltage needs to drop to 2.9 V for purpose of this test). V.V 2.5 O imax V. Line Reg. (mv).% V. If VO 2.5 V then Vimax = 7 V, Vimin = VO + V: V.V.V O imax O V.. Line Reg. (mv).% V. mv 4 POST OFFICE BOX 65533 DALLAS, TEXAS 75265
VO Output voltage TPS745, TPS748, TPS7425, TPS743, 2-mA LOW-DROPOUT VOLTAGE REGULATORS Table of Graphs FIGURE Output current 2, 3, 4 Junction temperature 5, 6 Ground current Junction temperature 7, 8 Power supply ripple rejection Frequency 2 Output noise Frequency 9 Zo Output impedance Frequency VDO Dropout voltage Junction temperature Line transient response 3, 5 Load transient response 4, 6 Output voltage Time 7 (Stability) Equivalent series resistance (ESR) Output current 9 TYPICAL CHARACTERISTICS.8 VI = 2.8 V TA = 25 C TPS748 OUTPUT VOLTAGE OUTPUT CURRENT 3.3 OUTPUT VOLTAGE OUTPUT CURRENT VI = 4.3 V TA = 25 C V O Output Voltage V.85.8 V O Output Voltage V 3.35.795 5 5 2 25 IO Output Current ma Figure 2 3.3 5 5 2 25 IO Output Current ma Figure 3 POST OFFICE BOX 65533 DALLAS, TEXAS 75265 5
TPS745, TPS748, TPS7425, TPS743, 2-mA LOW-DROPOUT VOLTAGE REGULATORS TYPICAL CHARACTERISTICS 2.5 2.498 VI = 3.5 V TA = 25 C TPS7425 OUTPUT VOLTAGE OUTPUT CURRENT.82.88.86 VI = 4. V TPS748 OUTPUT VOLTAGE JUNCTION TEMPERATURE V O Output Voltage V 2.496 2.494 2.492 V O Output Voltage V.84.82.8.88.86 IO = ma IO = 5 ma IO = ma 2.49 5 5 2 25 IO Output Current ma Figure 4.84 IO = 2 ma.82 5 25 25 5 75 25 5 TJ Junction Temperature C Figure 5 OUTPUT VOLTAGE JUNCTION TEMPERATURE TPS748 GROUND CURRENT JUNCTION TEMPERATURE 3.33 3.325 VI = 4.3 V VI = 2.8 V 3.32 IO = 2 ma V O Output Voltage V 3.35 3.3 3.35 3.3 3.295 IO = ma IO = 5 ma IO = ma Ground Current µ A IO = ma IO = ma 3.29 IO = 2 ma 3.285 5 25 25 5 75 25 5 TJ Junction Temperature C Figure 6 5 5 5 TJ Junction Temperature C Figure 7 6 POST OFFICE BOX 65533 DALLAS, TEXAS 75265
TPS745, TPS748, TPS7425, TPS743, 2-mA LOW-DROPOUT VOLTAGE REGULATORS TYPICAL CHARACTERISTICS GROUND CURRENT JUNCTION TEMPERATURE OUTPUT SPECTRAL NOISE DENSITY FREQUENCY Ground Current µ A VI =4.3 V IO = 2 ma IO = ma IO = ma Output Spectral Noise Density 2 µv2hz 2µV2Hz 2 nv 2Hz 2nV 2Hz IO = ma IO = 2 ma VI = 4.3 V CL = µf TA = 25 C 5 5 5 TJ Junction Temperature C Figure 8 2nV2Hz 25 k k k f Frequency Hz Figure 9 Zo Output Impedance Ω. VI = 4.3 V CL = µf TA = 25 C OUTPUT IMPEDANCE FREQUENCY CL = µf: IO = ma CL = µf IO = 2 ma V DO Dropout Voltage mv 25 2 5 5 VI = 2.9 V TPS743 DROPOUT VOLTAGE JUNCTION TEMPERATURE 2 ma ma ma... f Frequency khz Figure 4 6 TJ Junction Temperature C Figure POST OFFICE BOX 65533 DALLAS, TEXAS 75265 7
TPS745, TPS748, TPS7425, TPS743, 2-mA LOW-DROPOUT VOLTAGE REGULATORS 8 TYPICAL CHARACTERISTICS RIPPLE REJECTION FREQUENCY 7 Ripple Rejection db 6 5 4 3 CL = µf IO = 2 ma CL = µf IO = ma CL = µf IO = ma 2 k k k M M f Frequency Hz Figure 2 TPS748 LE TRANSIENT RESPONSE TPS748 LOAD TRANSIENT RESPONSE Input Voltage V VO Change in Output Voltage mv 2 2 3 3.8 2.8 CO = µf VO Change in Output Voltage mv I O Output Current ma 5 5 2 di/dt = 2 ma 25 µs CO = µf V I..2.3.4.5.6.7.8.9..2.3.4.5.6.7.8.9 t Time ms t Time ms Figure 3 Figure 4 8 POST OFFICE BOX 65533 DALLAS, TEXAS 75265
TPS745, TPS748, TPS7425, TPS743, 2-mA LOW-DROPOUT VOLTAGE REGULATORS TYPICAL CHARACTERISTICS LE TRANSIENT RESPONSE LOAD TRANSIENT RESPONSE V I Input Voltage V VO Change in Output Voltage mv 2 2 5.3 4.3 CO = µf..2.3.4.5.6.7.8.9 t Time ms VO Change in Output Voltage mv I O Output Current ma 5 5 5 2 CO = µf di/dt = 2 ma 25 µs..2.3.4.5.6.7.8.9 t Time ms Figure 5 Figure 6 OUTPUT VOLTAGE TIME (AT STARTUP) V O Output Voltage V 4 2 5 VI = 7 V Enable Pulse V.2.4.6.8.2.4.6.8 2 t Time ms Figure 7 POST OFFICE BOX 65533 DALLAS, TEXAS 75265 9
TPS745, TPS748, TPS7425, TPS743, 2-mA LOW-DROPOUT VOLTAGE REGULATORS TYPICAL CHARACTERISTICS VI OUT To Load EN GND + CO ESR RL Figure 8. Test Circuit for Typical Regions of Stability (Figure 9) ESR Equivalent Series Resistance Ω. TYPICAL REGIONS OF STABILITY EQUIVALENT SERIES RESISTANCE (ESR) OUTPUT CURRENT Region of Instability. 5 5 2 IO Output Current ma Figure 9 ESR refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally, and PWB trace resistance to CO. POST OFFICE BOX 65533 DALLAS, TEXAS 75265
TPS745, TPS748, TPS7425, TPS743, 2-mA LOW-DROPOUT VOLTAGE REGULATORS APPLICATION FORMATION The TPS74xx family includes five voltage regulators (.5 V,.8 V, 2.5 V, 3 V, and 3.3 V). minimum load requirements The TPS74xx family is stable even at zero load; no minimum load is required for operation. SENSE terminal connection The SENSE terminal must be connected to the regulator output for proper functioning of the regulator. Normally, this connection should be as short as possible; however, the connection can be made near a critical circuit (remote sense) to improve performance at that point. Internally, SENSE connects to a high-impedance wide-bandwidth amplifier through a resistor-divider network and noise pickup feeds through to the regulator output. Routing the SENSE connection to minimize/avoid noise pickup is essential. Adding an RC network between SENSE and OUT to filter noise is not recommended because it can cause the regulator to oscillate. external capacitor requirements An input capacitor is not usually required; however, a ceramic bypass capacitor ( µf or larger) improves load transient response and noise rejection if the TPS74xx is located more than a few inches from the power supply. A higher-capacitance electrolytic capacitor may be necessary if large (hundreds of milliamps) load transients with fast rise times are anticipated. Like all low dropout regulators, the TPS74xx requires an output capacitor connected between OUT and GND to stabilize the internal control loop. The minimum recommended capacitance value is µf and the ESR (equivalent series resistance) must be at least 3 mω. Solid tantalum electrolytic and aluminum electrolytic are all suitable, provided they meet the requirements described previously. VI µf 4 5 EN TPS74xx SENSE GND 6 OUT 8 7 ESR VO CO + µf SENSE regulator protection Figure 2. Typical Application Circuit The TPS74xx PMOS-pass transistor has a built-in back diode that conducts reverse currents when the input voltage drops below the output voltage (e.g., during power down). Current is conducted from the output to the input and is not internally limited. When extended reverse voltage is anticipated, external limiting may be appropriate. POST OFFICE BOX 65533 DALLAS, TEXAS 75265
TPS745, TPS748, TPS7425, TPS743, 2-mA LOW-DROPOUT VOLTAGE REGULATORS regulator protection (continued) APPLICATION FORMATION The TPS74xx also features internal current limiting and thermal protection. During normal operation, the TPS74xx limits output current to approximately 5 ma. When current limiting engages, the output voltage scales back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device failure, care should be taken not to exceed the power dissipation ratings of the package. If the temperature of the device exceeds 5 C(typ), thermal-protection circuitry shuts it down. Once the device has cooled below 3 C (typ), regulator operation resumes. power dissipation and junction temperature Specified regulator operation is assured to a junction temperature of 25 C; the maximum junction temperature should be restricted to 25 C under normal operating conditions. This restriction limits the power dissipation the regulator can handle in any given application. To ensure the junction temperature is within acceptable limits, calculate the maximum allowable dissipation, P D(max), and the actual dissipation, P D, which must be less than or equal to P D(max). The maximum-power-dissipation limit is determined using the following equation: P D(max) T J max T A R JA Where T J max is the maximum allowable junction temperature. R θja is the thermal resistance junction-to-ambient for the package, i.e., 72 C/W for the 8-terminal SOIC. T A is the ambient temperature. The regulator dissipation is calculated using: P D.V I V O. I O Power dissipation resulting from quiescent current is negligible. Excessive power dissipation will trigger the thermal protection circuit. 2 POST OFFICE BOX 65533 DALLAS, TEXAS 75265
TPS745, TPS748, TPS7425, TPS743, 2-mA LOW-DROPOUT VOLTAGE REGULATORS D (R-PDSO-G**) 4 P SHOWN MECHANICAL DATA PLASTIC SMALL-OUTLE PACKAGE 4.5 (,27).2 (,5).4 (,35) 8. (,25) M PS ** DIM A MAX A M 8.97 (5,).89 (4,8) 4.344 (8,75).337 (8,55) 6.394 (,).386 (9,8).57 (4,).5 (3,8).244 (6,2).228 (5,8).8 (,2) NOM 7 Gage Plane A. (,25) 8.44 (,2).6 (,4) Seating Plane.69 (,75) MAX. (,25).4 (,).4 (,) 4447/ B 3/95 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion, not to exceed.6 (,5). D. Four center pins are connected to die mount pad. E. Falls within JEDEC MS-2 POST OFFICE BOX 65533 DALLAS, TEXAS 75265 3
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