TPS2816, TPS2817, TPS2818, TPS2819, TPS2828, TPS2829 SINGLE-CHANNEL HIGH-SPEED MOSFET DRIVER

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1 Low-Cost Single-Channel High-Speed MOSFET Driver I CC...-µA Max (TPS88, TPS89) -ns Max Rise/Fall Times and 0-ns Max Propagation Delay...-nF Load -A Peak Output Current -V to -V Driver Supply Voltage Range; Internal Regulator Extends Range to 0 V (TPS86, TPS87, TPS88, TPS89) -pin SOT- Package 0 C to C Ambient-Temperature Operating Range Highly Resistant to Latch-ups description GND The TPS8xx single-channel high-speed MOS- FET drivers are capable of delivering peak IN OUT currents of up to A into highly capacitive loads. High switching speeds (t r and t f = ns typ) are NC No internal connection obtained with the use of BiCMOS outputs. Typical threshold switching voltages are / and / of V CC. The design inherently minimizes shootthrough current. A regulator is provided on TPS86 through TPS89 devices to allow operation with supply inputs between V and 0 V. The regulator output can be used to power other circuits, provided power dissipation does not exceed package limitations. If the regulator is not required, V DD (the regulator input) should be connected to V CC. The TPS86 and TPS87 input circuits include an active pullup circuit to eliminate the need for an external resistor when using open-collector PWM controllers. The TPS88 and TPS89 are identical to the TPS86 and TPS87, except that the active pullup circuit is omitted. The TPS88 and TPS89 are identical to the TPS88 and TPS89, except that the internal voltage regulator is omitted, allowing quiescent current to drop to less than µa when the inputs are high or low. The TPS8xx series devices are available in -pin SOT- (DBV) packages and operate over an ambient temperature range of 0 C to C. TA 0 C to C AVAILABLE OPTIONS FUNCTION PACKAGED DEVICES SOT- (DBV) CHIP FORM (Y) Inverting driver with active pullup input TPS86DBV TPS86Y Noninverting driver with active pullup input TPS87DBV TPS87Y Inverting driver TPS88DBV TPS88Y Noninverting driver TPS89DBV TPS89Y Inverting driver, no regulator TPS88DBV TPS88Y Noninverting driver, no regulator TPS89DBV TPS89Y The DBV package is available taped and reeled only. VDD GND IN NC TPS86, TPS87 TPS88, TPS89 DBV PACKAGE (TOP VIEW) TPS88, TPS89 DBV PACKAGE (TOP VIEW) OUT Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 997, Texas Instruments Incorporated POST OFFICE BOX 60 DALLAS, TEXAS 76

2 functional block diagram TPS86, TPS88 TPS87, TPS89 VDD VREG VDD VREG Active Pullup (TPS86 Only) Active Pullup (TPS87 Only) IN OUT IN OUT GND GND TPS88 TPS89 IN OUT IN OUT GND GND INPUT STAGE DIAGRAM OUTPUT STAGE DIAGRAM Predrive IN To Drive Stage OUT POST OFFICE BOX 60 DALLAS, TEXAS 76

3 TPS8xxY chip information This chip, when properly assembled, displays characteristics similar to those of the TPS8xx. Thermal compression or ultrasonic bonding may be used on the doped aluminum bonding pads. The chip may be mounted with conductive epoxy or a gold-silicon preform. BONDING PAD ASSIGNMENTS () () OUT GND IN () () () TPS86Y () () VDD 9 () () () TPS86 through TPS89 only CHIP THICKNESS: TYPICAL BONDING PADS: MINIMUM TJ max = 0 C TOLERANCES ARE ±0%. ALL DIMENSIONS ARE IN MILS. 9 Terminal Functions TPS86, TPS88, TPS88 (inverting driver) TERMINAL NAME NO. DESCRIPTION VDD Regulator supply voltage input. (Not connected on TPS88) GND Ground IN Driver input. OUT Driver output, OUT = IN Driver supply voltage/regulator output voltage TPS87, TPS89, TPS89 (noninverting driver) TERMINAL NAME NO. DESCRIPTION VDD Regulator supply voltage input. (Not connected on TPS89) GND Ground IN Driver input. OUT Driver output, OUT= IN Driver supply voltage/regulator output voltage POST OFFICE BOX 60 DALLAS, TEXAS 76

4 PACKAGE TA C POWER RATING DISSIPATION RATING TABLE DERATING FACTOR ABOVE TA = C TA = 70 C POWER RATING TA = 80 C POWER RATING DBV 7 mw. mw/ C 80 mw 7 mw These dissipation ratings are based upon EIA specification JESD-, Low Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages, in tests conducted in a zero-airflow, wind tunnel environment. absolute maximum ratings over operating temperature range (unless otherwise noted) Regulator supply voltage range, V DD V to V Supply voltage range, V CC V to V Input voltage range, IN V to V Continuous regulator output current, V CC ma Continuous output current, OUT ±00 ma Continuous total power dissipation See Dissipation Rating Table Operating ambient temperature range, T A C to C Storage temperature range, T stg C to 0 C Lead temperature,6 mm (/6inch) from case for 0 seconds C Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE : All voltages are with respect to device GND terminal. recommended operating conditions MIN MAX UNIT Regulator input voltage range, VDD, TPS86 through TPS V Supply voltage, V Input voltage, IN 0. V Continuous regulator output current, ICC 0 0 ma Operating ambient temperature range, TA 0 C POST OFFICE BOX 60 DALLAS, TEXAS 76

5 TPS8xx electrical characteristics over recommended operating ambient temperature range, V CC = 0 V, V DD tied to V CC, C L = nf (unless otherwise specified) Inputs PARAMETER TEST CONDITIONS MIN TYP MAX UNIT = V. Positive-going input threshold voltage = 0 V V = V 9. 0 = V.7 Negative-going input threshold voltage = 0 V. V = V..6 Input voltage hysteresis. V Input current, TPS88/9/8/9 Input = 0 V or 0. µa Input current, TPS86/7 Input = 0 V 60 Input = Input capacitance 0 pf Typicals are for TA = C unless otherwise noted. outputs High-level output voltage Low-level output voltage Typicals are for TA = C unless otherwise noted. regulator, TPS86 through TPS89 Output voltage Output voltage in dropout out Typicals are for TA = C unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT IO = ma IO = 00 ma 8 9. IO = ma IO = 00 ma PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VDD 0 V, 0. 0 IO 0 ma IO = 0 ma, 8 0 VDD = 0 V µa V V V V supply current PARAMETER TEST CONDITIONS MIN TYP MAX UNIT TPS86, IN = high = 0 V 0 0 TPS87 IN = low = 0 V Supply current into Supply current into VDD Typicals are for TA = C unless otherwise noted. TPS88, TPS89 TPS88, TPS89 IN = high or low, High = 0 V, Low = 0 V TPS86, VDD = 0 V, TPS87 IN = high = 0 V or low = 0 V TPS88, VDD = 0 V, TPS89 IN = high = 0 V or low = 0 V 0 µa µa 0 0 POST OFFICE BOX 60 DALLAS, TEXAS 76

6 TPS8xxY electrical characteristics at T A = C, V CC = 0 V, V DD tied to V CC, C L = nf (unless otherwise specified) Inputs PARAMETER TEST CONDITIONS MIN TYP MAX UNIT = V. Positive-going input threshold voltage = 0 V 6.6 V = V 9. = V.7 Negative-going input threshold voltage = 0 V. V = V.6 Input voltage hysteresis. V Input current, TPS88/9/8/9 Input = 0 V or 0. µa Input current, TPS86/7 Input = 0 V 60 Input = µa Input resistance 000 MΩ Input capacitance pf outputs High-level output voltage Low-level output voltage regulator, TPS86 through TPS89 PARAMETER TEST CONDITIONS MIN TYP MAX UNIT IO = ma 9.9 IO = 00 ma 9. IO = ma 0.8 IO = 00 ma PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Output voltage VDD 0 V, 0 IO 0 ma Output voltage in dropout IO = 0 ma, VDD = 0 V V V. V 9 V supply current PARAMETER TEST CONDITIONS MIN TYP MAX UNIT TPS86, IN = high = 0 V 0 TPS87 IN = low = 0 V 60 Supply current into Supply current into VDD TPS88, TPS89 TPS88, TPS89 IN = high or low, High = 0 V, Low = 0 V TPS86, VDD = 0 V, TPS87 IN = high = 0 V or low = 0 V TPS88, VDD = 0 V, TPS89 IN = high = 0 V or low = 0 V µa µa 0 6 POST OFFICE BOX 60 DALLAS, TEXAS 76

7 switching characteristics for all devices over recommended operating ambient temperature range, V CC = 0 V, V DD tied to V CC, C L = nf (unless otherwise specified) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT = V tr Rise time = 0 V 0 ns = V = V tf Fall time = 0 V 0 ns = V = V 0 tphl Propagation delay time, high-to-low-level output = 0 V ns = V 0 = V 0 tplh Propagation delay time, low-to-high-level output = 0 V ns = V 0 PARAMETER MEASUREMENT INFORMATION IN 0% 0% 0 V tf tr OUT 90% 0% 0% 90% 0% 0% 0 V tphl tplh Figure. Typical Timing Diagram (TPS86) POST OFFICE BOX 60 DALLAS, TEXAS 76 7

8 PARAMETER MEASUREMENT INFORMATION TPS86 Regulator 0. µf + 0 V.7 µf Input Output 0 Ω nf Figure. Switching Time Test Setup TPS Vdc OUT Current Loop + 0. µf.7 µf 0 V Figure. Shoot-Through Current Test Setup 8 POST OFFICE BOX 60 DALLAS, TEXAS 76

9 TYPICAL CHARACTERISTICS Table of Graphs FIGURE Rise time Supply voltage Fall time Supply voltage Propagation time (L >H) Supply voltage 6 Propagation Time (H >L) Supply voltage 7 Rise time Ambient temperature 8 Fall time Ambient temperature 9 Propagation time (L >H) Supply voltage 0 Propagation time (H >L) Ambient temperature Supply current () Supply voltage Supply current () Load capacitance Supply current () Ambient temperature Input threshold voltage Supply voltage Regulator output voltage Regulator supply voltage 6 Regulator quiescent current Regulator supply voltage 7 Shoot-through current Input voltage (L >H) 8 Shoot-through current Input voltage (H >L) 9 POST OFFICE BOX 60 DALLAS, TEXAS 76 9

10 TYPICAL CHARACTERISTICS RISE TIME SUPPLY VOLTAGE FALL TIME SUPPLY VOLTAGE TA = C 0 TA = C 0 Rise Time ns tr 0 0 CL = 00 pf CL = 000 pf Fall Time ns tf 0 0 CL = 00 pf CL = 000 pf CL = 0 CL = Supply Voltage V Figure Supply Voltage V Figure PROPAGATION DELAY TIME, LOW-TO-HIGH-LEVEL OUTPUT SUPPLY VOLTAGE PROPAGATION DELAY TIME, HIGH-TO-LOW-LEVEL OUTPUT SUPPLY VOLTAGE 0 TA = C 0 TA = C t PLH Propagation Delay Time, Low-To-High-Level Output ns CL = 00 pf CL = 000 pf CL = 0 t PHL Propagation Delay Time, High-To-Low-Level Output ns CL = 00 pf CL = 000 pf CL = Supply Voltage V Figure Supply Voltage V Figure 7 0 POST OFFICE BOX 60 DALLAS, TEXAS 76

11 TYPICAL CHARACTERISTICS 9 8 RISE TIME AMBIENT TEMPERATURE = 0 V Load = 000 pf f = 00 khz FALL TIME AMBIENT TEMPERATURE = 0 V Load = 000 pf f = 00 khz Rise Time ns tr 7 6 Fall Time ns tf Ambient Temperature C Ambient Temperature C Figure 8 Figure 9 t PLH Propagation Delay Time, Low-To-High-Level Output ns PROPAGATION DELAY TIME, LOW-TO-HIGH-LEVEL OUTPUT SUPPLY VOLTAGE = 0 V Load = 000 pf f = 00 khz t PHL Propagation Delay Time, High-To-Low-Level Output ns PROPAGATION DELAY TIME, HIGH-TO-LOW-LEVEL OUTPUT AMBIENT TEMPERATURE = 0 V Load = 000 pf f = 00 khz TA Ambient Temperature C Figure TA Ambient Temperature C Figure POST OFFICE BOX 60 DALLAS, TEXAS 76

12 TYPICAL CHARACTERISTICS SUPPLY CURRENT SUPPLY VOLTAGE SUPPLY CURRENT LOAD CAPACITANCE 6 Load = 000 pf Duty Cycle = 0%. = 0 V f = 00 khz Duty Cycle = 0% Supply Current ma ICC f = MHz f = 00 khz Supply Current ma ICC.. f = 0 khz f = 00 khz Supply Voltage V CL Load Capacitance pf Figure Figure SUPPLY CURRENT AMBIENT TEMPERATURE INPUT THRESHOLD VOLTAGE SUPPLY VOLTAGE ICC Supply Current ma.. = 0 V Load = 000 pf f = 00 khz Duty Cycle = 0% Input Threshold Voltage V Positive Going Negative Going VIT TA Ambient Temperature C Figure Supply Voltage V Figure POST OFFICE BOX 60 DALLAS, TEXAS 76

13 TYPICAL CHARACTERISTICS REGULATOR OUTPUT VOLTAGE REGULATOR SUPPLY VOLTAGE REGULATOR QUIESCENT CURRENT REGULATOR SUPPLY VOLTAGE TPS86,7 only No Load Regulator Output Voltage V Load = 0 kω µ A Regulator Quiescent Current VDD Regulator Supply Voltage V Figure Figure VDD Regulator Supply Voltage V 7 6 SHOOT-THROUGH CURRENT INPUT VOLTAGE LOW-TO-HIGH = 0 V No Load TA = C 7 6 SHOOT-THROUGH CURRENT INPUT VOLTAGE HIGH-TO-LOW = 0 V No Load TA = C Shoot-Through Current ma Shoot-Through Current ma VI Input Voltage V VI Input Voltage V 8 0 Figure 8 Figure 9 POST OFFICE BOX 60 DALLAS, TEXAS 76

14 APPLICATION INFORMATION MOSFETs are voltage-driven devices that require very little steady-state drive current. However, the large input capacitance (00 pf to 000 pf or greater) of these devices requires large current surges to reduce the turn-on and turn-off times. The TPS86 series of high-speed drivers can supply up to A to a MOSFET, greatly reducing the switching times. The fast rise times and fall times and short propagation delays allow for operation in today s high-frequency switching converters. In addition, MOSFETs have a limited gate-bias voltage range, usually less than 0 V. The TPS86 series of drivers extends this operating range by incorporating an on-board series regulator with an input range up to 0 V. This regulator can be used to power the drivers, the PWM chip, and other circuitry, providing the power dissipation rating is not exceeded. When using these devices, care should be exercised in the proper placement of the driver, the switching MOSFET, and the bypass capacitor. Because of the large input capacitance of the MOSFET, the driver should be placed close to the gate to eliminate the possibility of oscillations caused by trace inductance ringing with the gate capacitance of the MOSFET. When the driver output path is longer than approximately inches, a resistor in the range of 0 Ω should be placed in series with the gate drive as close as possible to the MOSFET. A ceramic bypass capacitor is also recommended to provide a source for the high-speed current transients that the MOSFET requires. This capacitor should be placed between V CC and GND of the driver (see Figures 0 and ). TPS86 Regulator 0. µf Load Input Figure 0. V CC < V VDD TPS86 Regulator 0. µf.7 µf + Load Input Figure. V CC > V POST OFFICE BOX 60 DALLAS, TEXAS 76

15 APPLICATION INFORMATION The on-board series regulator supplies approximately 0 ma of current at. V, some of which can be used for external circuitry, providing the power dissipation rating for the driver is not exceeded. When using the on-board series regulator, an electrolytic output capacitor of.7 µf or larger is recommended. Although not required, a 0.-µF ceramic capacitor on the input of the regulator can help suppress transient currents (see Figure ). When not used, the regulator should be connected to V CC. Grounding V DD will result in destruction of the regulator. VDC 0. µf + 0. µf.7 µf TPS86 PWM Controller Regulator 0. µf Out GND 0 µf VO Figure. Boost Application The TPS86 and TPS88 drivers include active pullup circuits on the inputs to eliminate the need for external pullup resistors when using controllers with open-collector outputs (such as the TL00). The TPS87 and TPS89 drivers have standard CMOS inputs providing a total device operating current of less than 0 µa. All devices switch at standard CMOS logic levels of approximately / V CC with positive-going input levels, and approximately / V CC with negative-going input levels. Being CMOS drivers, these devices will draw relatively large amounts of current (Approximately ma) when the inputs are in the range of one-half of the supply voltage. In normal operation, the driver input is in this range for a very short time. Care should be taken to avoid use of very low slew-rate inputs, used under normal operating conditions. Although not destructive to the device, slew rates slower than 0. V/µs are not recommended. The BiCMOS output stage provides high instantaneous drive current to rapidly toggle the power switch, and very low drop to each rail to ensure proper operation at voltage extremes. Low-voltage circuits (less than V) that require very low quiescent currents can use the TPS88 and TPS89 drivers. These drivers use typically 0. µa of quiescent current (with inputs high or low). They do not have the internal regulator or the active pullup circuit, but all other specifications are the same as for the rest of the family.-v/.-v, -A application Figure illustrates the use of the TPS87 with a TL00 PWM controller and a TPS0 in a simple step-down converter application. The converter operates at 7 khz and delivers either. V or. V (determined by the value of R6) at A ( A peak) from a -V supply. The bill of materials is provided in Table. POST OFFICE BOX 60 DALLAS, TEXAS 76

16 APPLICATION INFORMATION. V to 7 V C7 + C8 Q TPS0D L VO A Continuous A Peak U TPS87DBV R + + C Regulator CR C9 C0 C C GND GND U TL00CD OUT + C6 SCP R C R6 R7 GND 8 C9 R DTC COMP FB RT 6 7 C C R R C Figure. Step-Down Application 6 POST OFFICE BOX 60 DALLAS, TEXAS 76

17 APPLICATION INFORMATION Table. Bill of Materials REF DES PART NO. DESCRIPTION MFR U TPS87DBV IC, MOSFET driver, single noninverting TI U TL00CD IC, PWM controller TI Q TPS0D MOSFET, p-channel, 6 A, 7 V, 7 mω TI C, C, C, C8 Capacitor, ceramic, 0. µf, 0 V, X7R, 06 C Capacitor, ceramic, 0.0 µf, 0 V, X7R, 06 C Capacitor, ceramic, 00 pf, 0 V, X7R, 080 C6 ECS-TCY0R Capacitor, tantalum,.0 µf, 6 V, A case Panasonic C7 0SC7M Capacitor, OS-Con, 7 µf, 0 V Sanyo C9 Capacitor, ceramic, 000 pf, 0 V, X7R, 080 C0, C 0SA0M Capacitor, OS-Con, 0 µf, 0 V Sanyo C Capacitor, ceramic, 0.0 µf, 0 V, X7R, 080 C Capacitor, ceramic, 7 µf, 0 V, X7R CR 0WQ0F Diode, Shottky, D-pak, A 0 V IR L SML7 Inductor, 7 µh, +/ 0%, A Nova Magnetics R Resistor, CF, 7 kω, /0 W, %, 080 R Resistor, CF,. kω, /0 W, %, 080 R Resistor, MF, 0. kω, /0 W, %, 080 R Resistor, MF,.00 kω, /0 W, %, 080 R Resistor, CF, 7 Ω, /0 W, %, 080 R6 (.-V) Resistor, MF,. kω, /0 W, %, 080 R6 (.-V) Resistor, MF,.0 kω, /0 W, %, 080 R7 Resistor, CF, 00 Ω, /0 W, %, 080 As shown in Figures and, the TPS87 turns on the TPS0 power switch in less than 0 ns and off in ns. Q Gate V/div Q Drain V/div Q Drain V/div Q Gate V/div. ns/div. ns/div Figure. Q Turn-On Waveform Figure. Q Turn-Off Waveform POST OFFICE BOX 60 DALLAS, TEXAS 76 7

18 APPLICATION INFORMATION The efficiency for various output currents, with a.-v input, is shown in Figure 6. For a.-v output, the efficiency is greater than 90% for loads up to A exceptional for a simple, inexpensive design VO =. V VI =. V TA = C Efficiency % 8 80 VO =. V Load Current A.. Figure 6. Converter Efficiency 8 POST OFFICE BOX 60 DALLAS, TEXAS 76

19 DBV (R-PDSO-G) MECHANICAL DATA PLASTIC SMALL-OUTLINE PACKAGE 0,0 0,9 0, M 0,0,80,0,00,0 0, NOM,0,70 Gage Plane 0, 0 8,0,00 0,0 MIN Seating Plane 0,0 07-/B /96 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions include mold flash or protrusion. POST OFFICE BOX 60 DALLAS, TEXAS 76 9

20 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ( CRITICAL APPLICATIONS ). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER S RISK. In order to minimize risks associated with the customer s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI s publication of information regarding any third party s products or services does not constitute TI s approval, warranty or endorsement thereof. Copyright 998, Texas Instruments Incorporated

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