Insulated Gate Bipolar Transistor Ultralow V CE(on), 50 A VS-GA50SA60S PRODUCT SUMMARY V CES V CE(on) (typical) at 00 A, 5 C I C at T C = 90 C () Speed Package Circuit SOT-7 600 V.33 V 50 A DC to khz SOT-7 Single switch no diode Note () Maximum collector current admitted 00 A to do not exceed the maximum temperature of terminals FEATURES Standard: optimized for minimum saturation voltage and low speed Lowest conduction losses available Fully isolated package (500 V AC ) Very low internal inductance (5 nh typical) Industry standard outline Designed and qualified for industrial level UL approved file E78996 Material categorization: for definitions of compliance please see www.vishay.com/doc?999 BENEFITS Designed for increased operating efficiency in power conversion: UPS, SMPS, TIG welding, induction heating Easy to assemble and parallel Direct mounting to heatsink Plug-in compatible with other SOT-7 packages ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL TEST CONDITIONS MAX. UNITS Collector to emitter voltage V CES 600 V Continuous collector current I () T C = 5 C 400 C T C = 90 C 50 Repetitive rating; V A Pulsed collector current I GE = 0 V, pulse width limited by CM 400 maximum junction temperature Clamped Inductive load current I LM V CC = 80 % (V CES ), V GE = 0 V, L = 0 μh, R g =.0 400 Gate to emitter voltage V GE ± 0 V T C = 5 C 96 Power dissipation P D T C = 90 C 46 W Isolation voltage V ISOL Any terminal to case, t = min 500 V Note () Maximum collector current admitted 00 A to do not exceed the maximum temperature of terminals THERMAL AND MECHANICAL SPECIFICATIONS PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNITS Junction and storage temperature range T J, T Stg -40-50 C Thermal resistance junction to case R thjc - - 0.3 Thermal resistance case to heatsink R thcs Flat, greased surface - 0.05 - C/W Weight - 30 - g Mounting torque Torque to terminal - -. (9.7) Nm (lbf.in) Torque to heatsink - -.3 (.5) Nm (lbf.in) Case style SOT-7 Revision: 0-May-6 Document Number: 94704 ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9000
VS-GA50SA60S ELECTRICAL SPECIFICATIONS (T J = 5 C unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNITS Collector to emitter breakdown voltage V (BR)CES V GE = 0 V, I C = ma 600 - - Emitter to collector breakdown voltage V (BR)ECS () V GE = 0 V, I C =.0 A 8 - - Collector to emitter voltage Notes () Pulse width 80 μs; duty factor 0. % V CE(on) I C = 00 A -.0.3 I C = 00 A -.33.66 I C = 00 A, T J = 5 C -.0 - V GE = 5 V I C = 00 A, T J = 5 C -.3 - I C = 00 A, T J = 50 C -.0 - I C = 00 A, T J = 50 C -.33 - V GE(th) V CE = V GE, I C = 50 μa 3.0 4.5 6.0 Gate threshold voltage V CE = V GE, I C = 50 μa, T J = 5 C - 3. - Temperature coefficient of threshold voltage V GE(th) / T J V CE = V GE, I C = ma, 5 C to 5 C - - - mv/ C Collector to emitter leakage current I CES V GE = 0 V, V CE = 600 V, T J = 5 C - 0. - V GE = 0 V, V CE = 600 V, T J = 50 C - 0.6 0 ma V GE = 0 V, V CE = 600 V - 0 000 μa Gate to emitter leakage current I GES V GE = ± 0 V - - ± 50 na V SWITCHING CHARACTERISTICS (T J = 5 C unless otherwise specified) switching loss PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNITS Total gate charge (turn-on) Q g - 770 00 Gate-to-emitter charge (turn-on) Q ge I C = 00 A, V CC = 600 V, V GE = 5 V - 00 50 nc Gate-to-collector charge (turn-on) Q gc - 60 380 Turn-on switching loss E on - 0.55 - Turn-off switching loss E off T J = 5 C - 5 - mj Total switching loss E tot I C = 00 A V CC = 480 V - 5.5 - Turn-on delay time t d(on) V GE = 5 V - 67 - Rise time t r R g = 5.0-4 - Turn-off delay time t d(off) L = 500 μh Energy - 30 - ns Fall time t f losses - 450 - Turn-on E on include tail and diode - 0.67 - Turn-off switching loss E off TJ = 5 C recovery. - 43.0 - mj I C = 00 A Diode used Total switching loss E tot V CC = 480 V 60APH06-43.7 - Turn-on delay time t d(on) V GE = 5 V - 75 - Rise time t r R g = 5.0 L = 500 μh - 50 - Turn-off delay time t d(off) - 350 - ns Fall time t f - 700 - Between lead and Internal emitter inductance L E center of die contact - 5.0 - nh Input capacitance C ies - 6 50 - Output capacitance C oes V GE = 0 V, V CC = 30 V, f =.0 MHz - 040 - pf Reverse transfer capacitance C res - 90 - Revision: 0-May-6 Document Number: 94704 ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9000
VS-GA50SA60S 60 0 Allowable Case Temperature ( C) 40 0 00 80 60 40 0 0 0 50 00 50 00 50 300 350 400 450 500 I CES - Collector Current (ma) T J = 50 C 0. T J = 5 C 0.0 T J = 5 C 0.00 0.000 00 00 300 400 500 600 I C - Continuous Collector Current (A) Fig. - Maximum DC IGBT Collector Current vs. Case Temperature V CE - Collector-to-Emitter Voltage (V) Fig. 4 - Typical IGBT Zero Gate Voltage Collector Current I C - Collector to Emitter Current (A) 000 V GE = 5 V 00 T J = 50 C T J = 5 C 0 T J = 5 C 0.0 0.5.0.5.0.5 V CE - Collector to Emitter Voltage (V) Fig. - Typical Collector to Emitter Current Output Characteristics V GEth - Threshold Voltage (V) 6 5.5 5 T J = 5 C 4.5 4 3.5 T J = 5 C 3.5 0.0 0.40 0.60 0.80.00 I C - Continuous Collector Current (ma) Fig. 5 - Typical IGBT Threshold Voltage I C - Collector to Emitter Current (A) 000 00 T J = 50 C T J = 5 C 0 T J = 5 C 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 V CE - Collector-to-Emitter Voltage (V).5.5 Ic = 400 A Ic = 00 A Ic = 00 A 0.5 0 0 40 60 80 00 0 40 60 V GE - Gate to Emitter Voltage (V) T J - Junction Temperature ( C) Fig. 3 - Typical IGBT Transfer Characteristics Fig. 6 - Typical IGBT Collector to Emitter Voltage vs. Junction Temperature, V GE = 5 V Revision: 0-May-6 3 Document Number: 94704 ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9000
VS-GA50SA60S 000 000 Switching Energy (mj) 00 0 E off E on Energy Losses (mj) 00 0 E off E on 0. 5 50 75 00 5 50 75 00 5 I C - Collector Current (A) 0. 0 0 0 30 40 50 R g (Ω) Fig. 7 - Typical IGBT Energy Losses vs. I C, T J = 5 C, V CC = 480 V, V GE = 5 V, L = 500 μh, R g = 5, Diode used: 60APH06 Fig. 9 - Typical IGBT Energy Losses vs. R g, T J = 5 C, I C = 00 A, V CC = 480 V, V GE = 5 V, L = 500 μh, Diode used: 60APH06 0 t f t d(off) Switching Time (μs) 0. t d(on) t r Switching Time (μs) 0. t f t r t d(on) t d(off) 0.0 0 5 50 75 00 5 50 75 00 5 I C - Collector Current (A) 0.0 0 0 0 30 40 50 60 R g (Ω) Fig. 8 - Typical IGBT Switching Time vs. I C, T J = 5 C, V CC = 480 V, V GE = 5 V, L = 500 μh, R g = 5, Diode used: 60APH06 Fig. 0 - Typical IGBT Switching Time vs. R g, T J = 5 C, I C = 00 A, V CC = 480 V, V GE = 5 V, L = 500 μh, Diode used: 60APH06 Z thjc - Thermal Impedance Junction to Case ( C/W) 0. 0.0 0.75 0.50 0.5 0. 0.05 0.0 DC 0.00 0.000 0.00 0.0 0. 0 Rectangular Pulse Duration (s) Fig. - Maximum Thermal Impedance Z thjc Characteristics Revision: 0-May-6 4 Document Number: 94704 ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9000
VS-GA50SA60S Load Current (A) 50 00 50 00 Square wave: 60 % of rated voltage I For both: Duty cycle: 50 % T J = 5 C T sink = 90 C Gate drive as specified Power dissipation = 40 W Triangular wave: I Clamp voltage: 80 % of rated 50 Ideal diodes 0 0. 0 00 f - Frequency (khz) Fig. - Typical Load Current vs. Frequency (Load Current = I RMS of Fundamental) C - Capacitance (pf) 30 000 4 000 8 000 000 6000 C ies C res C oes V GE = 0 V, f = MHz C ies = C ge + C gc, C ce shorted C res = C gc C oes = C ce + C gc 0 0 00 V CE - Collector to Emitter Voltage (V) Fig. 3 - Typical Capacitance vs. Collector to Emitter Voltage VGE - Gate to Emitter Voltage (V) 0 6 8 4 V CC = 400 V I C = 00 A 0 0 00 400 600 800 Q G - Total Gate Charge (nc) Fig. 4 - Typical Gate Charge vs. Gate to Emitter Voltage 000 I C - Collector Current (A) 00 0 V GE = 0 V T J = 5 C Safe operating area 0 00 000 V CE - Collector to Emitter Voltage (V) Fig. 5 - Turn-Off SOA Revision: 0-May-6 5 Document Number: 94704 ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9000
VS-GA50SA60S 50 V 000 V L V C * D.U.T. 0 V to 480 V 480 µf 960 V R L = 480 V 4 x I C at 5 C * Driver same type as D.U.T.; V C = 80 % of V CE (max) Note: Due to the 50 V power supply, pulse width and inductor will increase to obtain rated I d Fig. 6a - Clamped Inductive Load Test Circuit Fig. 6b - Pulsed Collector Current Test Circuit I C Driver* L V C D.U.T. 50 V 000 V 3 * Driver same type as D.U.T., V C = 480 V Fig. 7a - Switching Lost Test Circuit 90 % 3 0 % V C 90 % t d (off) I C 0 % 5 % t r t f t d (on) t = 5 µs E on E off E ts = (E on + E off ) Fig. 7b - Switching Loss Waveforms Revision: 0-May-6 6 Document Number: 94704 ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9000
VS-GA50SA60S ORDERING INFORMATION TABLE Device code VS- G A 50 S A 60 S 3 4 5 6 7 8 3 4 5 6 7 8 - product - Insulated Gate Bipolar Transistor (IGBT) - Gen 4, IGBT silicon - Current rating (50 = 50 A) - Circuit configuration (S = single switch, without antiparallel diode) - Package indicator (A = SOT-7) - Voltage rating (60 = 600 V) - Speed/type (S = standard speed) CIRCUIT CONFIGURATION CIRCUIT CIRCUIT CONFIGURATION CODE CIRCUIT DRAWING 3 (C) Lead Assignment 4 3 Single switch, no antiparallel diode S (G), 4 (E) N-channel Dimensions Packaging information LINKS TO RELATED DOCUMENTS www.vishay.com/doc?9543 www.vishay.com/doc?9545 Revision: 0-May-6 7 Document Number: 94704 ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9000
Outline Dimensions SOT-7 Generation II DIMENSIONS in millimeters (inches) Ø 4.0 (0.6) Ø 4.30 (0.69) 38.30 (.508) 37.80 (.488) -A- 4 x M4 nuts.50 (0.49) 3.00 (0.5) 6.5 (0.46) 6.50 (0.56) 5.70 (.0) 4.70 (0.97) -B- 7.45 (0.93) 7.60 (0.99) 30.50 (.00) 9.80 (.73) 4.90 (0.587) 5.0 (0.598) R full.0 (0.083).0 (0.087) 3.50 (.40) 3.0 (.64) 8.30 (0.37) 4 x 7.70 (0.303) 0.5 (0.00) M C A M B M.0 (0.087).90 (0.075) 4.0 (0.6) 4.50 (0.77) -C- 0.3 (0.005).30 (0.484).70 (0.460) 5.00 (0.984) 5.50 (.004) Note Controlling dimension: millimeter Revision: 0-Aug- Document Number: 9543 ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?9000
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