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Insulaed-Gae Transisors Simplify AC-Moor Speed Conrol Applicaion Noe Sepember 1993 AN-7511 Tile N75 ) ubc n laed ae an ors m- fy C- oor eed onol) uho ) eyords ner- orpo- ion, mincor, vanche nergy aed, wich g wer p- e wer An IGT s few inpu requiremens and low On-sae resisance simplify drive circuiry and increase power efficiency in moorconrol applicaions. The volage-conrolled, MOSFET-like inpu and ransfer characerisics of he insulaed-gae ransisor (IGT) (see EDN, Sepember 29, 1983, pg 153 for IGT deails) simplify power-conrol circuiry when compared wih bipolar devices. Moreover, he IGT has an inpu capaciance mirroring ha of a MOSFET ha has only one-hird he powerhandling capabiliy. These aribues allow you o design simple, low-power gae-drive circuis using isolaed or level-shifing echniques. Wha s more, he drive circui can conrol he IGT s swiching imes o suppress EMI, reduce oscillaion and noise, and eliminae he need for snubber neworks. Use Opoisolaion To Avoid Ground Loops The gae-drive echniques described in he following secions illusrae he economy and flexibiliy he IGT brings o power conrol: economy, because you can drive he device s gae direcly from a preceding collecor, via a resisor nework, for example; flexibiliy, because you can choose he drive circui s impedance o yield a desired urn-off ime, or you can use a swichable impedance ha causes he IGT o ac as a chargeconrolled device requiring less han 1 nanocoulombs of drive charge for full urn-on. Take Some Driving Lessons Noe he IGT s sraighforward drive compaibiliy wih CMOS, NMOS and open-collecor TTL/HTL logic circuis in he common-emier configuraion Figure 1A. 3 conrols he urnoff ime, and he sum of 3 and he parallel combinaion of 1 and 2 ses he urn-on ime. Drive-circui requiremens, however, are more complex in he common-collecor configuraion Figure 1B. In his floaing-gae-supply floaing-conrol drive scheme, 1 conrols he gae supply s power loss, 2 governs he urn-off ime, and he sum of 1 and 2 ses he urn-on ime. Figure 1C shows anoher common-collecor configuraion employing a boosrapped gae supply. In his configuraion, 3 defines he urn-off ime, while he sum of 2 and 3 conrols he urnon ime. Noe ha he gae s very low leakage allows he use of low-consumpion boosrap supplies using very low-value capaciors. Figure 1 shows wo of an IGT s srong poins. In he common-emier Figure 1A, TTL or MOS-logic circuis can drive he device direcly. In he common-collecor mode, you ll need level shifing, using eiher a second power supply Figure 1B or a boosrapping scheme Figure 1C. V CC 2 1 3 LOAD FIGUE 1A. SIMPLE DIVING AND TANSITI-TIME 1 S GATE SUPPLY POWE LOSS 2 S 1 + 2 S V CC 1 2 1 FIGUE 1B. A SECD POWE SUPPLY 1 2 3 LOAD FIGUE 1C. BOOTSTAPPING SCHEME V CC 2 15 ------------------- 2 1 + 2 3 S LOAD V CC 2 15 ------------------- 2 1 + 2 3 S 2 + 3 S τ «------------------------------------------------ + + In he common-collecor circuis, power-swich curren flowing hrough he logic circui s ground can creae problems. Opoisolaion can solve his problem (Figure 2A.) Because of he high common-mode dv/d possible in his configuraion, you should use an opoisolaor wih very low isolaion capaciance; he H11AV specs.5pf maximum. 5C I CEO I GES 2I 22 Fairchild Semiconducor Corporaion Applicaion Noe 7511 ev. A1
Applicaion Noe 7511 For opically isolaed relay-acion swiching, i makes sense o replace he phooransisor opocoupler wih an H11L1 Schmi-rigger opocoupler (Figure 2B).) For applicaions requiring exremely high isolaion, you can use an opical fiber o provide he signal o he gae-conrol phoodeecor. These circui examples use a gae-discharge resisor o conrol he IGT s urn-off ime. To exploi fully he IGT s safe operaing area (SOA), his resisor allows ime for he device s minoriy carriers o recombine. Furhermore, he recombinaion occurs wihou any curren crowding ha could cause ho-spo formaion or lach-up pnpn acion. For very fas urn-off, you can use a minimal snubber nework, which allows he safe use of lower value gae resisors and higher collecor currens. V CC 1 C 2 3 H11AV2 LOAD direcly from TTL levels, hanks o is 1.2V, 2mA inpu parameers. Available phoovolaic couplers have an oupu-curren capabiliy of approximaely 1µA. Combined wih approximaely 1kΩ equivalen shun impedance and he IGT s inpu capaciance, his curren level yields very long swiching imes. These ransiion imes (ypically ranging o 1 msec) vary wih he phoovolaic coupler s drive curren and he IGT s Miller-effec equivalen capaciance. Figure 3 illusraes a ypical phoovolaic-coupler drive along wih is ransien response. In some applicaions, he phoovolaic elemen can charge a sorage capacior ha s subsequenly swiched wih a phooransisor isolaor. This isolaor echnique - similar o ha used in boosrap circuis provides rapid urn-on and urn-off while mainaining small size, good isolaion and low cos. In common-collecor applicaions involving high-volage, reacive-load swiching, capaciive currens in he low-level logic circuis can flow hrough he isolaion capaciance of he conrol elemen (eg, a pulse ransformer, opoisolaor, piezoelecric coupler or level-shif ransisor). These currens can cause undesirable effecs in he logic circuiry, especially in highimpedance, low-signal-level CMOS circuis. + FIGUE 2A. AVOID GOUND-LOOP POBLEMS BY USING AN OPTOISOLATO. THE ISOLATO IGNOES SYS- TEM GOUND CUENTS AND ALSO PO- VIDES HIGH COMM-MODE ANGE. I DIG22 IGT - V CC = 3V 43k 1N561 5.6k 5.6k 1 3 H11L1 5.6k LOAD FIGUE 2B. A SCHMITT-TIGGE OPTOISOLATO YIELDS SNAP-ACTI TIGGEING SIMILA TO THAT OF A ELAY. Pulse-Transformer Drive Is Cheap And Efficien Phoovolaic couplers provide ye anoher means of driving he IGT. Typically, hese devices conain an array of small silicon phoovolaic cells, illuminaed by an infrared diode hrough a ransparen dielecric. The phoovolaic coupler provides an isolaed, conrolled, remoe dc supply wihou he need for oscillaors, recifiers or filers. Wha s more, you can drive i OUTPUT CUENT CUENT 1 2ms FIGUE 3. AS ANOTHE OPTICAL-DIVE OPTI, A PHOTO- VOLTAIC COUPLE POVIDES AN ISOLATED, EMOTE DC SUPPIY TO THE IGT S. ITS LOW 1µA OUTPUT, HOWEVE, YIELDS LG IGT TUN- AND TUN- TIMES. The soluion? Use fiber-opic componens Figure 4 o eliminae he problems compleely. As an added feaure, his lowcos echnique provides physical separaion beween he power and logic circuiry, hereby eliminaing he effecs of radiaed EMI and high-flux magneic fields ypically found near power-swiching circuis. You could use his mehod wih a boosrap-supply circui, alhough he fiber-opic sysem s reduced ransmission efficiency could require a gain/speed rade-off. The added bipolar signal ransisor minimizes he poenial for compromise. 22 Fairchild Semiconducor Corporaion Applicaion Noe 7511 ev. A1
Applicaion Noe 7511 GFOE1A1 1 + 2 3 IGT 2N5354 Q 1 GFOD1A1 C - EMITTE (DISCNECTED) 1M (3FT) QSF2C (W/CNECTOS) DETECTO (CNECTED) FIGUE 4. ELIMINATE EMI IN HIGH-FLUX O NOISE ENVI- MENTS BY USING FIBE-OPTIC COMPO- NENTS. THESE PATS ALSO ALLEVIATE POBLEMS AISING FOM CAPACITIVE COU- PLING IN ISOLATI ELEMENTS. Piezos Pare Prices ACOUSTIC WAVE OUTPUT VOLTAGE OSCILLATO FIGUE 5A. YIELDING 4-kV ISOLATI, A PIEZOELECTIC COUPLE POVIDES TANSFOME-LIKE PEFOMANCE AND AN ISOLATED POWE SUPPLY. 2.5k 18V 3.3k 2.7k NE555 1k PZ61343 4.7k IGT.1.1 D33D21 FIGUE 5B. THIS CICUIT POVIDES THE DIVE FO THIS ATICLE S MOTO- CICUIT. 22 Fairchild Semiconducor Corporaion Applicaion Noe 7511 ev. A1
Applicaion Noe 7511 A piezoelecric coupler operaionally similar o a pulse-rain drive ransformer, bu poenially less cosly in high volume is a small, efficien device wih isolaion capabiliy ranging o 4kV. Wha s more, unlike opocouplers, hey require no auxiliary power supply. The piezo elemen is a ceramic componen in which elecrical energy is convered o mechanical energy, ransmied as an acousic wave, and hen reconvered o elecrical energy a he oupu erminals Figure 5A. The piezo elemen s maximum coupling efficiency occurs a is resonan frequency, so he conrol oscillaor mus operae a ha frequency. For example, he PZT61343 piezo coupler in Figure 5B s driver circui requires a 18kHz, ±1%-accurae asable mulivibraor o maximize mechanical oscillaions in he ceramic maerial. This piezo elemen has a 1W max power handling capabiliy and a 3mA p-p max secondary curren raing. The 555 imer shown provides compaible waveforms while he C nework ses he frequency. Isolae Wih Galvanic Impuniy Do you require ried and rue isolaion? Then use ransformers; he IGT s low gae requiremens simplify he design of independen, ransformer-coupled gae-drive supplies. The supplies can direcly drive he gae and is discharge resisor Figure 6, or hey can simply replace he level-shifing supplies of Figure 2. I s good pracice o use pulse ransformers in drive circuiry, boh for IGT s and MOSFETs, because hese componens are economical, rugged and highly reliable. PULSE TANSFOME 2N5232 FIGUE 6A. POVIDING HIGH ISOLATI AT LOW COST, PULSE TANSFOMES AE IDEAL FO DIVING THE IGT. AT SUFFICIENTLY HIGH FEQUENCIES, C 1 CAN BE THE IGT S GATE-EMITTE CAPACITANCE ALE. FIGUE 6B. A HIGH-FEQUENCY OSCILLATO IN THE TANS- FOME S PIMAY YIELDS UNLIMITED - TIME CAPABILITY. In he pulse-on, pulse-off mehod Figure 6A, C 1 sores a posiive pulse, holding he IGT on. A moderae frequencies (several hundred Herz and above), he gae-emier capaciance alone can sore enough energy o keep he IGT on; lower frequencies require an addiional exernal capacior. Use of he common-base n-p-n bipolar ransisor o discharge he capaciance minimizes circui loading on he capacior. This acion exends coninuous on-ime capabiliy wihou capacior refreshing; i also conrols he gae-discharge ime via he 1kΩ emier resisor. C 1k C = 3µSEC C 1 + IGT - IGT + - 22V AC 3φ 6Hz THEE-PHASE BIDGE ECTIFIE SWITCHING EGULATO VOLTAGE ENABLE VAIABLE DC VOLTAGE TIMING AND DIVE THEE-PHASE IGT INVETE 3φ INDUCTI MOTO ADJUST VOLTAGE I I I ENABLE LOWE LEGS CUENT SENSE SIGNAL LOW VOLTAGE TANSFOME ECTIFIE FILTE DC POWE SUPPLY FO CICUITS VOLTAGE LED OSCILATO MOTO LOGIC I SHUT DOWN DIVE OSCILLATO OVELOAD POTECTI TACHO- METE FEEDBACK I SIGNAL PATH ISOLATO EG: OPTOCOUPLIE PIEZO COUPLE FIGUE 8. THIS 6-STEP 3-PHASE-MOTO DIVE USES THE IGT-DIVE TECHNIQUES DESCIBED IN THE TEXT. THE EGULATO AD- JUSTS THE OUTPUT DEVICES LEVELS; THE VOLTAGE-LED OSCILLATO VAIES THE SWITCHING FEQUENCY AND ALSO POVIDES THE CLOCK FO THE 3-PHASE TIMING LOGIC. THE V/F ATIO STAYS CSTANT TO MAINTAIN CSTANT TOQUE EGADLESS OF SPEED. 22 Fairchild Semiconducor Corporaion Applicaion Noe 7511 ev. A1
Applicaion Noe 7511 Piezoelecric Couplers Provide 4-kV Isolaion Using a high-frequency oscillaor for pulse-rain drive Figure 6B yields unlimied on-ime capabiliy. However, he scheme requires an oscillaor ha can be urned on and off by he conrol logic. A diode or zener clamp across he ransformer s primary will limi leakage-inducance flyback effecs. To opimize ransformer efficiency, make he pulses volage x ime producs equal for boh he On and he Off pulses. In siuaions where he line volage generaes he drive power, a simple relaxaion oscillaor using a programmable unijuncion ransisor can derive is power direcly from he line o provide a pulse rain o he IGT gae. The circui shown in Figure 7 accommodaes applicaions involving lower frequencies (a few hundred Herz and below). The high oscillaor frequency (greaer han 2kHz) helps keep he pulse ransformer reasonably small. The volage-doubler circuiry improves he urn-on ime and also provides long on-ime capabiliy. Alhough his design uses only a supply on he primary side of a sandard rigger ransformer, i provides 1 gae-o-emier volage. OSCILLATO 1:2.1.1 IGT 4.7k FIGUE 7. THIS DIVING METHOD FO LOW-FEQUENCY SWITCHING POVIDES 1 TO THE IGT S GATE D 7 L 1 D 1 D 3 D 5 C 1 Q 1 Q 3 Q 5 32 1A INDUCTI MOTO Q 2 D 2 D 4 D 6 Q 4 Q 6 NOTES: Q 1 - Q 6 = D94F4 D 1 - D 7 = 1N3913 D 8 - D 13 = = 4.7k, 1 / 2 W C 1 = 1, 4V L 1 = 4µH 22V FIGUE 9A. THE POWE INVETE S DIVE CICUIT USES SIX IGTS TO DIVE A 2-HP MOTO. φa 18 o φb φc I LA Q 1 15 o DELAY Q 2 Q 3 Q 4 Q 5 Q 6 V AB V BC V CA I LA I LB I LB I LC I LC FIGUE 9B. THE TIMING DIAGAM SHOWS THAT EACH IGT CDUCTS FO 165 o OF EVEY 36 o CYCLE; THE DELAY IS NECESSAY TO AVOID COSS CDUCTI. FIGUE 9C. THE THEE WINDINGS VOLTAGES AND CU- ENTS AE SHOWN. NOTE THAT ALTHOUGH COSTLY SNUBBE NETWOKS AE ELIMINAT- ED, FEEWHEELING DIODES AE NEEDED; THE IGTS HAVE NO INTINSIC OUTPUT DIODE. 22 Fairchild Semiconducor Corporaion Applicaion Noe 7511 ev. A1
Applicaion Noe 7511 Polyphase moors, conrolled by solid-sae, adjusable-frequency ac drives, are used exensively in pumps, conveyors, mills, machine ools and roboics applicaions. The specific conrol mehod could be eiher 6-sep or pulse-widh modulaion. This secion describes a 6-sep drive ha uses some of he previously discussed drive echniques (see page 11, Lach-Up: Hins, Kinks and Caveas ). Figure 8 defines he drive s block diagram. A 3-phase recifier convers he 22V ac o dc; he swiching regulaor varies he oupu volage o he IGT inverer. A he regulaor s oupu, a large filer capacior provides a siff volage supply o he inverer. The moor used in his example has a low slip characerisic and is herefore very efficien. You can change he moor s speed by varying he inverer s frequency. As he frequency increases, however, he moor s air-gap flux diminishes, reducing developed-orque capabiliy. You can mainain he flux a a consan level (as in a dc shun moor) if you also vary he volage so he V/F raio remains consan. Fiber-Opic Drive Eliminaes Inerference In he example given, he swiching regulaor varies he IGT inverer s oupu by conrolling is dc inpu; he volage-conrolled oscillaor (VCO) adjuss he inverer s swiching frequency, hereby varying he oupu frequency. The VCO also drives he 3-phase logic ha provides properly imed pulsed oupus o he piezo couplers ha direcly drive he IGT. Sensing he dc curren in he negaive rail and inhibiing he gae signal proec he IGT from overload and shoo-hrough (simulaneous conducion) condiions. If a faul coninues o exis for an appreciable period, inhibiing he swiching regulaor causes he inverer o shu off. The inverer s power-oupu circui is shown in Figure 9A; he corresponding iming diagrams show resisive-load curren waveforms ha indicae he 3-phase power Figure 9B and waveforms of he oupu line volage and curren Figure 9C. In Figure 9 s circui, i appears ha IGTs Q 1 hrough Q 6 will conduc for 18 o. However, in a pracical siuaion, i s necessary o provide some ime delay (ypically 1 o o 15 o ) during he posiive-o-negaive ransiion periods in he phase curren. This delay allows he complemenary IGTs o urn off before heir opposie members urn on, hus prevening cross conducion and evenual desrucion of he IGTs. Because of he ime delay, he maximum conducion ime is 165 o of every 36 o period. Because he IGTs don have an inegral diode, i s necessary o connec an aniparallel diode exernally o allow he freewheeling curren o flow. Inducor L 1 limis he di/d during faul condiions; freewheeling diode D 7 clamps he IGT s collecor supply o he dc bus. The peak full-load line curren specified by he moor manufacurer deermines he maximum seady-sae curren ha each ransisor mus swich. You mus conver his MSspecified curren o peak values o specify he proper IGT. If he inpu volage regulaor had a fixed oupu volage and a consan frequency, each IGT would be required o supply he saring locked-roor curren o he moor. This curren could be as much as 15 imes he full-load running curren. D 7 L 1 D 11 Q 1 D 12 Q 3 D 13 Q 5 + TO 32 1A C D 1 D D 1 3 5 TO LOAD D 8 Q D 2 D 2 9 Q 4 D 4 D 1 Q 6 D 6 SWITCHES (1, 4, 5), (1, 3, 6), (2, 3, 6), (2, 3, 5), (2, 4, 5) FIGUE 1A. COMPENT SELECTI IS IMPOTANT. THE IGT SELECTED CICUIT HANDLES 1A, AT 15 o C. THE ANTI- PAALLEL DIODES HAVE A SIMILA CUENT ATING. 1 1 D() F1 F1 I C.9I C.1I C F2 D() F2.1 1 1k 1k GE FIGUE 1B. SELECT TO YIELD THE DESIED TUN- TIME. FINALLY, L1 S VALUE DETEMINES THE FAULT-CDITI ACTI TIME. 22 Fairchild Semiconducor Corporaion Applicaion Noe 7511 ev. A1
Applicaion Noe 7511 I s impracical, however, o rae an inverer based on lockedroor curren. You can avoid his necessiy by adjusing he swiching regulaor s oupu volage and by providing a fixed oupu-curren limi slighly higher han he maximum fullload curren. This way, he curren requiremens during sarup will never exceed he curren capabiliy of an efficienly sized inverer. For example, consider a 2-hp, 3-phase inducion moor specifying V L a 23V MS and full-load curren (I LFL ) a 6.2A MS. For he peak curren of 8.766A, you can selec IGT ype D94F4. This device has a reverse-breakdown SOA (BSOA) of 1A, for a clamped inducive load a a juncion emperaure of 15 o C. A 4V IGT could also do he job, bu he choice gives an addiional deraing safey margin. You mus se he curren limi a 9A o limi he inrush curren during sar-up. Noe ha hanks o he IGT s adequae BSOA, you don need urn-off snubbers. 2.7k 1pF 3.3k 2.5k 4 7 8 3 NE555 6 2 1 5.1 1k 4.7k 47 D C 1k Q 8 2N393 47 PIEZOCOUPLE Q 8 PZT61343 2N393 E 4.7k DC BUS Q 1 D94F4 φa VCO & TIMING LOGIC A 4.7k 47 B Q 7 2N393 47 D29E1 D333 Q 3 3 22 1 2N393 C 1 Q 4 1 Q 5 F 4.7k Q 2 D94F4 FIGUE 11A. POVIDING POPELY TIMED DIVE TO THE IGTS, THE CICUIT USES PIEZO COUPLING TO THE UPPE POWE DEVICE. THE 3-TANSISTO DELAY CICUIT POVIDES THE NEEDED 15 o LAG TO THE LOWE IGT TO AVOID COSS CDUCTI. F VOLTS E D C B A 1kHz TIME TIME TIME TIME TIME FIGUE 11B. THE TIMING DIAGAM SHOWS THE 555 S 18-KHz DIVE TO THE PIEZO DEVICE AND THE LATTE S SLOW ESPSE. 22 Fairchild Semiconducor Corporaion Applicaion Noe 7511 ev. A1
Applicaion Noe 7511 Use 6-Sep Drive For Speed-Invarian Torque Figure 1A shows he inverer circui configured for his example. Diodes D 1 hrough D 6 carry he same peak curren as he IGTs; consequenly, hey re raed o handle peak currens of a leas 8.766A. However, hey only conduc for a shor ime (15 o o 2 o of 18 o ), so heir average-curren requiremen is relaively small. Exernal circuiry can conrol he IGT s curren fall ime. esisor conrols F1 Figure 1B; here's no way o conrol F2, an inheren characerisic of he seleced IGT. In his example, a 4.7-kΩ gae-o-emier resisor provides he appropriae fall ime. The choice of curren-limiing inducor L 1 is based on he IGT s overload-curren raing and he acion ime (he sum of he sensor s sensing and response ime and he IGT s urn-off ime) in faul condiions. You could use a se of flip flops and a mulivibraor o generae he necessary drive pulses and he corresponding 12 o delay beween he hree phases in Figure 1 s circui. A volage-conrolled oscillaor serves o change he inverer s oupu frequency. In his circui, IGTs Q 1, Q 3 and Q 5 require isolaed gae drive; he drive for Q 2, Q 4 and Q 6 can be referred o common. If you use opocouplers for isolaion, you ll need hree isolaed or boosrap power supplies (in addiion o he and power supplies) o drive he IGTs. Anoher alernaive is o use ransformer coupling. FIGUE 12A. THE PIEZO COUPLE S SLOW ESPSE IS NOT A DISADVANTAGE IN THIS ATICLE S CICUIT. IN FACT, IT CTIBUTES 2 o TO THE EQUIED 15 o TUN-/TUN- DELAY. TACE VETICAL HOIZTAL A /DIV 2µSEC/DIV B /DIV 2µSEC/DIV 165 o Conducion Prevens Shoo-Through Consider, however, using Figure 11A s novel, low-cos circui. I uses a piezo coupler o drive he isolaed IGT. As noed, he coupler needs a high-frequency square wave o induce mechanical oscillaions in is primary side. The 555 oscillaor provides he necessary 18-kHz waveform; is oupu is gaed according o he required iming logic and hen applied o he piezo coupler s primary. The coupler s recified oupu drives he IGT s gae; he 4.7kW gae-o-emier resisor provides a discharge pah for C GE during he IGT s urnoff. The circui s logic-iming diagram is shown in Figure 11B. The piezo coupler s slow response ime Figure 12A conribues approximaely 2 o o he 15 o o 2 o urn-on/urn-off delay needed o avoid shoo-hrough in he complemenary pairs. The corresponding collecor curren is shown in Figure 12B. C 1 and is associaed circuiry provide he remaining delay as follows: FIGUE 12B. THE DIVEN IGT'S COLLECTO CUENT IS SHOWN TACE VETICAL HOIZTAL A 3A/DIV 2µSEC/DIV B /DIV 2µSEC/DIV When Q 3 s base swings negaive, C 1 - a his ime discharged - urns on Q 5. Once C 1 is charged, Q 5 urns off, allowing a drive pulse o urn he IGT on. When Q 7 s base goes o ground, Q 4 urns on and discharges C 1, iniiaing he IGT s urn-off. Figure 13 shows he moor curren and corresponding line volage under ligh-load Figure 12A and full-load Figure 12B condiions. 22 Fairchild Semiconducor Corporaion Applicaion Noe 7511 ev. A1
Applicaion Noe 7511. FIGUE 13A. MOTO CUENT AND VOLTAGE AE SHOWN HEE, FO LIGHT LOADS TACE VETICAL HOIZTAL A 1A/DIV 1mSEC/DIV B /DIV 1mSEC/DIV FIGUE 13B. MOTO CUENT AND VOLTAGE AE SHOWN HEE, FO HEAVY LOADS. TACE VETICAL HOIZTAL A 3A/DIV 2mSEC/DIV B 1V/DIV 2mSEC/DIV To complee he design of he 6-sep moor drive, i s necessary o consider proecion circuiry for he oupu IGTs. The drive receives is power from a swiching supply already conaining provisions for proecion from line over-volage and under-volage and ransien effecs. However, you sill have o guard he power swiches agains unwaned effecs on he oupu lines and he possibiliy of noise or oher exraneous signals causing gae-drive iming errors. The bes proecion circui mus mach he characerisics of he power swich and he circui s bias condiions. The IGT is very rugged during urn-on and conducion, bu i requires ime o dissipae minoriy carriers when urning off high currens and volages. An analysis of he possible malfuncion condiion AC LINE ECTIFIE AND FILTE SWITCHING POWE SUPPLY 5 TO 32V DC DC HV ADJUST AND TIMING DC di/d LIMIT ISOLATI UPPE 3 LOWE 3 IGT SWITCHES MOTO ISOLATI ISOLATI ISOLATI HV DISABLE GATE DIVE TUN CHOPPE ECYCLE TIME COMPAATO AND LATCH I LIMIT 1A AC AV = 1 2A FIGUE 14. THE LOWEST COST SENSO IMAGINABLE, A PIECE OF COPPE WIE SEVES AS THE CUENT MITO IN THIS SYS- TEM. THE CHOPPED AND AMPLIFIED VOLTAGE DOP ACOSS THE WIE TIGGES A GATE-DIVE SHUT- CICUIT UNDE FAULT CDITIS. 22 Fairchild Semiconducor Corporaion Applicaion Noe 7511 ev. A1
Applicaion Noe 7511 A139M 5 TO 32V DC 5µH 3.9k 5 2 1 75k 22k 2N5232 2.2k.1 H11F3 3.3k 47pF 1A 2k 15 5 2V.1 2A 2k 39 2N5355 39 47 pf 1k H11F3 TO CICUIT 2.7k 2N536 C23B 1k 18k.2 22k 47k.1 TO DIVE 39k H11AV2 TO PZO SHUTDOWN H11AV2 TO HI-V SHUTDOWN 2 1 DT23F 22.2 TO MOTO 2mΩ (1 #24 AWG COPPE) POWE SUPPLY CUENT SENSE AND CHOPPE AC AMPLIFIE LATCHING FAST COMPAATO 1ms ESET IGT POWE SWITCHES FIGUE 15A. THIS ALL-ENCOMPASSING POTECTI SYSTEM POVIDES THEE INDEPENDENT SHUTDOWN FUNCTS - E EACH FO THE UPPE AND LOWE IGTS AND THE HIGH-VOLTAGE SUPPLY. 47k CHOPPE DIVE TO PIEZO DIVES 15 15 TIME 555 1 3 DT23F (3).2 18 5.1k 5.1k.2 18 HIGH-VOLTAGE SHUTDOWN TO 1 1V H11AV2 15 2N5232 H11F3.5 1 2N5232 H11F3.5 1M 2.2k 16 15 SG3524 1 8 ALL OPTOCOUPLES GO TO POTECTI CICUIT FIGUE 15B. THIS CICUIT POVIDES CHOPPE DIVE FO THE COPPE-WIE SENSO IN FIGUE 15A. FIGUE 15C. SHOWS THE HIGH-VOLT- AGE SHUTDOWN CICUIT. 22 Fairchild Semiconducor Corporaion Applicaion Noe 7511 ev. A1
Applicaion Noe 7511 Lach-Up: Hins, Kinks and Caveas The IGT is a rugged device, requiring no snubber nework when operaing wihin is published safe-operaing-area (SOA) raings. Wihin he SOA, he gae emier volage conrols he collecor curren. In fac, he IGT can conduc hree o four imes he published maximum curren if i s in he sae and he juncion emperaure is +15 o C maximum. However, if he curren exceeds he raed maximum, he IGT could lose gae conrol and lach up during urn-off aemps. The culpri is he parasiic SC formed by he pnpn srucure shown in Figure 16. In he equivalen circui, Q 1 is a power MOSFET wih a normal parasiic ransisor (Q 2 ) whose baseemier juncion is shuned by he low-value resisance 1. EMITTE METAL P N+ N EPITAXIAL LAYE FIGUE 16. THE IGT S PAASITIC SC IS ESPSIBLE FO THE DEVICE S LATCH-UP CHAACTEISTICS. For large curren overloads, he curren flowing hrough 1 can provoke SC riggering. In he simples erms, 1 represens he equivalen of a disribued resisor nework, whose magniude is a funcion of Q 2 s V CE. During normal IGT operaion, a posiive gae volage (greaer han he hreshold) applied beween Q 1 s gae and source urns he FET on. The FET hen urns on Q 3 (a pnp ransisor wih very low gain), causing a small porion of he oal collecor curren o flow hrough he 1 nework. To urn he IGT off, you mus reduce he gae-o-emier volage o zero. This urns Q 1 off, hus iniiaing he urn-off sequence wihin he device. Toal fall ime includes currenfall-ime one ( F1 ) and curren-fall-ime wo ( F2 ) componens. The urn-off is a funcion of he gae-emier resisance, Q 3 s sorage ime and he value of V GE prior o urn-off. Device characerisics fix boh he delay ime and he fall ime. MAIN CUENT PATH P+ SUBSTATE METAL COLLECTO GATE Q 2 Q1 N+ POLYSILIC GATE P MINOITY CAIE INJECTI COLLECTO Q 3 EMITTE 1 Forward-Bias Lach-Up Wihin he IGT s curren and juncion-emperaure raings, curren does no flow hrough Q 2 under forward-biased condiions. When he curren far exceeds is raed value, he curren flow hrough 1 increases and Q 3 s V CE also increases because of MOSFET channel sauraion. Once Q 3 s I C 1 drop exceeds Q 2 s V BE(), Q 2 urns on and more curren flow bypasses he FET. The posiive feedback hus esablished causes he device o lach in he forward-biased mode. The value of I C a which he IGT laches on while in forward conducion is ypically hree o four imes he device s maximum raed collecor curren. When he collecor curren drops below he value ha provokes Q 2 urn-on, normal operaion resumes if chip emperaure is sill wihin raings. If he gae-o-emier resisance is oo low, he Q 2 -Q 3 parasiic SC can cause he IGT o lach up during urn-off. During his period, GE deermines he drain-source dv/d of power MOSFET Q 1. A low 1 causes a rapid rise in volage - his increases Q 2 s V CE, increasing boh 1 s value and Q 2 s gain. Because of sorage ime, Q 3 s collecor curren coninues o flow a a level ha s higher han normal for he FET bias. During rapid urn-off, a porion of his curren could flow in Q 2 s base-emier juncion, causing Q 2 o conduc. This process resuls in device lach-up; curren disribuion will probably be less uniform han in he case of forward-bias lach-up. Because he gains of Q 2 and Q 3 increase wih emperaure and V CE, laching curren - high a +25 o C - decreases as a funcion of increasing juncion emperaure for a given gaeo-emier resisance. How do you es an IGT s urn-off laching characerisic? Consider he circui in Figure 17. Q 1 s base-curren pulse widh is se approximaely 2µsec greaer han he IGT s gaevolage pulse widh. This way, he device under es (DUT) can be swiched hrough Q 1 when reverse-bias lach-up occurs. This circui allows you o es an IGT s laching curren nondesrucively. The resuls? Clamped-inducive-load esing wih and wihou snubbers reveals ha snubbering increases curren handling dramaically: Wih GE = 1kΩ, a.2 snubber capacior increases curren capabiliy from 6A o 1A; wih GE = 5kΩ, a.9 snubber pracically doubles capaciy (25A vs 13A). Conclusions? You can double he IGT s laching curren by increasing GE from 1kΩ o 5kΩ, and double i again wih a polarized snubber using CS <.1. The IGT is herefore useful in siuaions where he device mus conduc currens of five o six imes normal levels for shor periods. Finally, you can also use he laching behavior o your advanage under faul condiions. In oher words, if he device laches up during urn-off under normal operaion, you could arrange i so ha a suiable snubber is swiched elecronically across he IGT. 22 Fairchild Semiconducor Corporaion Applicaion Noe 7511 ev. A1
Applicaion Noe 7511 L = 1µH A139P PE-63385 D66EV7 1V A114A Q 1 2k 1 PULSE GENEATO PULSE GENEATO Q 1 = D66EV7 A114A TIGGE 1pF A114A 1 1k 1 5 1 D38H1 D44D6 1 DS26x2 GE 1-1k A139M Q 2 V CE 1 V CC V CLAMP (4V MAX) Q 2 = DUT D94FQ4.2 FIGUE 17. USE THIS LATCHING-CUENT TESTE TO TEST IGTS NDESTUCTIVELY. Q 1 S BASE-DIVE PULSE WIDTH IS GEAT- E THAN THAT OF THE IGT S GATE DIVE, SO THE IGT UNDE TEST IS SWITCHED THOUGH Q 1 WHEN EVESE-BIAS LATCH-UP OCCUS. 22 Fairchild Semiconducor Corporaion Applicaion Noe 7511 ev. A1
TADEMAKS The following are regisered and unregisered rademarks Fairchild Semiconducor owns or is auhorized o use and is no inended o be an exhausive lis of all such rademarks ACEx Boomless CoolFET COSSVOLT DenseTrench DOME EcoSPAK E 2 CMOS TM EnSigna TM FACT FACT Quie Series STA*POWE is used under license DISCLAIME FAICHILD SEMICDUCTO ESEVES THE IGHT TO MAKE CHANGES WITHOUT FUTHE NOTICE TO ANY PODUCTS HEEIN TO IMPOVE ELIABILITY, FUNCTI O DESIGN FAICHILD DOES NOT ASSUME ANY LIABILITY AISING OUT OF THE APPLICATI O USE OF ANY PODUCT O CICUIT DESCIBED HEEIN; NEITHE DOES IT CVEY ANY LICENSE UNDE ITS PATENT IGHTS, NO THE IGHTS OF OTHES LIFE SUPPOT POLICY FAICHILD S PODUCTS AE NOT AUTHOIZED FO USE AS CITICAL COMPENTS IN LIFE SUPPOT DEVICES O SYSTEMS WITHOUT THE EXPESS WITTEN APPOVAL OF FAICHILD SEMICDUCTO COPOATI As used herein: 1 Life suppor devices or sysems are devices or sysems which, (a) are inended for surgical implan ino he body, or (b) suppor or susain life, or (c) whose failure o perform when properly used in accordance wih insrucions for use provided in he labeling, can be reasonably expeced o resul in significan injury o he user PODUCT STATUS DEFINITIS Definiion of Terms FAST â FASTr FFET GlobalOpoisolaor GTO HiSeC I 2 C ISOPLANA LileFET MicroFET MicroPak MICOWIE OPTOLOGIC â OPTOPLANA PACMAN POP Power247 PowerTrench QFET QS 2 A criical componen is any componen of a life suppor device or sysem whose failure o perform can be reasonably expeced o cause he failure of he life suppor device or sysem, or o affec is safey or effeciveness Daashee Idenificaion Produc Saus Definiion â QT Opoelecronics Quie Series SILENT SWITCHE â SMAT STAT SPM STA*POWE Sealh SuperSOT -3 SuperSOT -6 SuperSOT -8 SyncFET TinyLogic TruTranslaion UHC UlraFET â VCX Advance Informaion Preliminary No Idenificaion Needed Formaive or In Design Firs Producion Full Producion This daashee conains he design specificaions for produc developmen Specificaions may change in any manner wihou noice This daashee conains preliminary daa, and supplemenary daa will be published a a laer dae Fairchild Semiconducor reserves he righ o make changes a any ime wihou noice in order o improve design This daashee conains final specificaions Fairchild Semiconducor reserves he righ o make changes a any ime wihou noice in order o improve design Obsolee No In Producion This daashee conains specificaions on a produc ha has been disconinued by Fairchild semiconducor The daashee is prined for reference informaion only ev H5
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