MHz, Low Power, CMOS, EMI Hardened, Rail-to-Rail Quad Operational Amplifier Advanced. Features Single-Supply Operation from +. ~ +5.5 Low Offset oltage: 5m (Max.) Rail-to-Rail Input / Output Quiescent Current: 40μA per Amplifier (Typ.) Gain-Bandwidth Product: MHz (Typ.) Operating Temperature: -40 C ~ +5 C Low Input Bias Current: 0pA (Typ.) Available in SOP4 and TSSOP4 Packages. General Description The GT734 is a single supply, low power CMOS quad operational amplifier; these amplifiers offer bandwidth of MHz, rail-to-rail inputs and outputs, and single-supply operation from. to 5.5. Typical low quiescent supply current of 60μA in dual operational amplifier within one chip and very low input bias current of 0pA make the devices an ideal choice for low offset, low power consumption and high impedance applications such as smoke detectors, photodiode amplifiers, and other sensors. The GT734 is available in SOP4 and TSSOP4 packages. The extended temperature range of -40 o C to +5 o C over all supply voltages offers additional design flexibility. EMI hardening will let you get RF immunity performance without extra components. 3. Applications Portable Equipment Medical Instrumentation Mobile Communications Battery-Powered Instruments Smoke Detector Handheld Test Equipment Sensor Interface Copyright 00 Giantec Semiconductor Inc. (Giantec). All rights reserved. Giantec reserves the right to make changes to this specification and its products at any time without notice. Giantec products are not designed, intended, authorized or warranted for use as components in systems or equipment intended for critical medical or surgical equipment, aerospace or military, or other applications planned to support or sustain life. It is the customer's obligation to optimize the design in their own products for the best performance and optimization on the functionality and etc. Giantec assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and prior placing orders for products. A0 /6
MHz, Low Power, CMOS, EMI Hardened, Rail-to-Rail Quad Operational Amplifier Advanced 4. Pin Configuration 4. GT734 SOP4 and TSSOP4 (Top iew) OUTA 4 OUTD INA- 3 IND- INA+ 3 IND+ DD INB+ 4 5 MARKING 0 SS INC+ INB- 6 9 INC- OUTB 7 8 OUTC Figure. Pin Assignment Diagram (SOP4 and TSSOP4 Package) Note: Please see section Part Markings for detailed Marking Information. Copyright 00 Giantec Semiconductor Inc. (Giantec). All rights reserved. Giantec reserves the right to make changes to this specification and its products at any time without notice. Giantec products are not designed, intended, authorized or warranted for use as components in systems or equipment intended for critical medical or surgical equipment, aerospace or military, or other applications planned to support or sustain life. It is the customer's obligation to optimize the design in their own products for the best performance and optimization on the functionality and etc. Giantec assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and prior placing orders for products. A0 /6
5. Application Information 5. Size GT734 series op amps are unity-gain stable and suitable for a wide range of general-purpose applications. The small footprints of the GT734 series packages save space on printed circuit boards and enable the design of smaller electronic products. 5. Power Supply Bypassing and Board Layout GT734 series operates from a single. to 5.5 supply or dual ±. to ±.75 supplies. For best performance, a 0.μF ceramic capacitor should be placed close to the DD pin in single supply operation. For dual supply operation, both DD and SS supplies should be bypassed to ground with separate 0.μF ceramic capacitors. 5.3 Low Supply Current The low supply current (typical 80μA) of GT734 series will help to maximize battery life. They are ideal for battery powered systems 5.4 Operating oltage GT734 series operate under wide input supply voltage (. to 5.5). In addition, all temperature specifications apply from -40 o C to +5 o C. Most behavior remains unchanged throughout the full operating voltage range. These guarantees ensure operation throughout the single Li-Ion battery lifetime 5.5 Rail-to-Rail Input The input common-mode range of GT734 series extends 00m beyond the supply rails ( SS -0. to DD +0.). This is achieved by using complementary input stage. For normal operation, inputs should be limited to this range. 5.6 Rail-to-Rail Output Rail-to-Rail output swing provides maximum possible dynamic range at the output. This is particularly important when operating in low supply voltages. The output voltage of GT734 series can typically swing to less than 0m from supply rail in light resistive loads (>00kΩ), and 60m of supply rail in moderate resistive loads (0kΩ). 5.7 Capacitive Load Tolerance The GT734 series can directly drive 50pF capacitive load in unity-gain without oscillation. Increasing the gain enhances the amplifier s ability to drive greater capacitive loads. In unity-gain configurations, the capacitive load drive can be improved by inserting an isolation resistor R ISO in series with the capacitive load, as shown in Figure. - R ISO OUT IN + C L Figure. Indirectly Driving a Capacitive Load Using Isolation Resistor The bigger the R ISO resistor value, the more stable OUT will be. However, if there is a resistive load R L in parallel with the capacitive load, a voltage divider (proportional to R ISO /R L ) is formed, this will result in a gain error. The circuit in Figure 3 is an improvement to the one in Figure. R F provides the DC accuracy by feed-forward the IN to R L. C F and R ISO serve to counteract the loss of phase margin by feeding the high frequency component of the output signal back to the amplifier s inverting input, thereby preserving the phase margin in the overall feedback loop. Capacitive drive can be increased A0 3/6
by increasing the value of C F. This in turn will slow down the pulse response. Figure 3. Indirectly Driving a Capacitive Load with DC Accuracy 5.8 Differential amplifier The differential amplifier allows the subtraction of two input voltages or cancellation of a signal common the two inputs. It is useful as a computational amplifier in making a differential to single-end conversion or in rejecting a common mode signal. Figure 4. shown the differential amplifier using GT734. OUT ( R R R3 R 4 ) R4 R IN R R ( IP R R R3 R 4 ) Figure 4. Differential Amplifier R3 R REF If the resistor ratios are equal (i.e. R =R 3 and R =R 4 ), then OUT R R ( IP IN) REF 5.9 Instrumentation Amplifier The input impedance of the previous differential amplifier is set by the resistors R, R, R3, and R4. To maintain the high input impedance, one can use a voltage follower in front of each input as shown in the following two instrumentation amplifiers. 5.0 Three-Op-Amp Instrumentation Amplifier The dual GT734 can be used to build a three-op-amp instrumentation amplifier as shown in Figure 5. A0 4/6
Figure 5. Three-Op-Amp Instrumentation Amplifier The amplifier in Figure 5 is a high input impedance differential amplifier with gain of R /R. The two differential voltage followers assure the high input impedance of the amplifier. o R R 4 ( )( IP ) IN 3 5. Two-Op-Amp Instrumentation Amplifier GT734 can also be used to make a high input impedance two-op-amp instrumentation amplifier as shown in Figure 6. Figure 6. Two-Op-Amp Instrumentation Amplifier Where R =R 3 and R =R 4. If all resistors are equal, then o =( IP - IN ) A0 5/6
5. Single-Supply Inverting Amplifier The inverting amplifier is shown in Figure 6. The capacitor C is used to block the DC signal going into the AC signal source IN. The value of R and C set the cut-off frequency to ƒ C =/(πr C ). The DC gain is defined by OUT =-(R /R ) IN Figure 7. Single Supply Inverting Amplifier 5.3 Low Pass Active Filter The low pass active filter is shown in Figure 8. The DC gain is defined by R /R. The filter has a -0dB/decade roll-off after its corner frequency ƒ C =/(πr 3 C ). C R IN R - + OUT R 3 Figure 8. Low Pass Active Filter 5.4 Sallen-Key nd Order Active Low-Pass Filter GT734 can be used to form a nd order Sallen-Key active low-pass filter as shown in Figure 9. The transfer function from IN to OUT is given by OUT C CR R LP ( S) A IN S S( LP ) C R C R CR CR A C CR R Where the DC gain is defined by A LP =+R 3 /R 4, and the corner frequency is given by C C C R R The pole quality factor is given by A0 6/6
C Q C R C R C R ALP C R Let R=R=R and C=C=C, the corner frequency and the pole quality factor can be simplified as below C CR And Q=-R 3/ R 4 Figure 9. Sanllen-Key nd Order Active Low-Pass Filter 5.5 Sallen-Key nd Order high-pass Active Filter The nd order Sallen-key high-pass filter can be built by simply interchanging those frequency selective components R, R, C, and C as shown in Figure 0. R C C IN - OUT R + R 3 R 4 Figure 0. Sanllen-Key nd Order Active High-Pass Filter OUT IN ( S) S S ( CR S CR A HP A CR HP ) CC R R Where A HP =+R 3 /R 4 A0 7/6
6. Electrical Characteristics 6. Absolute Maximum Ratings Condition Min Max Power Supply oltage ( DD to ss) -0.5 +7 Analog Input oltage (IN+ or IN-) ss-0.5 DD +0.5 PDB Input oltage ss-0.5 +7 Operating Temperature Range -40 C +5 C Junction Temperature +50 C Storage Temperature Range -65 C +50 C Lead Temperature (soldering, 0sec) +300 C Package Thermal Resistance (T A =+5 ) SOP4, θ JA 90 C TSSOP4, θ JA 00 C Note: Stress greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions outside those indicated in the operational sections of this specification are not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. A0 8/6
6. Electrical Characteristics ( DD = +5, ss = 0, CM = 0, OUT = DD /, R L =00K tied to DD /, SHDNB = DD, T A = -40 C to 5 C, unless otherwise noted. Typical values are at T A =+5 C.) (Notes ) Parameter Symbol Conditions Min. Typ. Max. Units Supply-oltage Range Guaranteed by the PSRR test. - 5.5 Quiescent Supply Current (per Amplifier) DD DD = 5 30 40 60 μa Input Offset oltage OS - 0.5 5 m Input Offset oltage Tempco Δ OS /ΔT - - μ/ C Input Bias Current I B (Note ) - 0 - pa Input Offset Current I OS (Note ) - 0 - pa Input Common-Mode oltage Range CM -0. - DD +0. Common-Mode Rejection Ratio CMRR DD =5.5 ss-0. CM DD +0. 55 65 - db ss CM 5 60 80 - db Power-Supply Rejection Ratio PSRR DD = +.5 to +5.5 75 94 - db Open-Loop oltage Gain A DD =5, R L =00k, 0.05 O 4.95 00 0 - db DD =5, R L =5k, 0.05 O 4.95 70 80 - db Output oltage Swing OUT IN+ - IN- 0m DD - OH - 6 - m R L = 00k to DD / OL - SS - 6 - m IN+ - IN- 0m DD - OH - 60 - m R L = 5k to DD / OL - SS - 60 - m Output Short-Circuit Current I SC Sinking or Sourcing - 40 - ma Gain Bandwidth Product GBW A = +/ - - MHz Slew Rate SR A = +/ - 0.6 - /μs Settling Time t S To 0.%, OUT = step A = +/ - 5 - μs Over Load Recovery Time IN Gain= S - - μs Input oltage Noise Density e n ƒ = 0kHz - 0 - n/hz Note : All devices are 00% production tested at T A = 5 C; all specifications over the automotive temperature range is guaranteed by design, not production tested. Note : Parameter is guaranteed by design. A0 9/6
6.3 Typical characteristics At T A =+5 C, R L =00 kω connected to S / and OUT = S /, unless otherwise noted. A0 0/6
At T A =+5 C, R L =00 kω connected to S / and OUT = S /, unless otherwise noted. Sourcing Current I Q Sinking Current I SC s=±.5 G=-5 IN =500m G=-, R FB =00KΩ G=+, R FB =00KΩ Phase Rising Edge Gain Falling Edge A0 /6
7. Ordering Information GT XXXX - XX X X Temperature Range I Industrial: -40 C~+5 C Pb Status G GREEN Package Type: G4 Z4 SOP4 TSSOP4 Part Number Giantec Prefix GT Giantec Order Number Package Description Package Option GT734-G4GI-TR SOP4 Tape and Reel 3000 GT734-Z4GI-TR TSSOP4 Tape and Reel 3000 A0 /6
8. Part Markings 8. GT734-G4GI (Top iew) G T 7 3 4 G 4 G I Lot Number Y Y W W S GT734G4GI Lot Number States the last 9 characters of the wafer lot information Pin Indicator YY Seal Year 00 = 000 0 = 00 99 = 099 WW Seal Week 0 = Week 0 = Week... 5 = Week 5 5 = Week 5 S Subcon Code J = ASESH L = ASEKS Die ersion A0 3/6
9. Package Information 9. SOP4 A0 4/6
9. TSSOP4 A0 5/6
0. Revision History Revision Date Descriptions A0 Sept.,0 Initial ersion A0 6/6