ASML s customer magazine

Similar documents
Holistic View of Lithography for Double Patterning. Skip Miller ASML

EUVL Scanners Operational at Chipmakers. Skip Miller Semicon West 2011

TWINSCAN XT:1950i Water-based immersion taken to the max Enabling fast, single-exposure lithography at sub 40 nm

EUVL getting ready for volume introduction

Bank of America Merrill Lynch Taiwan, Technology and Beyond Conference

Status and challenges of EUV Lithography

DUV. Matthew McLaren Vice President Program Management, DUV. 24 November 2014

Holistic Lithography. Christophe Fouquet. Executive Vice President, Applications. 24 November 2014

Optics for EUV Lithography

immersion optics Immersion Lithography with ASML HydroLith TWINSCAN System Modifications for Immersion Lithography by Bob Streefkerk

Competitive in Mainstream Products

Imaging for the next decade

Metrology in the context of holistic Lithography

Progress in full field EUV lithography program at IMEC

Registration performance on EUV masks using high-resolution registration metrology

EUV Supporting Moore s Law

EUV is progressing towards production

NXE: 3300B qualified to support customer product development

16nm with 193nm Immersion Lithography and Double Exposure

22nm node imaging and beyond: a comparison of EUV and ArFi double patterning

EUV lithography: today and tomorrow

Impact of 3-D Mask Effects on CD and Overlay over Image Field in Extreme Ultraviolet Lithography

Actinic Review of EUV Masks: Status and Recent Results of the AIMS TM EUV System

Public. Introduction to ASML. Ron Kool. SVP Corporate Strategy and Marketing. March-2015 Veldhoven

Intel Technology Journal

Benefit of ArF immersion lithography in 55 nm logic device manufacturing

Lithography. International SEMATECH: A Focus on the Photomask Industry

Spring of EUVL: SPIE 2012 AL EUVL Conference Review

Actinic Review of EUV Masks: Performance Data and Status of the AIMS TM EUV System

Lithography on the Edge

Process Optimization

UV Nanoimprint Stepper Technology: Status and Roadmap. S.V. Sreenivasan Sematech Litho Forum May 14 th, 2008

Closed Loop Registration Control (RegC ) Using PROVE as the Data Source for the RegC Process

Optical Microlithography XXVIII

Improving registration metrology by correlation methods based on alias-free image simulation

Update on 193nm immersion exposure tool

High-NA EUV lithography enabling Moore s law in the next decade

Reducing Proximity Effects in Optical Lithography

Analysis of Focus Errors in Lithography using Phase-Shift Monitors

IMEC update. A.M. Goethals. IMEC, Leuven, Belgium

What s So Hard About Lithography?

The future of EUVL. Outline. by Winfried Kaiser, Udo Dinger, Peter Kuerz, Martin Lowisch, Hans-Juergen Mann, Stefan Muellender,

450mm silicon wafers specification challenges. Mike Goldstein Intel Corp.

INSPECTION AND REVIEW PORTFOLIO FOR 3D FUTURE

MAPPER: High throughput Maskless Lithography

ASML, Brion and Computational Lithography. Neal Callan 15 October 2008, Veldhoven

Correcting Image Placement Errors Using Registration Control (RegC ) Technology In The Photomask Periphery

Facing Moore s Law with Model-Driven R&D

From ArF Immersion to EUV Lithography

Mask Technology Development in Extreme-Ultraviolet Lithography

The End of Thresholds: Subwavelength Optical Linewidth Measurement Using the Flux-Area Technique

2008 European EUVL. EUV activities the EUVL shop future plans. Rob Hartman

450mm and Moore s Law Advanced Packaging Challenges and the Impact of 3D

Discovering Electrical & Computer Engineering. Carmen S. Menoni Professor Week 3 armain.

Experimental Study of Effect of Pellicle on optical Proximity Fingerprint for 1.35 NA immersion ArF Lithography

Electron Multi-Beam Technology for Mask and Wafer Direct Write. Elmar Platzgummer IMS Nanofabrication AG

Imec pushes the limits of EUV lithography single exposure for future logic and memory

Lithography. Development of High-Quality Attenuated Phase-Shift Masks

EUV lithography: status, future requirements and challenges

Sub-12nm Optical Lithography with 4x Pitch Division and SMO-Lite

Synthesis of projection lithography for low k1 via interferometry

Tutor43.doc; Version 8/15/03 T h e L i t h o g r a p h y E x p e r t (November 2003)

Leadership Through Innovation Litho for the future

Market and technology trends in advanced packaging

Section 2: Lithography. Jaeger Chapter 2. EE143 Ali Javey Slide 5-1

Light Sources for EUV Mask Metrology. Heiko Feldmann, Ulrich Müller

MICROBUMP LITHOGRAPHY FOR 3D STACKING APPLICATIONS

Intel's 65 nm Logic Technology Demonstrated on 0.57 µm 2 SRAM Cells

EUV Light Source The Path to HVM Scalability in Practice

Optolith 2D Lithography Simulator

450mm patterning out of darkness Backend Process Exposure Tool SOKUDO Lithography Breakfast Forum July 10, 2013 Doug Shelton Canon USA Inc.

OPC Rectification of Random Space Patterns in 193nm Lithography

Computational Lithography Requirements & Challenges for Mask Making. Naoya Hayashi, Dai Nippon Printing Co., Ltd

Optical Proximity Effects

Results of Proof-of-Concept 50keV electron multi-beam Mask Exposure Tool (emet POC)

Advanced Patterning Techniques for 22nm HP and beyond

Eun-Jin Kim, GukJin Kim, Seong-Sue Kim*, Han-Ku Cho*, Jinho Ahn**, Ilsin An, and Hye-Keun Oh

OPTICAL LITHOGRAPHY INTO THE MILLENNIUM: SENSITIVITY TO ABERRATIONS, VIBRATION AND POLARIZATION

Decomposition difficulty analysis for double patterning and. the impact on photomask manufacturability

Lecture 7. Lithography and Pattern Transfer. Reading: Chapter 7

Copyright 2000, Society of Photo-Optical Instrumentation Engineers This paper was published in Optical Microlithography XIII, Volume 4000 and is made

Optical Lithography. Here Is Why. Burn J. Lin SPIE PRESS. Bellingham, Washington USA

Demonstrating Commitment in the New Veldhoven Demo Lab

Mirror-based pattern generation for maskless lithography

Design Rules for Silicon Photonics Prototyping

Intel. Moving immersion into production. Intel and ASML. System flexibility through enhancement packages. Special Edition 2006

Laser bandwidth effect on overlay budget and imaging for the 45 nm and 32nm technology nodes with immersion lithography

Pupil wavefront manipulation for optical nanolithography

ASML Market dynamics. Dave Chavoustie EVP Sales Analyst Day, September 30, 2004

* AIT-5: Maskless, High-NA, Immersion, EUV, Imprint

Section 2: Lithography. Jaeger Chapter 2 Litho Reader. The lithographic process

Evaluation of Technology Options by Lithography Simulation

Light Source Technology Advances to Support Process Stability and Performance Predictability for ArF Immersion Double Patterning

EUV: Status and Challenges Ahead International Workshop on EUVL, Maui 2010

Section 2: Lithography. Jaeger Chapter 2 Litho Reader. EE143 Ali Javey Slide 5-1

TSMC Property. EUV Lithography. The March toward HVM. Anthony Yen. 9 September TSMC, Ltd

In-line focus monitoring and fast determination of best focus using scatterometry

Flare compensation in EUV lithography

Optical Lithography. Keeho Kim Nano Team / R&D DongbuAnam Semi

Innovative Mask Aligner Lithography for MEMS and Packaging

Transcription:

ASML s customer magazine 211 Winter Edition TWINSCAN NXT extends immersion performance EUV is in customers hands Holistic Litho improves on-product overlay

6 1 24 3 Editor s note 4 ASML in the News 6 More Good Wafers 1 EUV is in customers hands 12 Tachyon NXE: The speed you want, the accuracy you need 17 New light on cooperation 2 Wave hello to larger process windows 24 Stellar metrology accuracy boosts on-product overlay 27 PAS 55 steppers bring new benefits to the LED market images Colofon Editorial Board Lucas van Grinsven, Peter Jenkins Managing Editor Ryan Young Contributing Writers Matthew McLaren, Ron Schuurhuis, Stuart Young, Keith Gronlund, Frank Driessen, Bernardo Kastrup, Henk Niesing, Angelique Nachtwein, Hans Bakker, Kaustuve Bhattacharyya, Arie den Boef and Rutger Voets Circulation Emily Leung, Michael Pullen, Shirley Wijtman For more information, please see: www.asml.com/images 21, ASML Holding BV ASML, ASM Lithography, TWINSCAN, PAS 55, PAS 5, SA 52, ATHENA, QUASAR, IRIS, ILIAS, FOCAL, Micralign, Micrascan, 3DAlign, 2DStitching, 3DMetrology, Brion Technologies, LithoServer, LithoGuide, Scattering Bars, LithoCruiser, Tachyon 2., Tachyon RDI, Tachyon LMC, Tachyon OPC+, LithoCool, AGILE, ImageTuner, EFESE, Feature Scan, T-ReCS and the ASML logo are trademarks of ASML Holding N.V. or of affiliate companies. The trademarks may be used either alone or in combination with a further product designation. Starlith, AERIAL, and AERIAL II are trademarks of Carl Zeiss. TEL is a trademark of Tokyo Electron Limited. Sun, Sun Microsystems, the Sun Logo, iforce, Solaris, and the Java logo are trademarks or registered trademarks of Sun Microsystems, Inc. in the United States and other countries. Bayon is a trademark of Kureha Chemical Industry Co. Ltd. Nothing in this publication is intended to make representations with regard to whether any trademark is registered or to suggest that any sign other than those mentioned should not be considered to be a trademark of ASML or of any third party. ASML lithography systems are Class 1 laser products. 2

ASML Images, Winter Edition 211 Editor s note It s an exciting time in the semiconductor industry By Ryan Young, Senior Manager Communications As I write this, 21 is coming to a close and I can t help but reflect on what a year it s been in the semiconductor industry. Who would have thought that this industry, which nearly came to a standstill in early 29, would rebound so quickly and so strongly? 21 semiconductor industry growth looks to finish north of 3%, and while specific figures vary, industry analysts agree that growth is expected to continue in 211. Much of this growth is, and will continue to be driven by the mobile internet, specifically tablets and smartphones. Apple s ipad has been wildly successful with an estimated 13 million units sold in its first year, while unit forecasts for 211 are upwards of 4 million. More importantly, the ipad launched the tablet revolution which is quickly being joined by numerous competing products, notably the Samsung Galaxy Tab, and tablets from Toshiba and Dell. Meanwhile, IDC forecasts the smartphone market to grow by 14% in 21 and 24.5% in 211. These technology revolutions are made possible of course by chipmakers adherence to Moore s Law. Shrink remains the most efficient way to drive down manufacturing costs while at the same time decreasing device size, reducing power requirements, and improving performance. At ASML our aim is to support you in your shrink roadmap by providing the lithography solutions you need today and tomorrow, whether you opt for immersion supported by advanced applications and integrated metrology, or EUV, or a combination of both. It appears that double-patterning down to just under 2-nm half-pitch will be possible using 193-nm immersion lithography but at the expense of design restrictions and extra processing steps. Our TWINSCAN NXT platform is rising to the occasion. NXT systems are now leaving the factory at 175 wph, and doing so with improved imaging and overlay performance. Adding a FlexRay programmable illuminator to your NXT system takes your imaging performance to new levels by giving you complete and rapid control of pupil shape dynamics. Much faster than Diffractive Optical Elements (DOEs), FlexRay improves imaging while saving you time and money. In addition, our new FlexWave product allows you to create almost any wave front in the projection lens of your NXT:195i system. You can use these wave fronts to compensate for aberrations and lens heating effects, or to optimize the wave front mask effects. The end result is better on-product overlay and focus control for larger process windows. Apart from ongoing innovations on the scanner itself, ASML continues to develop complimentary products and services to improve overall litho performance through Holistic Lithography solutions. Eclipse packages leverage our in-depth cooperation to deliver customer-specified on-product performance. Through Eclipse you can move through your development and ramp-up stages faster and reach a higher line yield. Another key aspect of Holistic Lithography is the robust post-patterning metrology solution available with YieldStar. YieldStar provides unrivalled overlay measurement accuracy, reveals the root cause of process drift faster and implements higher-order process control. Looking forward, imaging below 2-nm half-pitch will require EUV lithography. ASML s second-generation EUV system, the NXE:31 has begun shipping to customers. We will build a total of six of the NXE:31 systems which will be used for pre-production and EUV process development. We re already investing in the third-generation systems; the NXE:33B will start to ship to customers in 212. Our Brion division is preparing computational lithography solutions for EUV volume production. Tachyon NXE was announced in September and will reduce both the development time and cost to produce chips on EUV systems. At ASML, we appreciate how busy you must be during this steep upturn and we want to assure you that we too are fully engaged and committed to supporting your current business while planning to meet your future roadmap requirements. We re grateful for your business and for the strong recovery we ve all experienced in 21. I hope you have a happy and prosperous 211. Regards, Ryan Young 3

ASML ASML in the News ASML TWINSCAN Systems Surpass 4, Wafers Per Day Milestone in the News Tokyo, Japan, December 1, 21 ASML announced that two chipmakers using TWINSCAN semiconductor lithography scanners have set a new productivity record of imaging more than 4, silicon wafers within 24 hours. The milestone has been reached by an XT:87 and an XT:4, which are in operation at two different customer sites in Asia and which have raised the bar for 3mm lithography productivity. ASML and its customers are mutually engaged to continuously increase the value of ASML scanners by pushing to increase their productivity. ASML strives to develop improvements to scanner hardware and software while chipmakers fine-tune their chip recipes and manufacturing processes. Chip Makers Adopt ASML s Holistic Lithography to Continue Moore s Law San Francisco, Calif., July 13, 21 - At SEMICON West ASML announced broad customer adoption of holistic lithography products which optimize semiconductor scanner performance and provide a faster start to chip production. 1% of ASML s leading-edge scanners are now sold with one or more holistic lithography components. Semiconductor manufacturers face increasingly smaller margins of error as they shrink chip features. Holistic lithography provides a way to shrink within these margins to continue Moore s Law. Introduced a year ago at SEMICON West 29 ASML s holistic lithography suite of products enable continued shrink and provide customers with higher yield, sooner. Holistic lithography integrates computational lithography, wafer lithography and process control to optimize production tolerances and reduce time to money for chip makers. All of our customers have adopted multiple products from the holistic product portfolio into research & development (R&D) as well as volume manufacturing. Products like Source Mask Optimization (SMO), FlexRay, LithoTuner, Baseliner and YieldStar are in use worldwide. ASML also offers holistic lithography as an integrated package called Eclipse TM, which is tailored to a specific customer, node and application, and which enables chip makers to squeeze every last bit of performance out of the chip making process and to enter volume production at the earliest possible time. A significant number of ASML s advanced customers have adopted an integrated Eclipse package. 4

ASML Images, Winter Edition 211 For complete information regarding these press announcements, please refer to the press section of www.asml.com. ASML and Brion Unveil Software that will Optimize EUV Manufacturing of the Most Advanced Chips Monterey, Calif., September 14, 21 - Next generation semiconductor production will be facilitated by a new product introduced by Brion Technologies, a division of ASML. Brion s new Tachyon NXE provides accurate predictive modeling specifically for ASML Extreme Ultraviolet (EUV) scanners, the upcoming technology for the chip industry which will enable smaller, faster, cheaper and more energy-efficient semiconductors. The accurate EUV modeling in Tachyon NXE will reduce both the development time and cost to produce chips on EUV systems. The Tachyon NXE software package seamlessly integrates with existing Tachyon products to enable the simulation of the EUV lithography process. In developing Tachyon NXE, Brion has incorporated TWINSCAN NXE:31 scanner characteristics, models, and data to accurately describe the optical performance of the system. By simulating the behavior of the new scanner in software, this Tachyon NXE model can efficiently predict and correct NXE-specific effects before the start of chip production, helping to decrease EUV mask re-spins and shorten the learning cycles during final mask development. ASML Immersion Systems Reach Million Wafer Club Status at Korean Memory Manufacturers Veldhoven, the Netherlands, May 26, 21 - ASML announced that four TWINSCAN XT:19Gi lithography systems have joined ASML s One Million Wafer Club of scanners that have processed more than one million silicon wafers within 12 months, underlining the importance and acceptance of this advanced technology in mainstream chip manufacturing. The four XT:19Gi systems, the first immersion scanners to reach the million wafer milestone, operate at two Korean chipmakers in three different facilities in two countries. Several more immersion systems at these sites are expected to reach this same milestone in the next few months. The XT:19Gi immersion systems join an additional 161 dry systems in the One Million Wafer Club. 5

More Go Increased productivity doesn By Matthew McLaren, Director of Product Management, and Ron Schuurhuis, 6

ASML Images, Winter Edition 211 od Wafers: t need to cost performance Product Manager Abstract With more than two dozen systems in volume production at fabs around the world, and more than 5 million wafers processed to date the TWINSCAN NXT:195i is helping chipmakers produce next-generation devices. Recent improvements, systems extensions and upgrades to the NXT:195i provide enhanced imaging, overlay and throughput for nodes as small as 22-nm. TWINSCAN NXT:195i systems are now leaving the factory operating at 175 wafers per hour (wph) and field upgrades for systems already shipped are ongoing. Interestingly, the upgraded productivity comes with improvements to the dynamic performance of the stage, maintaining imaging and overlay performance even at these higher throughputs. Imaging Preventing imaging and overlay performance degradation when increasing throughput is a key challenge in the evolution of any scanner and all the more challenging on immersion systems. Increased wafer stage acceleration and reduced settle time in particular can have a negative effect on imaging and overlay if the motion control of the stage is not adapted to compensate for the more aggressive stage parameters. In addition to the inherent stiffness in the hardware design of the wafer stage, positioning errors in x, y (overlay) and z (imaging) can be suppressed by adapting the sensitivity of the servo controller to the changing frequency spectrum at different wafer stage settings. In the case of the most recent productivity upgrade of the TWINSCAN NXT:195i to 175wph, the revised servo tuning delivered at least comparable imaging and overlay performance when compared with lower productivity settings ensuring more good wafers out. See Fig 1 7

Pattern defect performance improves at 4 4.5 Spec (nm) XT:19 (mean + Sigma) XT:195 (mean + Sigma) NXT:195i 11 wph NXT:195i 15 wph NXT:195i 175 wph higher throughput and for high contact angle material. Big bubbles, printed particles and other defects are all reduced at the 175wph spec due to optimised wafer stage settings. See Fig 2 3 2.5 2 1.5 1 The NXT:195i can also leverage new innovations such as the FlexRay custom illuminator and FlexWave programmable wavefront generator. CDU 4 nm iso CDU 45 nm dense.5 inter field intra field CDU 4 nm iso Spec (nm) XT:19 XT:195 inter field intra field CDU 45 nm iso NXT:195i 11wph NXT:195i 15wph inter field 3. 1.6 1.5 1.6 1.4 1.2 intra field 1.8 1. 1.1.9.6.6 inter field 3.5 1.7 1.5 1.2 1.1.9 intra field 2.5 1.3 1.2 1.2 1.1 1. NXT:195i 175wph Figure 1: Revised servo tuning delivers equal or improved overlay performance at higher throughputs FlexRay takes your imaging performance to new levels by giving you complete and rapid control of pupil shape. During R&D cycles, tighter pupil specs combined with instant turn around time of new pupils enables fast and effective litho process optimization. When transferring into volume production the pupil tunability enables improved tool-to-tool OPC matching and a faster yield ramp. FlexRay is even more powerful when used together with Tachyon SMO for source-mask optimization. Big bubbles Other immersion Printing particles Edge speed optimeiser mena defect count 2. 15. 1. 5.. Spec 11wph 15wph Spec TCX 41 68 o SRCA 175wph Spec 11wph Printing particles Other immersion All Big bubbles 15wph Spec AIM 5484 79 o SRCA LOW LOW LOW LOW HIGH HIGH Averaged 8 systems 8 systems 1 system 3x 15 systems 175wph 7 systems 1 system 3x Figure 2: Better defect performance for higher throughputs and high contact angle material FlexWave allows you to create almost any wavefront you like in the project lens of your TWINSCAN NXT:195i system. You can use these wavefronts to compensate for aberrations and lens heating effects, or to optimize the wave front to suit a specific mask. The end result is better on-product overlay and focus control for larger, more robust process windows. See Fig 3 Overlay At 175wph the TWINSCAN NXT:195i has demonstrated Dedicated Chuck Overlay (DCO) of ~2 nm overlay under all test conditions including single-day, multiday, full lot, mixed wafer sequences, etc. Single Machine Overlay (SMO) of 2.9 nm has been demonstrated showing system stability over time. Also a wafer recently processed during a Factory Acceptance Test (FAT) became the first with sub 1 nm overlay showing the further potential of the NXT platform. See Figs 4-6 8

ASML Images, Winter Edition 211 Conclusion By optimizing the entire system the improvement of throughput to 175 wph comes with real value of not only more, but better wafers. And we re not finished yet. A PEP package that will drive throughput above 2 wph is coming in 211. The extendibility of the TWINSCAN NXT platform will continue to meet the industry roadmap for shrink. Figure 3 target 8 6 Lot (1.4,1.11) X Y 4 2 1.7 1.16.95.92 1.4 1. 1.1 1.15 1 2 3 4 Figure 4 8 6 Lot (1.7,1.7) X Y 8 6 8 Lot (2.9,2.7) Lot (2.9,2.7) 6 X Y X Y 4 4 4 2 2 2 Lot 1 2 3 4 5 6 7 8 9 1 11 12 (1.4,1.) (1.9,1.6) (1.5,2.1) 3 days DCO: 2.1nm 1 1 2 2 3 3 3 days 3 days SMO: SMO: 2.9nm 2.9nm Figure 5 8 6 Lot (1.4,1.11) 68 fields; filter X Y 4 2 5 1 15 2 25 Figure 6: a 25 wafer DCO lot at 175wph, showing <2nm over the whole wafer (including the edge fields) 9

EUV is in customers hands By Stuart Young, Senior Product Manager EUV Abstract The first TWINSCAN NXE:31 scanner has been shipped to a customer and is on schedule to start exposing wafers before the end of this year. ASML and its partners are already investing in next-generation EUV scanners to ensure the technology is available for mass-market manufacturing. 1

ASML Images, Winter Edition 211 architectures have been exposed on the NXE:31 systems including Flash and SRAM device images printed at resolutions down to the 16-nm node. The NXE:31 is our second-generation EUV scanner, following our alpha demo tools (ADTs) operating at IMEC in Belgium and CSNE in the USA. It has a numerical aperture (NA) of.25 and a specified resolution of 27 nm. In all, six of these scanners will be produced. Besides the shipped system, four others are now mechanically complete including the source and the sixth is in the last stages of integration. All systems are currently undergoing performance and reliability testing. Figure 1:.75µm 2 bit cell-size, 78 x 96 nm minimum pitch Figure 2: 27nm half pitch flash gate layer across the imaging slit The first TWINSCAN NXE:31 scanner has been shipped to a customer fab Extreme ultraviolet (EUV) lithography is now in the hands of ASML s customers. The first of our TWINSCAN NXE:31 scanners has been shipped to a customer fab. And it is planned to begin exposing product wafers by the end of December. Those wafers will be the first EUV wafers ever exposed on an EUV scanner at a semiconductor manufacturer s production facility. But they won t be the first EUV wafers exposed by customers on an NXE:31. Over the last few months, a number of customers have visited our new EUV assembly facilities to see a working NXE:31 in action and to expose wafers for themselves. A wide range of device Strong industry pull There is a strong demand for production EUV scanners from manufacturers across the semiconductor industry. All six of our NXE:31 systems were ordered some time ago, and a number of customers have already placed orders for our thirdgeneration EUV scanner the NXE:33B. The NXE:33B will have an NA of.32 and a throughput of 125 wafers per hour. Planned for delivery in 212, it will target volume production at the 22-nm half-pitch node. Our optics partner, Carl Zeiss SMT AG, has already started making the mirrorbased projection lenses that the system will use. We also have multiple partners on board to deliver EUV sources. This early investment in the NXE:33B shows that the commitment to EUV of ASML and its strategic partners is as strong as the demand from the industry for this new technology. Supporting that commitment, ASML and Brion have released a new version of the successful Tachyon computation lithography platform (see article page 12). Tachyon NXE provides accurate predictive modeling specifically for the TWINSCAN NXE:31 allowing customers to optimize volume EUV manufacturing processes. NXE:33B scanner models and further EUV-specific computational lithography products will be available in the near future. 11

Tachyon NXE: the accuracy By Keith Gronlund, Senior Manager Product Marketing and Frank Driessen, Senior 12

ASML Images, Winter Edition 211 The speed you want, you need Marketing Manager, Eclipse Abstract Tachyon NXE is a computational lithography (c-litho) product that has recently been released by ASML Brion in close cooperation with ASML s TWINSCAN NXE team. The product is part of the Holistic Lithography approach of ASML and provides accurate predictive modeling of ASML s Extreme Ultraviolet (EUV) scanners that are now shipping to chipmakers. Tachyon NXE meets customers needs for accurate full-field correction (OPC) and verification for high-volume manufacturing (HVM). It addresses several EUV-specific effects using knowledge of both the mechanical and optical design of the NXE scanners as well as their EUV plasma sources. Hence, Tachyon NXE becomes an important asset for ASML s customers to push the NXE scanners to further CD shrinks. Illuminator pupil support Generic EUV Mask Effects Tachyon NXE supports all NXE:31 Tachyon NXE also addresses an effect illumination shapes via a pupil model in EUV lithography known as mask-3d dataset from Zeiss. Available illumination shadowing that results from the nonperpendicular angle of incidence of the modes are displayed in Fig. 1. illumination. The finite thickness of the For non-circular-symmetric illumination absorber material then causes a shadow profiles, such as dipole illumination, a the size of which depends both on the through-slit pupil rotation occurs on the orientation of the mask feature and on its NXE:31 as shown in Fig. 2. This pupil location on the mask relative to the slit. rotation will not be present from the The left part of fig 3 shows a schematic NXE:33 scanners onwards by design. of the effect and the right plot shows Tachyon NXE supports the imaging the biases that need to be corrected to Accurate, compact & fast full field EUV correction & verification effects of this through-slit rotation that compensate this effect. It is clear that are caused by a slightly reduced overlap mask-3d shadowing extends across the of the diffraction orders. For dense-l/s entire image-field. applications such as DRAM and FLASH these effects are small, on the order of Accurate modeling of intra-field flare.4 nm center-edge differences because The TWINSCAN NXE reflective projection the width of the poles and spot positions lens projects the diffracted mask pattern were designed to keep maximum overlap on to the wafer via the exit-aperture. of the diffraction orders. One of the well-known key items in EUV lithography is the relatively high level of For non-dense patterning and dipole flare that is related to the short wavelength illumination, pitch regions exist with of 13.5 nm. a center-edge CD difference of 3 nm. OPC applications can easily correct Accurate prediction of flare effects is this prior to mask tape-out and/or Litho important because 1% flare approximately Manufacturability Check (LMC) verification translates into.8 nm CD difference on the can detect and prevent any imaging wafer. Tachyon NXE includes proprietary error caused by it. The effect is of no flare modeling to properly address and importance for conventional and annular correct these errors. illumination modes. 13

In figure 4 we show the impact of intrafield flare for a 25 nm HP DRAM layout. The Tachyon NXE additionally models mechanical parts of the NXE that actually reduce the average flare level. The left picture shows the traditional flare map whereas the right picture shows the accurate Tachyon NXE effective flare map result. Note that differences between the plots are NOT constant throughout the field: in the vertical across-scan direction up to.9% and in the horizontal across-slit direction up to 1.1% differences are found between the maps. The accuracy of this model has been recently confirmed on wafer at IMEC (G. Lorusso et al., Oct. 21, internal meeting and to be published). The early experiments at IMEC show that the flare signature through slit is much better described when accounting for longrange exit-aperture effects modeled in the Tachyon NXE: the difference between measured and simulated flare improves 2 to 3 times when using the Tachyon affect imaging. Figure 5 shows a full-field flare map from Tachyon NXE for the case of a DRAM poly layer. At the edges of the image field, and in particular in the corners where three neighbor-fields are of influence, the mask-bb effects can be clearly identified to result in enhanced flare levels that will have an impact on CD. This picture also makes clear that to correct these long-range effects on CD well, a full-field OPC correction run is required, in contrast to the age of immersion ArF for which full-chip OPC correction runs were sufficient with repetition of the results by placement of multiple identical post- OPC chips on the mask. This inter-field effect has also been verified on the wafer. The left side of Fig.6 shows results on the alpha-demo-tool (ADT) at IMEC (E. van Setten et al, Photomask 21 (BACUS) and (G. Lorusso et al., Oct. 21, internal meeting and to be published)). This early ADT tool has a high level of flare (~14%) compared to the NXE:31 (<5% measured) and is therefore very Seamless integration with existing Tachyon applications (i.e. OPC+, LMC) Fig. 1: Illumination shapes supported on the NXE:31 y Field Pupil Fig. 2: Rotation of the pupil through slit and schematic for NXE:31 (only) x NXE model. This will translate in an improvement of CDU accuracy across the field of about 1 to 1.5 nm. Inter-field flare: black on EUV masks is not really black Black-borders on an EUV mask consist of the MoSi multi-layer stack and an absorber stack: however, this total stack does reflect some EUV light due to thinfilm interference. The thickness of the absorber layer is a compromise between partial EUV reflectivity, for thin absorbers, and higher mask-3d (shadowing) effects for thick absorbers. So, the mask blackborder (BB) is not black for EUV but has a certain reflectivity such that unwanted light can go into the projection lens. The REMA blades should in principle prevent this from happening but, due to the finite distance between Rema blades and reticle, an EUV half-shadow effect occurs (penumbra), hence, EUV light from the mask-bb does well suited to verify predictions made by flare models. Figure 6 shows that the line-cd of a feature close to the edge of the slit (in this case located at x=12.72 mm) is decreased when a neighbour-field is exposed. The CD decreases with the distance to the neighbour-field because of mask-bb EUV reflections and the REMA half-shadow effect: the sloped CD part from field-distances between 25 and 6 micron results from the half-shadow effect, the flat part between and 25 micron is caused by mask-bb reflections. Results for features horizontally and vertically positioned in the slit are displayed. The right part of figure 6 shows the simulated result from the Tachyon model. Clearly the same trends are observed: a flat region up to ~25 micron, a sloped region up to ~6 micron, and ~1nm offset between H and V features. It must be mentioned that the results are not fully 14

ASML Images, Winter Edition 211 identical because the model was calibrated with different mask and resist processes. The mask used for this test contained a so-called thin absorber layer of 44nm, which has a relatively high reflectivity for EUV. The industry mask standard at the moment uses a thick absorber layer of 56 nm and with such a mask, the absolute CD differences will be approx. 1/3 of the values shown in Fig. 6. Nonetheless, it is important to correct these systematic effects at borders and especially corners prior to mask tape-out. shadow bias (nm) CD Bias to compensate EUV shadow effect -.5-1 -1.5-2 -2.5-3 -3.5-15 -1-5 5 1 15 slit position (mm) Fig 3: Mask shadowing requires a polygon-orientation and slit-position-dependent bias compensation. 9 45 135 The improvements that can be obtained in terms of CD distribution on the wafer while using a Tachyon NXE flare model in OPC instead of a standard flare model are shown by simulations in figure 7. The typical or default flare based OPC printing results on the left show a wide range of CD distributions at unacceptably small values; the Tachyon NXE OPC predicted results are nicely on target at 3nm with a very narrow distribution. Apart from detailed flare knowledge, Tachyon NXE has knowledge of other NXE-optics characteristics per machine such as apodization and aberrations. The NXE:31 is specified for the 27-nm node and the NXE-optics then have a negligible effect on printing. However, some of ASML s customers want to use the NXE:31 to shrink their devices even further. As an example, the CD-differences between edge and center of the slit were studied for 24-nm dense L/S using dipole-x 75 illumination for these machine data. Machine data here means the effects of apodization, aberration and source-pupil maps. The left-hand bar in figure 8 shows the edge-center CD difference of ~1.1 nm without taking machine data into account. The subsequent bars show that the throughslit CD difference reduces upon including more and more machine information in the Tachyon NXE model, thereby allowing the user to improve on CD uniformity. Fig. 4: Flare maps generated without (left) and with (right) NXE-specific machine characteristics. Differences are not constant through the field. Fig. 5: Flare map that includes the effects of neighboring field exposures without separating distance between the dies. The main cause of this border-effect is the mask-black-border reflection. CD [nm] CD [nm] 35 33 31 29 27 25 CD drop due to Mask-BB reflection: Wafer data ADT 23 2 4 6 8 1 Distance to a neighbor die [µm] 35 33 31 29 27 25 CD drop due to Mask-BB reflection: Tachyon simulation H exp V exp H exp V exp 23 2 4 6 8 1 Distance to a neighbor die [µm] Fig. 6: CD reduction measured on the ADT system at IMEC as a function of the distance to neighbouring field (left) and the same configuration modeled by Tachyon NXE (right) for a thin-absorber mask. File size and runtime High-volume manufacturing (HVM) demands fast turn-around-time for product introductions. Modeling and correcting masks should take place within acceptable runtimes and with manageable file sizes. This is a special point of attention 15

because with EUV a number of the above described effects are very long-range in nature and could potentially flatten the full layout after OPC. Tachyon NXE seamlessly integrates with Tachyon OPC+ for which, despite the long-range EUV effects, dedicated EUV custom hierarchical layout operations are possible to achieve these manufacturing standards. Number of measurements Millions 9 8 7 6 5 4 3 2 Typical flare based OPC Number of measurements Millions 9 8 7 6 5 4 3 2 NXE flare aware OPC Figure 9 shows example results on a full-field state-of-the-art memory mask. The mask is an in-house 3 nm DRAM design. The flare tolerance was set to.3% using a Tachyon 3. system with 3 leafs. The output format is the industry-standard OASIS. The graph shows the strong reductions in file size that are obtained with Tachyon hierarchical operations compared with flat operation, and likewise shows the achieved strong runtime reduction for a full-field. This is done for two cases: the case on the right handles a full-field OPC run for long-range flare and (shorter-range) proximity; the case in the middle shows the full-field results when also the long-range effects of mask-bb reflection and maskshadowing are added. Both cases show excellent results for file size and runtime that are compliant with HVM needs. Outlook to the c-litho support for the NXE:33 and other applications. With NXE:31 being the tool that delivers EUV to our customers for their pilot and process-development purposes, the true workhorse of the industry will be the next family of tools NXE:33B/C. Tachyon NXE is committed to supporting and integrating with the NXE:33B/C and especially the full technical potential that its array of movable mirrors will provide. A multitude of illumination modes will be possible without loss of throughput. With that, applications such as source-mask optimization and scanner tuning for EUV appear on the roadmap. CD Error (nm) 1.2 1.8.6.4.2 No Machine Data DCD (center-edge slit) Correct 31 Rot. Pupil +Correct Pupil Detail Case 24nm HP, dipole - X 75. +Correct Aberrations +Correct Apodization (ALL) Fig. 8: EdgeCD minus CenterCD as a function of optics machine data for the NXE:31; case dipole illumination and 24 nm L/S. Run time (HR) 14 28.17 12 129 1 8 6 4 2 1 21 22 23 24 25 26 27 28 29 3 31 CD(nm) 1 21 22 23 24 25 26 27 28 29 3 31 CD(nm) Fig. 7: Wafer CD simulations obtained after OPC with either a typical flare model (left) and a Tachyon NXE model (right). Includes flare modeling, shadowing, and proximity effects Run time Output file size 2.31 2.53 1.3.26 Model based correction Flat HScan HScan Proximity Flare Mask black border Shadowing 3 25 2 15 1 5 Output file size (GB) Fig. 9: Full-field OPC results showing that very-long range EUV effects can be handled efficiently by Tachyon NXE. Strong improvements in file size and runtime are achieved. 16

ASML Images, Winter Edition 211 New light on cooperation By Bernardo Kastrup, Director Marketing for Eclipse, and Henk Niesing, Business Manager Eclipse Abstract The drive for high yields at small feature sizes is bringing new complexity to semiconductor manufacturing. ASML s new-look Eclipse offering helps bring the simplicity back. It provides a systematic structure for in-depth cooperation between ASML and semiconductor manufacturers focused on delivering customer-specified on-product performance. Eclipse projects combine proactive expert support with early access to new products and the promise of customized solutions in one tailor-made package. 17

Holistic Lithography lets you maximize your process window and yield at the smallest feature sizes by using degrees of freedom from one process step to compensate for issues arising in others. To help you implement Holistic Lithography in your fab, we created our Eclipse packages. Tailored to your particular needs, they help you solve specific production or development issues. However, the challenges of achieving high yields at smaller feature sizes and more complex geometries are driving other changes in the industry s way of working. Those changes are summed up in one word cooperation. Semiconductor manufacturers and their suppliers are working together more closely and from an earlier stage. Reflecting those changes, we ve improved our Eclipse offering to provide a systematic structure for that in-depth cooperation. A structure that helps you reduce your R&D cycle, accelerate ramp up and improve final yields. Eclipse is based on three pillars: create a budget breakdown. From that, dedicated support from ASML experts, they can extrapolate to new and better early access to new products and the solutions, allowing you to anticipate future availability of customized solutions. challenges. These pillars are combined into a flexible, tailor-made package designed to help you In addition, for each Eclipse engagement, achieve the on-product specifications you we will put into place a suitable project want faster and more cost-efficiently. management and issue escalation structure. From the start, we will sit Dedicated support down with you to agree on targets for ASML has always offered its customers the project, and we will commit ourselves expert application support, but Eclipse to meeting them. takes that to the next level. The resources you need are formally allocated to you, so Early access you can be sure that our experts will be Developing a new process typically available when you need them. And they takes around two years. In parallel to your play a pro-active role in supporting you. development, we are also developing new products and services to complement For example, as well as helping you our scanners. So we may already have address existing issues, they can planned a solution that could be useful analyze your current process and in your development project. Achieve the on-product specifications you want faster and more cost-efficiently From R&D to production faster To see how Eclipse could work for you, let s look at a typical challenge all semiconductor manufacturers face: bringing a new process to market fast to maximize your market opportunities. A key way to reduce your R&D cycle time is switch as much of your development as possible from experimental wafer lithography to computational lithography. The Tachyon suite from Brion gives you a solid foundation for doing that. Moreover, you can combine it with our FlexRay programmable illuminator, for faster and more flexible (free-form) source-mask optimization cycles. Through Eclipse, our experts can help you extract the maximum performance in your specific case. This could be through customized CD performance analyses or mask optimization recipes for Tachyon. They can also provide guidance on which parts of the Tachyon suite are best suited to your needs and how you can integrate them and FlexRay into your R&D workflow. Going further, our experts could also help you qualify your matched machine overlay (MMO) earlier. This is particularly valuable when you are trying to match layers that are printed using different technologies EUV and immersion ArF, for example and can significantly speed up your transition to production. The first step is to analyze your planned production lithography choices while you are still in the development phase. From that, we create an overlay budget breakdown to identify the key contributors to your MMO. We offer a wide range of overlay improvement options, including BaseLiner, Overlay Optimizer, and various TOP packages. Based on your overlay breakdown, our experts will work with yours to determine which of those options will help you most. Where necessary, they will tailor those options to suit you perhaps by customizing product interfaces to accelerate integration into your flow and provide you with early access to new functionality or products. 18

ASML Images, Winter Edition 211 In an Eclipse project, in addition to advice on selecting existing products, you can also get early access to solutions that are still in development. That could mean, for example, providing you with alpha versions of new software or allowing you to try out exposure recipes on prototypes of new hardware at our facilities in Veldhoven. Either way, through earlier access to new products, you can keep your own development moving forward on track. Customized solutions With early access comes the opportunity to customize solutions to your needs. For example, we could tailor the user interface and output formats of new software to suit your way of working and existing fab systems. According to your requirements, we could also adapt existing products for you perhaps providing additional functionality or cut-down versions as needed. And we can also support you on feasibility and impact analysis studies to explore all your possible options. Tailor-made for you The scope of an Eclipse project is up to you. It could be as broad as We want to print layer X with Y specifications. Or it could be as specific as a list of roadblocks that you ve already identified and would like help to overcome more quickly. Move through your development and ramp-up stages faster and reach a higher line yield But our focus and commitment is always the same to help you achieve the onproduct performance you specify in an agreed timeline. Working together in an Eclipse project, we aim to formalize the co-operation and provide you with the tools you need to move through your development and ramp-up stages faster and reach a higher line yield. Improving on-product performance Eclipse projects can be used to improve your on-product performance and system uptime, and hence your overall productivity. Such projects often involve using the scanner flexibility to compensate for off-scanner issues. An Eclipse project in the production phase would typically start with our people and your people carrying out a joint analysis of your situation to determine where you see bottlenecks and where improvements can be made. For example, if you wanted to improve your intra-field CDU performance, the analysis could potentially show that you need to address mask quality issues such as mask registration, global bias, so-called 3D effects and mask flatness. In this case, we might integrate our new FlexWave lens control option (see article page 2) and our LithoTuner in-fab computational lithography tools into a custom package that lets you compensate for all kinds of mask issues. To improve your on-product overlay, we d work with you to identify the root causes of your problems. These could well be off-scanner issues, with metrology and annealing steps common sources of overlay issues. Then, together, we d carry out a feasibility study to see which of our many overlay improvement products could help you address your issues. Step three could be to develop a partially customized metrology strategy that is tuned to your needs and circumstances. This could include a scatterometry mark design tailored to your layer stack and a custom sampling scheme that helps you balance performance and metrology time. Finally, we would work with your team to integrate all these elements into your flow with minimal disruption to production. 19

Wave hello to larger process windows By Angelique Nachtwein, Product Manager FlexWave, and Hans Bakker, Product Manager PG Applications Abstract FlexWave is a new lens control option that takes flexible optics to the next level. It allows you to create almost any wave front you like in the projection lens of your TWINSCAN system. You can use that to compensate for aberrations and lens heating effects, or to optimize the wave front to suit a specific mask. The end result is better on-product overlay and focus control for larger, more robust process windows. The more flexibility and control your scanner offers, the larger your potential process window and the better the yields you can achieve. That s why ASML is continually developing new features and options to increase the flexibility and control our lithography systems deliver. The latest in this line of developments is called FlexWave. It takes lens control to a completely new level allowing you to create almost any wavefront you like in the projection optics of your TWINSCAN scanner. This in turn lets you optimize your on-product overlay and imaging performance. FlexWave features a new lens manipulator that fits into the projection optics column of your TWINSCAN scanner. This manipulator offers significantly more flexibility than previous solutions: FlexWave can correct wavefronts with a spatial resolution equivalent to the first 64 Zernikes. See Fig. 1 Approaching the perfect lens So how does that flexibility benefit you? We see three key target applications for FlexWave. The first is extended wavefront compensation. In this application, you use FlexWave to reduce the aberration fingerprint of your projections lens. 2

ASML Images, Winter Edition 211 Reduce the aberration fingerprint of your projections lens Because you have access to a wider range of Zernike polynomials, you can achieve a much greater level of compensation. This brings your system closer to the theoretical perfect lens. Particularly useful when printing the smallest features, extended wavefront Fig. 1: Wavefronts for individual Zernikes 21

compensation helps minimize distortion differences between illumination modes and so improves your on-product overlay. See Fig. 2 1..8 Standard ALC-R Average simulation result cold lens ALC-XY FlexWave Taking the heat A second application is dynamic throughlot wavefront control. With throughputs extending towards 2 wafers per hour and the increasing use of extreme illumination modes that concentrate much of the laser light into small areas, today s manufacturing increases the risks of localized lens heating. Fig. 2 Rms Z5-Z64 [nm].6.4.2 Spherical Coma Astigm atism 3-foil Odd Even Total Dynamic through-lot wavefront control with FlexWave gives you much greater flexibility to compensate for the effects of lens heating. You can program different FlexWave settings for each wafer or exposure. Again, because you have access to all Zernike polynomials up to Z64, you have much greater potential for aberration control. RMS-value [nm] 5. 4. 3. 2. 1. Total RMS Standard ALC-R ALC-XY FlexWave Moreover, unlike with other lens control options, you can control both rotated and XY aberrations at the same time. As well as offering better lens heating control, this reduces the overhead when switching lots as you don t need to make any hardware changes to account for the different lens heating conditions of different recipes. See Fig. 3 Tailor-made wavefronts Both extended wavefront compensation and dynamic through-lot wavefront control use FlexWave to compensate for lens aberrations. The third application, known as application-specific wavefront targets, uses FlexWave to address maskrelated issue in particular so-called mask 3D effects. In semiconductor manufacturing today, it is quite common to print features that are smaller than the wavelength of the light used to expose the pattern. Under these conditions, the standard two-dimensional model of diffraction at the mask breaks down due to interactions between the light beam and the three-dimensional mask stack. This causes the so-called 3D Fig. 3. Dipole 35X, 1.35 NA, XY 3 mj/cm 2, 3% transmission effects, which show up as Bossung tilts, best focus offsets between features and reduced process window. If you know what these effects are for a particular layer, you can use FlexWave to compensate for them in the scanner by creating a tailored wavefront with an appropriate aberration profile. In this way, you can introduce pitch- and / or orientation-dependent best focus offsets that counteract those arising from 3D effects. In a typical application, this can lead to depth of focus (DoF) improvements of around 15%. See Fig. 4 / 5 The power of computation The wavefronts needed to compensate for 3D effects can be very complicated. Moreover, a wavefront target will impact the printing of all features on the mask, Dipole 35X, 1.2 NA, XY 38 mj/cm 2, 2% transmission - 23 wafers per hour - Simulation based Dipole 35Y, 1.35 NA, XY 3 mj/cm 2, 3% transmission Dipole 35X, 1.2 NA, R 26.2 mj/cm 2, 2% transmission not just those that are affected by 3D effects. Consequently, determining the optimal wavefront target for a given layer design is an extremely challenging task. Optimizing the wavefront manually would require an iterative procedure that could take several weeks. To speed up the process, ASML and its subsidiary Brion Technologies are developing new computational lithography tools that handle the hard work for you. These tools are based on highly accurate and detailed models of ASML scanners. Through those models and powerful simulations, the tools will optimize the wavefront target for a chosen set of features. That could potentially speed up the turnaround time for optimizing the wavefront significantly. It would also allow you to carry out many more iterations so 22

ASML Images, Winter Edition 211 15 Best Focus (nm) 1 5-5 Measured with wavefront target Measured without wavefront target anchor pattern FlexWave 13nm standard -1-15 -2 45 P9H 45 P112.5H Measured focus offsets containing core and periphery features (NAND case) 45 P135H 45 P27H +AF 45 P315H +AF 9 P27V 9 P27V SG WL1 WL2 WL7 ASML test reticle 31nm pitches used for optimization Fig. 4 Exposure Latitude versus Depth of Focus Reduce the aberration 8 fingerprint of EL vs DoF 6 4 2 without wavefront target with wavefront target your projections lens EL [%] 2 4 6 8 1 DoF [nm] Fig. 5 you can explore the possibilities much more fully and be sure of finding the optimal solution. See Fig. 6 In addition, the computational lithography tools being developed could help with the 22nm, SRAM, contact mf18 mf21-2 -15-1 -5 5 1 15 2 verification of printed devices. For example, they could be capable of identifying which features it would be best to measure with CD-SEM or even recommending suitable YieldStar markers that will allow you to monitor the wave front s stability over time. 22nm, SRAM, contact mf18 Correcting Bossung tilt mf21 Wavefront Target Flattening CD to focus/dose responses Correcting Bossung tilt -2-15 -1-5 5 1 15 2 Wavefront Target Fig. 6 optimized bossung curves resulting in an improved process window Flattening CD to focus/dose responses Opening the window FlexWave will be available in the first half of 211. Together with our FlexRay programmable illuminator and the computation lithography tools in development, it will provide the maximum flexibility in setting up the optical column of your TWINSCAN scanner. That flexibility helps you maintain process windows large enough for profitable manufacturing at smaller feature sizes, keeping your shrink roadmap on track. 23

Stellar metrology accuracy boosts on-product overlay By Kaustuve Bhattacharyya, Senior Product Manager for Metrology, and Arie den Boef, Research Fellow Abstract YieldStar, ASML s unique 3-in-1 post-patterning metrology solution, delivers excellent overlay measurement accuracy to match its precision and speed. Thanks to its Process Asymmetry Indicator, it helps you monitor several key aspects of your process. So you can be sure measurements are credible and as insensitive as possible to process changes. That extra robustness, plus the higher sampling densities that YieldStar enables, can help you make significant on-product overlay improvements. Speed, precision and accuracy form a golden triangle for postpatterning metrology. Speed reduces cost of ownership, precision ensures measurements are reproducible and accuracy means you really know what is being printed. In YieldStar, you ll find a metrology solution that shines on all three fronts. YieldStar is a unique 3-in-1 metrology tool that can measure CD uniformity, overlay and focus in a single wafer pass. As we ve explained in previous issues of Images, YieldStar is capable of making thousands of measurements per hour with proven precision down to.25 nm. But did you know that YieldStar also offers unrivalled overlay measurement accuracy to support the most stringent on-product overlay requirements? That accuracy is due mainly to two features that are unique to YieldStar. Firstly, it is the only scatterometry-based metrology solution to make use of higher diffraction orders. This means it has access to more information to deliver more accurate results. Secondly, the robust design of the YieldStar scatterometry target ensures low sensitivity to aberrations, closely mimicking the behavior of product structures. Unrivalled overlay measurement accuracy Guaranteed credibility However, no matter how well designed the target is, process drifts can become large enough to introduce asymmetry in the target. In extreme cases, measurement accuracy may therefore be compromised. To avoid this situation, YieldStar features a unique Process Asymmetry Indicator (PAI). The PAI is possible because, unlike other metrology options, YieldStar uses a number of different light wavelengths and 24

ASML Images, Winter Edition 211 Implement higher-order process control polarization states for each measurement. If the results from all these light states are consistent, then you can be confident that the target has been printed properly and the metrology results are accurate. See Fig. 1 By contrast, a distorted target will scatter the various light states differently, leading to a spread in the individual results. But even in this case, YieldStar can still deliver accurate overlay results thanks to some smart software that determines the best wavelength / polarization combination to use for that measurement. YieldStar is available as a standalone metrology system and as an integrated module. This latter version is ideal for incorporation into your litho cluster. Besides potentially saving you several hours per layer in metrology cycle time, it allows you to implement denser overlay sampling and higher-order process control further reducing process variation and hence on-product overlay. See Fig 2. PAI as process monitor More robust processes If there is a spread in the results for individual wavelength / polarization combinations, the PAI flag is triggered. This gives you an early indication that something has drifted within your process and allows you to monitor how that drift is trending. In fact, it is the only tool in the fab that has the sensitivity to detect asymmetry changes down to the subnanometer scale. Fig. 1 Process Asymmetry Indicator (PAI) PAI exceeded limit: indicates process issues on these lots Production lots through time Pre-set limit What s more, you can take measurements on every die on a wafer if you choose, so you can get a very good indication of the wafer-wide fingerprint of your process issue. And because issues in different process steps tend to have very different fingerprints, YieldStar can help you track down the root cause of process drift faster, helping you improve your process robustness. Integrated metrology and cycle time saving t in t stocker t out t in Stocker Coat Expose Develop Litho Cluster t stocker t out Stocker t queue t t queue CD t OV CD measure Stand alone metrology configuration Overlay measure Improving on-product overlay With its combination of speed, precision and accuracy, YieldStar can actually help you improve your on-product overlay performance. In a typical process, around 5% of the on-product overlay budget comes from process variation. YieldStar s PAI and trending data directly help you identify and reduce that variation. Fig. 2 t in IM Coat Expose Litho Cluster Develop Integrated metrology Cycle time saving (several hrs / layer) Potential gains Total cycle time reduction Reduction of APC reaction time Dense sampling for accurate OV, Dose and Focus control Lower WIP 25

PAS 55 steppers bring to the LED market By Rutger Voets, Product Manager Abstract The LED market is enjoying a period of growth that will be amplified by growing green efforts. LED manufacturers will need reduction lithography, such as ASML s PAS 55 steppers to replace current 1x printing to meet technology requirements and maximize value of ownership. By exploiting the optical phenomenon of electroluminescence, the first LEDs (Light Emitting Diodes) were made nearly a century ago. Beginning about 4 years ago LED research and development, from companies such as Monsanto and Fairchild Semiconductor, enabled mass produced LEDs for application in watches, calculators and other alphanumeric indicators. Today LEDs have replaced more traditional lighting technologies in myriad applications. Newer HB-LEDs (High Brightness) may see broader adoption into more mainstream applications currently dominated by incandescent and fluorescent lighting, triggering a period of high-growth for the LED market. However, before that happens, newer more sophisticated LEDs need to be developed. One possibility is the incorporation of photonic crystals which increases both the internal quantum efficiency and the amount of light extracted. This type of device will require more complex manufacturing technologies and increased yields to drive more competitive pricing. Currently, nearly all LEDs are manufactured using contact printers or other 1x technologies which image the entire wafer at once. This type of pattern transfer is limited and faces several challenges in meeting emerging LED manufacturing requirements including smaller design features, tighter CD control and die-by-die leveling. A new light, a new life To meet these requirements LED manufacturers are turning to reduction lithography steppers. ASML has entered the LED manufacturing equipment market with its proven PAS 55 systems. These factory refurbished systems were once 26

ASML Images, Winter Edition 211 new benefits employed in advanced semiconductor manufacturing and now are finding a second life after being refurbished, retrofitted and resold into the LED and other markets. This dedicated wafer handling package provides manufactures the opportunity to use ASML PAS 55 systems for the production of LED s. Also, the ability to level the wafer die-by-die is becoming increasingly important to mitigate localized nonflatness resulting in better CD control, allowing higher yield. Reduction lithography systems enable high productivity and device shrink ASML s PAS 55 systems are renowned ASML PAS 55 systems provide for their modularity and productivity. higher productivity and enable tighter Once the leading edge in semiconductor design requirements compared to current lithography, these systems are now imaging solutions. As LED manufacturing finding second lives on the pre-owned moves into higher volume production, market for which ASML offers a complete the PAS 55 platform s productivity factory refurbishment. In the case of the lowers manufacturing cost while being LED market ASML leveraged the modular comparably priced in terms of capital nature of the PAS platform to incorporate outlay. At 15-17 wafers per hour, an LED-specific wafer handling solution ASML PAS systems are 2.5 to 3 times to address the issue of bowed wafers. as productive as typical 1x tools. LED resolution, while not at the same scale as advanced semiconductors, is nonetheless shrinking in its own right. Within two to three years, photonic crystal LEDs are expected to come to market and will require a substantial shrink from today s relatively large geometries. These photonic crystal LEDs may see critical dimensions of.18 um which will require deep-ultraviolet (DUV) lithography only available in reduction litho steppers and scanners. LED manufacturers who adopt reduction lithography now for benefits such as die-by-die leveling will further increase their return on investment once the industry moves to DUV, as they will make the transition faster and more smoothly. 27