Transport properties of graphene nanoribbon-based tunnel Mark Cheung School of Engineering and Applied Science, Department of Electrical and Computer Engineering Keywords: Monolithic Graphene, Low-Power, Switching
Mark Cheung is a fourth-year electrical and computer engineering major with a double minor in physics and mathematics. He is from Vienna, Va. where he attended Thomas Jefferson High School for Science and Technology. At the University of Virginia, he is a core leader of the Solar Car Team, the vicepresident of IEEE Eta Kappa Nu (HKN) Honor Society, and the president of the Go Club. His research on graphene electronics was conducted during the summer 2013 under Professor Avik Ghosh of the Virginia NanO computing (VINO) lab. Cheung plans to continue his education through a PhD program in electrical and computer engineering while pursuing a career in research. SOCIAL IMPACT As modern electronics are made up of millions of transistors, the performance of devices like our computers, cellphones, and pacemakers correlates with the performance of these transistors. The faster these transistors can switch states (between off and on ), the faster the device runs and the lower the power loss. In particular, graphene nanoribbon-based tunnel behavior coupled with low on current, are promising devices for low-power applications. are promising devices for low-power applications due to their abrupt switching behavior. ABSTRACT switching behavior. In particular, graphene is an appealing material to use in TFETs, enabling their incredibly high carrier mobility, tunable bandgap, and excellent electrostatic control of the device gate. Previous experiments demonstrated TFETs of other materials with subthreshold slope less than the 60mV/decade theoretical limit for metal-oxide semiconductors at room temperature. We perform state-of-the-art quantum mechanical simulation of graphene nanoribbons (GNR) using nonequilibrium Green s function (NEGF) formalism to examine the subthreshold slope and ON current to OFF current ratio as a function of dimension, drain bias, and doping in the contacts. These results, combined with the Landauer transport model, provide a good understanding of the device structure. According to the simulation results, less than 7 mv/decade subthreshold slope can be obtained in addition to an excellent ON/OFF current ratio. The data suggest that careful design strategy is required to balance the trade-offs among size, power and performance, and reveals great potential for GNR TFETs in ultralow-power microelectronics.
Introduction It has been more than half a century since Moore s law, the idea that the number of transistors that can be placed on an integrated circuit doubles approximately every 18 months, was postulated, but only recently did it begin to slow down. This trend is different processors transistor count/die vs. their dates of introduction (Figure 1). Today a chip can contain more than a billion transistors but can be purchased for less than a hundred dollars. In addition to cost, reducing the size of these transistors has led to extraordinary development in switching speed and the functionality of integrated circuits. Transistor it, we would not have computers, radios, pacemaker, and other electronics. The end of Moore s law depends on the smallest transistor that we can build. The smallest feasible transistor was built in 2012 using a single phosphorous atom (Fuechsle, 2012). As we continue to reduce the size of the most common challenges in power consumption: threshold voltage required to switch state (between ON and OFF), and the rising leakage current (I off ) that degrades the I on ratio. To lower the threshold voltage, the sharpness of the switching must increase. This sharpness is inversely proportional to the subthreshold swing (the amount of voltage necessary to increase current by a factor of 10). In a MOSFET, switching requires a fundamental minimum subthresold swing of 60 mv/decade at room temperature due to the diffusion current of the device in weak inversion state. As the energy barrier of the device gate decreases, the leakage current increases exponentially. A currentvoltage curve of the MOSFET is illustrated (Figure 2). The device is on when the current is relatively high compared to off i.e. I on is on and I off is off. The subthreshold swing is calculated using the voltage difference between 10-7 A and 10-6 A, which is about where the steepest slope is. as follows: CV d2 f + V d I ioff (1) where V d is the amount of voltage required to switch the device on (related to V gs ), C is the switch capacitance, f is the operation frequency, and I off is the leakage/off current. This equation explains why it has not been possible to increase clock speed f (typically around 2 GHz) due to its proportionality to power. Further increase would cause too much power to be dissipated as heat. V d is limited by the subthreshold swing and if it can scale down, f and CPU s clock ating more heat. To bypass the 60 mv/decade subthreshold swing limit, we investigate the physics of a different FET, graphene tunnel FET (G-TFET) by performing quantum mechanical simulation of graphene nanoribbons (GNR) using Non-Equilibrium Green s Function (NEGF) formalism to examine the subthreshold slope and the ON current to OFF current ratio. These results, combined with the Landauer transport model, provide a good understanding of the device structure and suggest that careful design methodology is required to balance the trade-offs. Figure 1. Transistor count in logarithmic scale vs date of introduction (Intel, 2011) Figure 2. Current (I) Voltage (V) curve for a typical MOSFET.
Device A typical MOSFET with three terminals: source (S), drain (D), and gate (G) (Figure 3). When the gate to drain voltage (V gs ) is above a certain threshold voltage and drain to source voltage (V ds ) is nonzero, the transistor is switched on and there is a high current going from the drain contact to the source When V gs is below a threshold or V ds is zero, the transistor is in the OFF state and there is low current are relative to each other. Ideally for a MOSFET, this low current would be zero, as otherwise it would be consuming power. However, as the result of it having an imperfect dielectric insulator, a zero leakage current is impossible. On the other hand, the high current (ID) depends on the gate and drain voltage in addition to material properties and temperature. The current through a FET can be modeled using the Landauer Formula: (2) Figure 3. MOSFET Side view MOSFET and charge of an electron, W the width of the channel, T the transmission, and f 1 and f 2 the fermi-dirac distribution of electrons in source and drain (dependent on VGS and VDS), U the potential energy (sum of laplace potential and potential due to number of electrons), and E different energy levels. The subthreshold swing (SS) is as follows: For MOSFET, the minimum SS is about 60 mv/ decade at room temperature. by using band-to-band tunneling, namely leakage, to inject carriers into the device channel. A Si n-channel TFET with 52.8 mv/decade subthreshold swing has been achieved experimentally (Choi, 2007). The device structure and the schematic on state (red line) is shown (Figure 4). In the off state, tunneling is much harder because no empty states in the channel are available and the channel is Figure 4. TFET side view and TFET schematic
long to minimize I d,off. Increasing V g above a certain threshold moves the valence band energy ( ) of the channel above the conduction band energy of the source so that interband tunneling can occur (red arrow). This switches the device to the on state, in which electrons in the gap can tunnel from the source conduction energy levels into the channel valence energy levels as the gap ( ) is small. The amount of current increases rapidly after g ) is achieved. following: (3) Using the above equation, the subthreshold slope can be calculated (derived in Knoch, 2007) using the WKB approximation for the transmission: (4) where is the valence band of the channel, is the conduction band of the source. Further reduction yields: (5) where m* is the effective mass, and E g is the band gap. Minimizing the difference between the valence band of the channel and the conduction band of the source can reduce SS below the limit in MOSFET. Material The material used for TFET in the simulation is all-graphene nanoribbon, but other materials like silicon, gallium arsenide would also work. In particular, graphene was chosen for its incredibly high carrier mobility, tunable band gap, and excellent electrostatic control of the device gate. A back gate can electrostatically dope one of the two contacts, creating a p-i-n structured GNR TFET with abrupt junctions (Zhang, 2008; Zhao, 2009). In the simulation, a monolithic graphene device and channel were patterned using a single layer of graphene sheet: drain and source were doped to create p-i-n structure (Figure 5a-b). The Fermi level was 0 ev, with the conductance bands above and valence bands below. Graphene is especially interesting due in part to this adjustable band gap that allows it to act as a metal or a semiconductor by determining the transmission (Figure 5c). The width and chirality of graphene nanoribbon can be sion. TFETs of other material systems have emerged theoretically and experimentally as possible candidates for low-power electronics. Current-voltage (IV) curves of state-of-the-art 65 nm FETs are shown Figure 5. The band structure of armchair graphene nanoribbon with chiral of 3 and width of 5nm: transmission of armchair graphene nanoribbon with different widths. A closer view of the gap. (c) The bandgap corresponds to the part of the transmission where it is 0. As the width increases, the band gap decreases. This transmission is used to calculate the current. Hence, wider channel leads to higher current.
Figure 6. Current-voltage (IV) curves of different material systems, including MOSFET (black) with SS of ~90 mv/decade with, Ge TFET (green) with SS of ~75 mv/dec, and All-Si TFET (blue) with SS of ~65 mv/decade (Ionescu, 2011). (Figure 6). IV curves of TFETs are steeper (lower subthreshold swing SS) with lower ON and OFF currents and higher I on ratios compared to those of MOSFETs. Simulation Design The simulation design involves three major equations that can be partitioned into two parts: 1) a potential energy U, and 2) a current equation that is a function of the converged potential of the simultaneous solution (Figure 7). This potential energy Figure 8: Energy level diagram of a typical FET. If a gate is the sum of the laplace potential (due to coupling capacitances) and the potential due to the number of electrons. The second equation, which calculates the number of electrons, uses this potential to calculate the transmission (T(E-U)). The equations are solved self-consistently. For the simulation, the tight binding model of graphene nanoribbon was used to calculate the band structure from the Hamiltonian matrix generated from its wave functions. Then a recursive Green s function algorithm (RGFA) was used to calculate the transmission T (Sajjad, 2013). We repeated the RGFA calculation for each potential in is illustrated (Figure 8). RGFA is modeled as follows: Figure 7. Flowchart of computation procedure. 1) calculate potential energy U and transport equations self-consistently 2) use their converged potential to calculate the current. where E is the energy grid matrices for different energy levels, H the hamiltonian matrix using the tight binding model, and 1,2 are self-energy matrices due to couplings from the source and drain contacts. The current is a function of the transmission which is the diagonal terms of the multi- 1 2 G +, 1 2 are the antihermitian portions associated with energy broadening resulting from charge injection/removal and G + is the transpose of G. Each current-voltage (IV) curve was computed from an energy grid
of 400 points for 40 equally spaced voltage values. Subthreshold swing (SS) and I on ratio were then calculated for each curve. Results and Discussion All simulations were performed with +/- 0.2 V gate bias (V gs ), 0.07 ev Fermi level, 3 chiral, 0 tilt angle, and 400 energy grid points. For all the results, unless mentioned otherwise, the following parameters were used to simulate each current-voltage curve: length = 40 nm, width = 5 nm, V d = 0.1 V, and doping = 0.24 ev. From the simulation results, I on, I off, and subthreshold swing were extracted. A subthreshold swing of 6.4 mv/decade and an I on ratio of more than ~25,000 were obtained for the stated parameters. In comparison, a typical MOSFET has ~70 mv/decade subthreshold swing and ~1000 I on and I off ratio. Varying channel length (Figure 9) As the length of the device increases, I off decreases (less leakage), and hence I on increases and subthreshold swing up to length of around 40 nm. The best subthreshold swing of 6mV/decade and an I on ratio of more than 50,000 was achieved with 160 nm. I on ratio for length of 10 nm and below is less than 100, and hence is more susceptible to noise. Varying channel width (Figure 10) As the width increases, the bandgap decreases (Figure 5), yielding a large increase in I off, and small increase in I on (increase in SS). If I on is too small, it cannot be used to drive another transistor: widths of 1.25 nm and 2.5 nm are not practical. I on for a width of 1.25 nm or below is also too noisy. Hence, I on ratios of widths below 3.75nm would be inaccurate. Above width of about 3.75 nm, I on ratio is exponential correlated with width. This is due to exponential correlation of off leakage current to width. SS is also affected similarly. Varying contact doping (Figure 11) on increases, then decreases because of the passing of the valence band of the drain and the conduction band of the channel between doping of 0.28 ev and 0.32 ev. Subthreshold swing remains about the same until 0.28 ev, and then degrades above that doping. Hence, the optimal doping is around 0.28 ev, right before the crossing. Varying drain bias (Figure 12) As the drain bias (V d ) increases, I on also increases, which is good for driving subsequent transistors. The trade-off is that I off increases faster (more off leakage current). Hence the I on ratio actually reduces as V d increases (as drain bias affects relative position of energy levels in the contacts). A minimum drain bias (V d of 0.05 V) is required to maintain a high I on. Conclusion We developed an accurate model for GNR-TFET and found that there are trade-offs among different device parameters that can be controlled by design. An increase in speed may require proportional increase in size and power, and vice versa. Subthreshold slope of 6.4 mv/decade and I on of >25,000 were obtained for length = 40 nm, width = 5 nm, V d = 0.1 V, and doping = 0.24 ev. In comparison to a MOSFET, high I on ratio and steep SS over several decades indicate GNR TFET s superiority for ultra-low power applications: high speed and low power dissipation at the trade-off of performance. Although the analytical results match the experimental results for other devices, further adjustments for experimental challenges such as inelastic and elastic scattering are required. Acknowledgements The author would like to thank Professor Avik Ghosh, the faculty adviser, and Redwan Sajjad, the graduate student adviser. Without their guidance and assistance, this project would not have been possible. The author also gratefully acknowledges the support of the following: National Science Foundation (NSF) for funding, U.Va. Center for Diversity in Engineering (CDE) for the summer research experience, and UVACSE for the use of ITC Linux clusters. This research was supported by the NSF Nanosystems Engineering Research Center for Advanced Self-Powered Systems of Integrated Sensors and Technologies (ASSIST) under cooperative agreement number EEC-1160483.
Figures 9-12 The relationship between gate-to-drain voltage and drain current. The effect of the independent variable on subthreshold swing, Ion, and Ioff. Figure 9. Varying channel length Figure 10. Varying channel width Figure 11. Varying contact doping Figure 12. Varying drain bias
References Choi, W. P. (2007). Tunneling field-effect transistors (TFETs) with subthreshold swing (SS) less than 60 mv/dec. IEEE Electron Device Letter, 28(8), 743-45. Fuechsle, M. M. (2012). A single-atom transistor. Nature Nanotechnology, 7, 242-46. Intel. (2011). Retrieved July 25, 2013, from http:// www.carthrottle.com/why-chemistry-dictatesan-electric-vehicle-future/ Ionescu, A. R. (2011). Tunnel field-effect transistors as energy-efficient electronics switches. Nature, 479, 329-337. Knoch, J. M. (2007). Impact of dimensionality on the performance of tunneling FETs: Bulk versus one-dimensional devices. ScienceDirect, 51, 572-78. Sajjad, R. P. (2013, May 4). Atomistic deconstruction of current flow in graphene based hetero-junctions. Computational Electronics. Zhang, Q. T. (2008). Graphene nanoribbon tunnel transistors. IEEE Electron Device Letters. Zhao, P. C. (2009). Computatinoal study of tunneling transistor based on graphene nanoribbon. Nano Letters, 9(2), 684-88. Title Photo Credit: BRStoner http://commons.wikimedia.org ESWB is a student-run organization focused on applying sustainable engineering methods to carry out local and international development projects. The group aims to inspire U.Va. students to be proactive and contextually aware engineers who empower communities to attain their basic human needs in a sustainable manner. The hands-on development projects often allow students to travel and engage with other cultures and lifestyles. The experiences can include a component of undergraduate research, for instance using Photovoice to understand community concerns in Nicaragua, or developing a biogas digestor for a local farm. The group maintains a list of active projects and provides ample opportunities to get involved. If you want to get involved or have a new project idea, we invite you to visit us at: