MHz, 6V/µs, Dual/Quad Rail-to-Rail Input and Output Precision C-Load Op Amps FEATRES Rail-to-Rail Input and Output 475µV Max V OS from V + to V Gain-Bandwidth Product: MHz Slew Rate: 6V/µs Low Supply Current per Amplifier:.7mA Input Offset Current: 5nA Max Input Bias Current: 5nA Max Open-Loop Gain: V/mV Min Low Input Noise Voltage: 2nV/ Hz Typ Wide Supply Range: 2.2V to ±5V Large Output Drive Current: 3mA Stable for Capacitive Loads p to,pf Dual in 8-Pin PDIP and SO Package Quad in Narrow 4-Pin SO APPLICATIONS Driving A-to-D Converters Active Filters Rail-to-Rail Buffer Amplifiers Low Voltage Signal Processing Battery-Powered Systems, LTC and LT are registered trademarks of Linear Technology Corporation. C-Load is a trademark of Linear Technology Corporation. DESCRIPTION The LT 498/LT499 are dual/quad, rail-to-rail input and output precision C-Load TM op amps with a MHz gainbandwidth product and a 6V/µs slew rate. The LT498/LT499 are designed to maximize input dynamic range by delivering precision performance over the full supply voltage. sing a patented technique, both input stages of the LT498/LT499 are trimmed, one at the negative supply and the other at the positive supply. The resulting guaranteed common mode rejection is much better than other rail-to-rail input op amps. When used as a unity-gain buffer in front of single supply 2-bit A-to-D converters, the LT498/LT499 are guaranteed to add less than LSB of error even in single 3V supply systems. With db of supply rejection, the LT498/LT499 maintain their performance over a supply range of 2.2V to 36V and are specified for 3V, 5V and ±5V supplies. The inputs can be driven beyond the supplies without damage or phase reversal of the output. These op amps remain stable while driving capacitive loads up to,pf. The LT498 is available with the standard dual op amp configuration in 8-pin PDIP and SO packaging. The LT499 features the standard quad op amp configuration and is available in a 4-pin plastic SO package. These devices can be used as plug-in replacements for many standard op amps to improve input/output range and precision. TYPICAL APPLICATION 6.8k 6.8k.3k V IN 33pF V + /2 /2 LT498 Single Supply khz 4th Order Butterworth Filter pf 5.23k 47pF 5.23k.2k + + V + pf /2 LT498 V OT 498 TA GAIN (db) 2 3 4 5 6 7 8 9 Frequency Response k k k M M FREQENCY (Hz) V IN = 2.7V P-P V + = 3V 498 TA2
ABSOLTE MAXIMM RATINGS W W W Total Supply Voltage (V + to V )... 36V Input Current... ±ma Output Short-Circuit Duration (Note )... Continuous Operating Temperature Range... 4 C to 85 C Specified Temperature Range (Note 3)... 4 C to 85 C Junction Temperature... 5 C Storage Temperature Range... 65 C to 5 C Lead Temperature (Soldering, sec)... 3 C PACKAGE/ORDER INFORMATION OT A IN A 2 A +IN A 3 V 4 N8 PACKAGE 8-LEAD PDIP TOP VIEW 8 V + 7 OT B 6 IN B B 5 +IN B S8 PACKAGE 8-LEAD PLASTIC SO T JMAX = 5 C, θ JA = 3 C/ W (N8) T JMAX = 5 C, θ JA = 9 C/ W (S8) Consult factory for Military and Industrial grade parts. W ORDER PART NMBER LT498CN8 LT498CS8 S8 PART MARKING 498 OTA IN A 2 +IN A 3 V + 4 +IN B 5 IN B 6 OT B 7 TOP VIEW A B 4 OT D 3 IN D 2 +IN D V +IN C 9 IN C 8 OT C S PACKAGE 4-LEAD PLASTIC SO T JMAX = 5 C, θ JA = 5 C/ W D C ORDER PART NMBER LT499CS ELECTRICAL CHARACTERISTICS T A = 25 C, V S = 5V,V; V S = 3V,V; V CM = V OT = half supply, unless otherwise noted. V OS Input Offset Voltage V CM = V + 5 475 µv V CM = V 5 475 µv V OS Input Offset Voltage Shift V CM = V to V + 5 425 µv Input Offset Voltage Match (Channel-to-Channel) V CM = V +, V (Note 4) 2 75 µv I B Input Bias Current V CM = V + 25 5 na V CM = V 5 25 na I B Input Bias Current Shift V CM = V to V + 5 na Input Bias Current Match (Channel-to-Channel) V CM = V + (Note 4) na V CM = V (Note 4) na I OS Input Offset Current V CM = V + 5 5 na V CM = V 5 5 na I OS Input Offset Current Shift V CM = V to V + na Input Noise Voltage.Hz to Hz 4 nv P-P e n Input Noise Voltage Density f = khz 2 nv/ Hz i n Input Noise Current Density f = khz.3 pa/ Hz C IN Input Capacitance 5 pf A VOL Large-Signal Voltage Gain V S = 5V, V O = 75mV to 4.8V, R L = k 6 38 V/mV V S = 3V, V O = 75mV to 2.8V, R L = k 5 2 V/mV 2
ELECTRICAL CHARACTERISTICS T A = 25 C, V S = 5V,V; V S = 3V,V; V CM = V OT = half supply, unless otherwise noted. CMRR Common Mode Rejection Ratio V S = 5V, V CM = V to V + 8 9 db V S = 3V, V CM = V to V + 76 86 db CMRR Match (Channel-to-Channel) (Note 4) V S = 5V, V CM = V to V + 75 9 db V S = 3V, V CM = V to V + 7 86 db PSRR Power Supply Rejection Ratio V S = 2.2V to 2V, V CM = V O =.5V 88 5 db PSRR Match (Channel-to-Channel) (Note 4) V S = 2.2V to 2V, V CM = V O =.5V 82 3 db V OL Output Voltage Swing (Low) (Note 5) No Load 4 3 mv I SINK =.5mA 35 7 mv I SINK = 2.5mA 9 2 mv V OH Output Voltage Swing (High) (Note 5) No Load 2.5 mv I SORCE =.5mA 5 mv I SORCE = 2.5mA 4 25 mv I SC Short-Circuit Current V S = 5V ±2.5 ±24 ma V S = 3V ±2. ±9 ma I S Supply Current per Amplifier.7 2.2 ma GBW Gain-Bandwidth Product (Note 6) 6.8.5 MHz SR Slew Rate (Note 7) V S = 5V, A V =, R L = Open, V O = 4V 2.6 4.5 V/µs V S = 3V, A V =, R L = Open 2.3 4. V/µs C < T A < 7 C, V S = 5V, V; V S = 3V, V; V CM = V OT = half supply, unless otherwise noted. V OS Input Offset Voltage V CM = V + 75 65 µv V CM = V +.V 75 65 µv V OS TC Input Offset Voltage Drift (Note 2).5 2.5 µv/ C V CM = V +.5 4. µv/ C V OS Input Offset Voltage Shift V CM = V +.V to V + 7 6 µv Input Offset Voltage Match (Channel-to-Channel) V CM = V +.V, V + (Note 4) 2 9 µv I B Input Bias Current V CM = V + 275 6 na V CM = V +.V 6 275 na I B Input Bias Current Shift V CM = V +.V to V + 55 2 na Input Bias Current Match (Channel-to-Channel) V CM = V + (Note 4) 5 7 na V CM = V +.V (Note 4) 7 5 na I OS Input Offset Current V CM = V + 85 na V CM = V +.V 85 na I OS Input Offset Current Shift V CM = V +.V to V + 2 7 na A VOL Large-Signal Voltage Gain V S = 5V, V O = 75mV to 4.8V, R L = k 5 25 V/mV V S = 3V, V O = 75mV to 2.8V, R L = k 4 2 V/mV CMRR Common Mode Rejection Ratio V S = 5V, V CM = V +.V to V + 78 89 db V S = 3V, V CM = V +.V to V + 73 85 db CMRR Match (Channel-to-Channel) (Note 4) V S = 5V, V CM = V +.V to V + 74 9 db V S = 3V, V CM = V +.V to V + 69 86 db PSRR Power Supply Rejection Ratio V S = 2.3V to 2V, V CM = V O =.5V 86 2 db PSRR Match (Channel-to-Channel) (Note 4) V S = 2.3V to 2V, V CM = V O =.5V 8 2 db 3
ELECTRICAL CHARACTERISTICS C < T A < 7 C, V S = 5V, V; V S = 3V, V; V CM = V OT = half supply, unless otherwise noted. V OL Output Voltage Swing (Low) (Note 5) No Load 7 35 mv I SINK =.5mA 4 8 mv I SINK = 2.5mA 22 mv V OH Output Voltage Swing (High) (Note 5) No Load 3.5 5 mv I SORCE =.5mA 55 2 mv I SORCE = 2.5mA 6 3 mv I SC Short-Circuit Current V S = 5V ±2 ± 23 ma V S = 3V ± ±2 ma I S Supply Current per Amplifier.9 2.6 ma GBW Gain-Bandwidth Product (Note 6) 6. 9 MHz SR Slew Rate (Note 7) V S = 5V, A V =, R L = Open, V O = 4V 2.5 4. V/µs V S = 3V, A V =, R L = Open 2.2 3.5 V/µs 4 C < T A < 85 C, V S = 5V, V; V S = 3V, V; V CM = V OT = half supply, unless otherwise noted. (Note 3) V OS Input Offset Voltage V CM = V + 25 75 µv V CM = V +.V 25 75 µv V OS TC Input Offset Voltage Drift (Note 2).5 2.5 µv/ C V CM = V +.5 4. µv/ C V OS Input Offset Voltage Shift V CM = V +.V to V + 25 65 µv Input Offset Voltage Match (Channel-to-Channel) V CM = V +.V, V + (Note 4) 3 5 µv I B Input Bias Current V CM = V + 35 75 na V CM = V +.V 75 35 na I B Input Bias Current Shift V CM = V +.V to V + 7 5 na Input Bias Current Match (Channel-to-Channel) V CM = V + (Note 4) 3 8 na V CM = V +.V (Note 4) 8 3 na I OS Input Offset Current V CM = V + 5 9 na V CM = V +.V 5 9 na I OS Input Offset Current Shift V CM = V +.V to V + 3 8 na A VOL Large-Signal Voltage Gain V S = 5V, V O = 75mV to 4.8V, R L = k 4 25 V/mV V S = 3V, V O = 75mV to 2.8V, R L = k 3 2 V/mV CMRR Common Mode Rejection Ratio V S = 5V, V CM = V +.V to V + 77 86 db V S = 3V, V CM = V +.V to V + 73 8 db CMRR Match (Channel-to-Channel) (Note 4) V S = 5V, V CM = V +.V to V + 72 86 db V S = 3V, V CM = V +.V to V + 69 83 db PSRR Power Supply Rejection Ratio V S = 2.5V to 2V, V CM = V O =.5V 86 db PSRR Match (Channel-to-Channel) (Note 4) V S = 2.5V to 2V, V CM = V O =.5V 8 db V OL Output Voltage Swing (Low) (Note 5) No Load 8 4 mv I SINK =.5mA 45 8 mv I SINK = 2.5mA 22 mv V OH Output Voltage Swing (High) (Note 5) No Load 3.5 5 mv I SORCE =.5mA 6 2 mv I SORCE = 2.5mA 7 3 mv 4
ELECTRICAL CHARACTERISTICS 4 C < T A < 85 C, V S = 5V, V; V S = 3V, V; V CM = V OT = half supply, unless otherwise noted. (Note 3) I SC Short-Circuit Current V S = 5V ±7.5 ±5 ma V S = 3V ±7.5 ±5 ma I S Supply Current per Amplifier 2. 2.7 ma GBW Gain-Bandwidth Product (Note 6) 5.8 8.5 MHz SR Slew Rate (Note 7) V S = 5V, A V =, R L = Open, V O = 4V 2.2 3.6 V/µs V S = 3V, A V =, R L = Open.9 3.2 V/µs T A = 25 C,, V CM = V, V OT = V, unless otherwise noted. V OS Input Offset Voltage V CM = V + 2 8 µv V CM = V 2 8 µv V OS Input Offset Voltage Shift V CM = V to V + 5 65 µv Input Offset Voltage Match (Channel-to-Channel) V CM = V +, V (Note 4) 25 4 µv I B Input Bias Current V CM = V + 25 55 na V CM = V 55 25 na I B Input Bias Current Shift V CM = V to V + 5 na Input Bias Current Match (Channel-to-Channel) V CM = V + (Note 4) 2 2 na V CM = V (Note 4) 2 2 na I OS Input Offset Current V CM = V + 6 6 na V CM = V 6 6 na I OS Input Offset Current Shift V CM = V to V + 2 2 na Input Noise Voltage.Hz to Hz 4 nv P-P e n Input Noise Voltage Density f = khz 2 nv/ Hz i n Input Noise Current Density f = khz.3 pa/ Hz A VOL Large-Signal Voltage Gain V O = 4.5V to 4.5V, R L = k 52 V/mV V O = V to V, R L = 2k 5 23 V/mV Channel Separation V O = V to V, R L = 2k 6 3 db CMRR Common-Mode Rejection Ratio V CM = V to V + 93 6 db CMRR Match (Channel-to-Channel) (Note 4) V CM = V to V + 87 3 db PSRR Power Supply Rejection Ratio V S = ±5V to ±5V 89 db PSRR Match (Channel-to-Channel) (Note 4) V S = ±5V to ±5V 83 5 db V OL Output Voltage Swing (Low) (Note 5) No Load 8 3 mv I SINK =.5mA 4 8 mv I SINK = ma 23 5 mv V OH Output Voltage Swing (High) (Note 5) No Load 2.5 mv I SINK =.5mA 55 2 mv I SINK = ma 42 8 mv I SC Short-Circuit Current ±5 ±3 ma I S Supply Current per Amplifier.8 2.5 ma GBW Gain-Bandwidth Product (Note 6) 6.8.5 MHz SR Slew Rate A V =, R L = Open, V O = ±V 3.5 6 V/µs Measure at V O = ±5V 5
ELECTRICAL CHARACTERISTICS C < T A < 7 C,, V CM = V, V OT = V, unless otherwise noted. V OS Input Offset Voltage V CM = V + 2 9 µv V CM = V +.V 2 9 µv V OS TC Input Offset Voltage Drift (Note 2). 3.5 µv/ C V CM = V + 2. 5. µv/ C V OS Input Offset Voltage Shift V CM = V +.V to V + 2 75 µv Input Offset Voltage Match (Channel-to-Channel) V CM = V +.V, V + (Note 4) 35 5 µv I B Input Bias Current V CM = V + 3 675 na V CM = V +.V 675 3 na I B Input Bias Current Shift V CM = V +.V to V + 6 35 na Input Bias Current Match (Channel-to-Channel) V CM = V + (Note 4) 2 8 na V CM = V +.V (Note 4) 8 2 na I OS Input Offset Current V CM = V + 5 9 na V CM = V +.V 5 9 na I OS Input Offset Current Shift V CM = V +.V to V + 3 8 na A VOL Large-Signal Voltage Gain V O = 4.5V to 4.5V, R L = k 9 5 V/mV V O = V to V, R L = 2k 4 2 V/mV Channel Separation V O = V to V, R L = 2k 2 25 db CMRR Common Mode Rejection Ratio V CM = V +.V to V + 92 3 db CMRR Match (Channel-to-Channel) (Note 4) V CM = V +.V to V + 86 3 db PSRR Power Supply Rejection Ratio V S = ±5V to ±5V 88 3 db PSRR Match (Channel-to-Channel) (Note 4) V S = ±5V to ±5V 82 3 db V OL Output Voltage Swing (Low) (Note 5) No Load 8 4 mv I SINK =.5mA 45 9 mv I SINK = ma 27 52 mv V OH Output Voltage Swing (High) (Note 5) No Load 3.5 5 mv I SORCE =.5mA 6 2 mv I SORCE = ma 48 mv I SC Short-Circuit Current ±2 ±28 ma I S Supply Current per Amplifier.9 2.8 ma GBW Gain-Bandwidth Product (Note 6) 6. 9 MHz SR Slew Rate A V =, R L = Open, V O = ±V 3.4 5.3 V/µs Measured at V O = ±5V 6
ELECTRICAL CHARACTERISTICS 4 C < T A < 85 C,, V CM = V, V OT = V, unless otherwise noted. (Note 3) V OS Input Offset Voltage V CM = V + 3 95 µv V CM = V +.V 3 95 µv V OS TC Input Offset Voltage Drift (Note 2). 3.5 µv/ C V CM = V + 2. 5. µv/ C V OS Input Offset Voltage Shift V CM = V +.V to V + 25 85 µv Input Offset Voltage Match (Channel-to-Channel) V CM = V +.V, V + (Note 4) 35 8 µv I B Input Bias Current V CM = V + 35 8 na V CM = V +.V 8 35 na I B Input Bias Current Shift V CM = V +.V to V + 7 6 na Input Bias Current Match (Channel-to-Channel) V CM = V + (Note 4) 2 2 na V CM = V +.V (Note 4) 2 2 na I OS Input Offset Current V CM = V + 5 na V CM = V +.V 5 na I OS Input Offset Current Shift V CM = V +.V to V + 3 2 na A VOL Large-Signal Voltage Gain V O = 4.5V to 4.5V, R L = k 8 5 V/mV V O = V to V, R L = 2k 35 2 V/mV Channel Separation V O = V to V, R L = 2k 2 db CMRR Common Mode Rejection Ratio V CM = V +.V to V + 9 db CMRR Match (Channel-to-Channel) (Note 4) V CM = V +.V to V + 86 db PSRR Power Supply Rejection Ratio V S = ±5V to ±5V 88 db PSRR Match (Channel-to-Channel) (Note 4) V S = ±5V to ±5V 82 db V OL Output Voltage Swing (Low) (Note 5) No Load 25 5 mv I SINK =.5mA 5 mv I SINK = ma 275 52 mv V OH Output Voltage Swing (High) (Note 5) No Load 3.5 5 mv I SORCE =.5mA 65 2 mv I SORCE = ma 5 mv I SC Short-Circuit Current ± ±8 ma I S Supply Current per Amplifier 2. 3. ma GBW Gain-Bandwidth Product (Note 6) 5.8 8.5 MHz SR Slew Rate A V =, R L = Open, V O = ±V, 3 4.75 V/µs Measure at V O = ±5V The denotes specifications that apply over the full operating temperature range. Note : A heat sink may be required to keep the junction temperature below the absolute maximum rating when the output is shorted indefinitely. Note 2: This parameter is not % tested. Note 3: The LT498/LT499 are designed, characterized and expected to meet these extended temperature limits, but are not tested at 4 C and 85 C. Guaranteed I grade parts are available, consult factory. Note 4: Matching parameters are the difference between amplifiers A and D and between B and C on the LT499; between the two amplifiers on the LT498. Note 5: Output voltage swings are measured between the output and power supply rails. Note 6: V S = 3V, GBW limit guaranteed by correlation to 5V tests. Note 7: V S = 3V, V S = 5V slew rate limit guaranteed by correlation to ±5V tests. 7
TYPICAL PERFORMANCE CHARACTERISTICS W PERCENT OF NITS (%) 25 2 5 5 V OS Distribution, V CM = V (PNP Stage) LT498: N8, S8 PACKAGES LT499: S4 PACKAGE V S = 5V, V V CM = V PERCENT OF NITS (%) 25 2 5 5 V OS Distribution V CM = 5V (NPN Stage) LT498: N8, S8 PACKAGES LT499: S4 PACKAGE V S = 5V, V V CM = 5V PERCENT OF NITS (%) 25 2 5 5 V OS Shift for V CM = V to 5V LT498: N8, S8 PACKAGES LT499: S4 PACKAGE V S = 5V, V V CM = V TO 5V 5 3 3 5 INPT OFFSET VOLTAGE (µv) 5 3 3 5 INPT OFFSET VOLTAGE (µv) 5 3 3 5 INPT OFFSET VOLTAGE (µv) 498/99 G 498/99 G2 498/99 G2 SPPLY CRRENT PER AMPLIFIER (ma) 2..5..5 Supply Current vs Supply Voltage T A = 25 C T A = 25 C T A = 55 C SPPLY CRRENT PER AMPLIFIER (ma) Supply Current vs Temperature 2. V S = 5V, V.5..5 INPT BIAS CRRENT (na) 4 3 2 2 3 Input Bias Current vs Common Mode Voltage V S = 5V, V T A = 25 C T A = 25 C T A = 55 C 4 8 2 6 2 24 28 32 36 TOTAL SPPLY VOLTAGE (V) 5 25 25 5 75 25 TEMPERATRE ( C) 4 2 2 3 4 5 6 COMMON MODE VOLTAGE (V) 498/99 G4 498/99 G5 498/99 G6 4 3 Input Bias Current vs Temperature V CM = 5V Output Saturation Voltage vs Load Current (Output High) Output Saturation Voltage vs Load Current (Output Low) INPT BIAS CRRENT (na) 2 2 NPN ACTIVE PNP ACTIVE V S = 5V, V V CM = 5V V CM = 5V 3 V S = 5V, V V CM = V 4 5 35 2 5 25 4 55 7 85 TEMPERATRE ( C) SATRATION VOLTAGE (mv) T A = 55 C T A = 25 C T A = 25 C... LOAD CRRENT (ma) SATRATION VOLTAGE (mv) T A = 25 C T A = 25 C T A = 55 C... LOAD CRRENT (ma) 498/99 G7 498/99 G8 498/99 G9 8
TYPICAL PERFORMANCE CHARACTERISTICS W CHANGE IN OFFSET VOLTAGE (µv) 3 25 2 5 5 Minimum Supply Voltage T A = 25 C T A = 85 C T A = 7 C NONFNCTIONAL T A = 55 C 2 3 4 5 TOTAL SPPLY VOLTAGE (V) 498/99 G OTPT VOLTAGE (2nV/DIV).Hz to Hz Output Voltage Noise V S = ±2.5V V CM = V TIME (s/div) 498/99 G NOISE VOLTAGE (nv/ Hz) 2 8 6 4 2 8 6 4 2 Noise Voltage Spectrum V S = 5V, V V CM = 2.5V PNP ACTIVE V CM = 4V NPN ACTIVE FREQENCY (Hz) 498/99 G2 CRRENT NOISE (pa/ Hz) 9 8 7 6 5 4 3 2 Noise Current Spectrum V S = 5V, V V CM = 4V NPN ACTIVE V CM = 2.5V PNP ACTIVE FREQENCY (Hz) 498/99 G3 VOLTAGE GAIN (db) 7 6 5 4 3 2 2 Gain and Phase vs Frequency GAIN R L = k V S = ±.5V PHASE 3 8.. FREQENCY (MHz) 498/99 G4 8 44 8 72 36 36 72 8 44 PHASE SHIFT (DEG) COMMON MODE REJECTION RATIO (db) 2 9 8 7 6 5 4 3 CMRR vs Frequency V S = ±2.5V 2 FREQENCY (khz) 498/99 G5 POWER SPPLY REJECTION RATIO (db) PSRR vs Frequency 9 V S = ±2.5V 8 7 6 POSITIVE SPPLY 5 NEGATIVE SPPLY 4 3 2 FREQENCY (khz) 498/99 G6 GAIN BANDWIDTH (MHz) 2 8 6 4 2 8 6 4 2 Gain Bandwidth and Phase Margin vs Supply Voltage PHASE MARGIN GAIN BANDWIDTH 5 5 2 25 TOTAL SPPLY VOLTAGE (V) 498/99 G7 9 8 7 6 5 4 3 2 3 PHASE MARGIN (DEG) CHANNEL SEPARATION (db) 5 6 7 8 9 2 3 4 5. Channel Separation vs Frequency V OT = ±V P-P R L = 2k. FREQENCY (khz) 498/99 G8 9
TYPICAL PERFORMANCE CHARACTERISTICS W OVERSHOOT (%) 7 6 5 4 3 2 Capacitive Load Handling V S = 5V, V R L = k SLEW RATE (V/µs) 9 8 7 6 5 4 Slew Rate vs Supply Voltage V OT = 8% OF V S A V = RISING EDGE FALLING EDGE OTPT STEP (V) 8 6 4 2 2 4 6 8 Output Step vs Settling Time to.% NONINVERTING NONINVERTING INVERTING INVERTING CAPACITIVE LOAD (pf) 3 4 8 2 6 2 24 28 32 36 TOTAL SPPLY VOLTAGE (V).5 2. 2.5 3. 3.5 SETTLING TIME (µs) 498/99 G9 498/99 G2 498/99 G2 INPT VOLTAGE (µv) Open-Loop Gain 2 5 R L = 2k 5 R L = k 5 5 INPT VOLTAGE (µv) Open-Loop Gain 4 V S = 5V, V 3 2 R L = 2k R L = k 2 3 CHANGE IN OFFSET VOLTAGE (µv) 2 3 Warm-p Drift vs Time S8 PACKAGE, V S = ±2.5V N8 PACKAGE, V S = ±2.5V LT499CS, V S = ±2.5V S8 PACKAGE, N8 PACKAGE, LT499CS, 2 2 5 5 5 5 OTPT VOLTAGE (V) 2 4 2 3 4 5 OTPT VOLTAGE (V) 6 4 2 4 6 8 2 4 6 TIME AFTER POWER-P (SEC) THD + NOISE (%)... 498/99 G22 Total Harmonic Distortion + Noise vs Peak-to-Peak Voltage f = khz R L = k V S = ±.5V A V = V S = ±.5V V S = ±2.5V A V = V S = ±2.5V THD + NOISE (%).. 498/99 G23 Total Harmonic Distortion + Noise vs Frequency V S = ±.5V V IN = 2V P-P R L = k A V = 498/99 G24. 2 3 4 5 INPT VOLTAGE (V P-P ) 498/99 G25... FREQENCY (khz) 498/99 G26
TYPICAL PERFORMANCE CHARACTERISTICS W 5V Small-Signal Response 5V Large-Signal Response 5mV/DIV V S = 5V 2ns/DIV V IN = 2mV P-P AT 5kHz R L = k 498/99 G27 ±5V Small-Signal Response 5mV/DIV V/DIV V S = 5V V IN = 4V P-P AT khz R L = k 2µs/DIV 498/99 G28 ±5V Large-Signal Response 5V/DIV 2ns/DIV V IN = 2mV P-P AT 5kHz R L = k 498/99 G29 V IN = 2V P-P AT khz R L = k 2µs/DIV 498/99 G3 APPLICATIONS INFORMATION Rail-to-Rail Input and Output W The LT498/LT499 are fully functional for an input and output signal range from the negative supply to the positive supply. Figure shows a simplified schematic of the amplifier. The input stage consists of two differential amplifiers, a PNP stage (Q/Q2) and an NPN stage (Q3/ Q4) which are active over different ranges of input common mode voltage. A complementary common emitter output stage (Q4/Q5) is employed allowing the output to swing from rail-to-rail. The devices are fabricated on Linear Technology s proprietary complementary bipolar process to ensure very similar DC and AC characteristics for the output devices (Q4/Q5). The PNP differential input pair is active for input common mode voltages, V CM, between the negative supply to approximately.3v below the positive supply. As V CM moves further toward the positive supply, the transistor Q5 will steer the tail current, I, to the current mirror Q6/ Q7 activating the NPN differential pair, and the PNP differential pair becomes inactive for the rest of the input common mode range up to the positive supply. The output is configured with a pair of complementary common emitter stages that enables the output to swing from rail to rail. Capacitors C and C2 form local feedback loops that lower the output impedance at high frequencies.
APPLICATIONS INFORMATION V + W R3 R4 R5 Q5 +IN IN R6 R7 D5 D6 D D2 Q4 Q3 Q5 V BIAS Q I Q2 Q Q2 Q3 V C C C2 OT D3 D4 Q Q9 Q8 BFFER AND OTPT BIAS C V Q7 Q6 R R2 Q4 498/99 F Figure. LT498 Simplified Schematic Diagram Input Offset Voltage The offset voltage changes depending upon which input stage is active. The input offsets are random, but are trimmed to less than 475µV. To maintain the precision characteristics of the amplifier, the change of V OS over the entire input common mode range (CMRR) is guaranteed to be less than 425µV on a single 5V supply. Input Bias Current The input bias current polarity also depends on the input common mode voltage, as described in the previous section. When the PNP differential pair is active, the input bias currents flow out of the input pins; they flow in opposite direction when the NPN input stage is active. The offset error due to input bias current can be minimized by equalizing the noninverting and inverting input source impedances. This will reduce the error since the input offset currents are much less than the input bias currents. Overdrive Protection To prevent the output from reversing polarity when the input voltage exceeds the power supplies, two pair of crossing diodes D to D4 are employed. When the input voltage exceeds either power supply by approximately 7mV, D/D2 or D3/D4 will turn on, forcing the output to the proper polarity. For the phase reversal protection to work properly, the input current must be less than 5mA. If the amplifier is to be severely overdriven, an external resistor should be used to limit the overdrive current. Furthermore, the LT498/LT499 s input stages are protected by a pair of back-to-back diodes, D5/D6. When a differential voltage of more than.7v is applied to the inputs, these diodes will turn on, preventing the Zener breakdown of the input transistors. The current in D5/D6 should be limited to less than ma. Internal resistors R6 and R7 (7Ω total) limit the input current for differential input signals of 7V or less. For larger input levels, a resistor in series with either or both inputs should be used to limit the current. Worst-case differential input voltage usually occurs when the output is shorted to ground. In addition, the amplifier is protected against ESD strikes up to 3kV on all pins. Capacitive Load The LT498/LT499 are designed for ease of use. The amplifier can drive a capacitive load of more than nf 2
APPLICATIONS INFORMATION W without oscillation at unity gain. When driving a heavy capacitive load, the bandwidth is reduced to maintain stability. Figures 2a and 2b illustrate the stability of the device for small-signal and large-signal conditions with capacitive loads. Both the small-signal and large-signal transient response with a nf capacitive load are well behaved. Feedback Components To minimize the loading effect of feedback, it is possible to use the high value feedback resistors to set the gain. However, care must be taken to insure that the pole formed by the feedback resistors and the total input capacitance at the inverting input does not degrade the stability of the amplifier. For instance, the LT498/LT499 in a noninverting gain of 2, set with two 3k resistors, will probably oscillate with pf total input capacitance (5pF input capacitance + 5pF board capacitance). The amplifier has a 2.5MHz crossing frequency and a 6 phase margin at 6dB of gain. The feedback resistors and the total input capacitance create a pole at.6mhz that induces 67 of phase shift at 2.5MHz! The solution is simple, either lower the value of the resistors or add a feedback capacitor of pf of more. C L = pf C L = 5pF C L = nf C L = pf C L = 5pF C L = nf V S = 5V 498/99 F2a Figure 2a. LT498 Small-Signal Response V S = 5V 498/99 F2b Figure 2b. LT498 Large-Signal Response TYPICAL APPLICATIONS N A Voltage Controlled Current Source A Voltage Controlled Current Sink V IN k V + /2 LT498 + 5pF.5Ω k Ω Si943DY V IN k + /2 LT498 V + 5pF Ω k I OT V + R L Si94DY V + VIN I OT =.5Ω t r < µs I OT R L 498/99 TA3 I OT = V IN.5Ω t r < µs.5ω 498/99 TA4 3
TYPICAL APPLICATIONS N Input Bias Current Cancellation R G R F SIGNAL AMP /2 LT498 V OT V IN + M 22pF /2 LT498 + CANCELLATION AMP M 498/99 TA5 INPT BIAS CRRENT LESS THAN 5nA FOR 5mV V IN (V + 5mV) PACKAGE DESCRIPTION Dimensions in inches (millimeters) unless otherwise noted. N8 Package 8-Lead PDIP (Narrow.3) (LTC DWG # 5-8-5).4* (.6) MAX 8 7 6 5.255 ±.5* (6.477 ±.38) 2 3 4.3.325 (7.62 8.255).45.65 (.43.65).3 ±.5 (3.32 ±.27) 4.9.5 (.229.38).325 +.25.5 +.635 8.255.38 ( ).65 (.65) TYP.5 (.27) MIN. ±. (2.54 ±.254) *THESE DIMENSIONS DO NOT INCLDE MOLD FLASH OR PROTRSIONS. MOLD FLASH OR PROTRSIONS SHALL NOT EXCEED. INCH (.254mm).25 (3.75) MIN.8 ±.3 (.457 ±.76).5 (.38) MIN N8 695
PACKAGE DESCRIPTION Dimensions in inches (millimeters) unless otherwise noted. S8 Package 8-Lead Plastic Small Outline (Narrow.5) (LTC DWG # 5-8-6).89.97* (4.8 5.4) 8 7 6 5 LT498/LT499.228.244 (5.79 6.97).5.57** (3.8 3.988) 2 3 4.8. (.23.254)..2 (.254.58) 45 8 TYP.53.69 (.346.752).4. (..254).6.5.46.27 *DIMENSION DOES NOT INCLDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED.6" (.52mm) PER SIDE ** DIMENSION DOES NOT INCLDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED." (.254mm) PER SIDE.4.9 (.355.483) S Package 4-Lead Plastic Small Outline (Narrow.5) (LTC DWG # 5-8-6).337.344* (8.56 8.738).5 (.27) TYP SO8 996 4 3 2 9 8.228.244 (5.79 6.97).5.57** (3.8 3.988) 2 3 4 5 6 7.8. (.23.254)..2 (.254.58) 45 8 TYP.53.69 (.346.752).4. (..254).6.5.46.27.4.9 (.355.483).5 (.27) TYP *DIMENSION DOES NOT INCLDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED.6" (.52mm) PER SIDE ** DIMENSION DOES NOT INCLDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED." (.254mm) PER SIDE Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. S4 695 5
TYPICAL APPLICATION Bidirectional Current Sensor A bidirectional current sensor for battery-powered systems is shown in Figure 3. Two outputs are provided: one proportional to charge current, the other proportional to discharge current. The circuit takes advantage of the LT498 s rail-to-rail input range and its output phase reversal protection. During the charge cycle, the op amp A forces a voltage equal to (I L )(R SENSE ) across R A. This voltage is then amplified at the Charge Out by the ratio of R B over R A. In this mode, the output of A2 remains high, keeping Q2 off and the Discharge Out low, even though the (+) input of A2 exceeds the positive power supply. During the discharge cycle, A2 and Q2 are active and the operation is similar to the charge cycle. I L CHARGE R SENSE.Ω V BATTERY DISCHARGE V BATTERY A2 /2 LT498 + R A R A R A R A + A /2 LT498 Q2 MTP23P6 DISCHARGE OT R B Q MTP23P6 CHARGE OT R B V O = I L R R SENSE A FOR R A = k, R B = k V O = V/A I L R B ( ) 498/99 F3 Figure 3. Bidirectional Current Sensor RELATED PARTS PART NMBER DESCRIPTON COMMENTS LTC 52 Rail-to-Rail Input and Output, Zero-Drift Op Amp High DC Accuracy, µv V OS(MAX), nv/ C Drift, MHz GBW, V/µs Slew Rate, Max Supply Current 2.2mA LT2/LT22 Dual/Quad 4MHz, 7V/µs, Single Supply Precision Op Amps Input Common Mode Includes Ground, 275µV V OS(MAX), 6µV/ C Max Drift, Max Supply Current.8mA per Op Amp LT23/LT24 Dual/Quad 28MHz, 2V/µs, Single Supply Precision Op Amps Input Common Mode Includes Ground, 275µV V OS(MAX), 6µV/ C Max Drift, Max Supply Current 3.5mA per Op Amp LT25/LT26 Dual/Quad 23MHz, 5V/µs, Single Supply Precision Op Amps Input Common Mode Includes Ground, 45µV V OS(MAX), Max Supply Current 6.6mA per Op Amp LT366/LT367 Dual/Quad Precision, Rail-to-Rail Input and Output Op Amps 475µV V OS(MAX), 4kHz GBW,.3V/µs Slew Rate, Max Supply Current 52µA per Op Amp LT49/LT49 Dual/Quad Micropower, Rail-to-Rail Input and Output Op Amps Max Supply Current 5µA per Op Amp, 2kHz GBW,.7V/µs Slew Rate, Operates with Inputs 44V Above V Independent of V + 6 Linear Technology Corporation 63 McCarthy Blvd., Milpitas, CA 9535-747 (48) 432-9 FAX: (48) 434-57 TELEX: 499-3977 www.linear-tech.com 4989f LT/TP 397 7K PRINTED IN SA LINEAR TECHNOLOGY CORPORATION 996