SONET / SDH. Block Diagram. COutput Output XTAL HPLL. OE or NC. Figure 1 - Block Diagram

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PX7 Single Frequency HPLL XO PX7 Features Features Description Applications The PX7 is a crystal oscillator, XO, based upon ectron s HPLL high performance phase locked loop frequency multiplier ASIC, that combines key digital synthesis techniques with I s proven core analog technology blocks. A standard low frequency crystal provides the reference to the fractionaln synthesizer so that virtually any frequency between 0MHz and 00 MHz can be factory programmed allowing quick turn manufacturing. Industry Standard Package,.0 x 7.0 x.8 mm HPLL High Performance PLL ASIC Typical Jitter 00 fsrms ( khz to 0 MHz) Output Frequencies from 0 MHz to 00 MHz Spurious Suppression, 70 dbc Typical. or 3.3 Supply oltage LCMOS, LPECL or LDS Output Configurations Output Enable Compliant to EC RoHS Directive Applications PLL circuits for clock smoothing and frequency translation Description Standard 4 Gigabit Fibre Channel 0 Gigabit Fibre Channel 0GbE LAN / WAN Synchronous Ethernet OC9 Block Diagram SONET / SDH DD COutput Output INCITS 300 INCITS 34003 IEEE 80.3ae ITUT G.8 ITUT G.709 GR3CORE Issue4 XTAL LCMOS LPECL LDS HPLL Figure Block Diagram Gnd Page of 9 ectron International 7 Lowell Road, Hudson, NH 030 Tel: 88ECTRON http://www.vectron.com

PX7 Single Frequency HPLL XO Performance Specifications oltage Current Electrical Performance Parameter Test Conditions Symbol Min Typ Max Units 3.3 Option. Option LCMOS LDS LPECL Supply DD.97. I DD Operating Temperature, 3 T OP 40 +8 C Output Enable (OE) IH 0.7 x DD Nominal Frequency 3.3. 90 99 0 3.3.7 98 08 30 IL 0. LPECL/LDS LCMOS Frequency f N 0 0 Temperature Stability, T A = 40 to +8 C f STAB ±0 ppm Outputs LPECL Output midlevel O DD.4 DD. swing (diff) OD..9 PP LDS Output midlevel O.4..8 swing (diff) OD 300 40 00 m PP LCMOS Output OH 0.9 x DD DD Rise/Fall Time (0/80%), Symmetry,3 LPECL/LDS LCMOS with C L = pf LPECL: DD.3 (diff) LDS:. (diff) LCMOS: DD / 00 0 OL 0. x DD t R/ t f 30. SYM 4 0 % Spurious Suppression 70 dbc Jitter (Performance Option N) khz to 0 MHz фj 000 fsrms Jitter (Performance Option A) khz to 0 MHz фj 00 fsrms ma MHz ps ns ] ] 3] 4] ] ] See Standard Frequencies and Ordering Information (Pg 8). Parameters are tested with production test circuit (See Figure for LCMOS, Figure 3 for LPECL and Figure 4 for LDS). Parameters are tested at ambient temperature with test limits guardbanded for specified operating temperature. Measured as the maximum deviation from the best straightline fit, per MIL030. Parameters are described with waveform diagram below (Figure ). Not tested in production, guaranteed by design, verified at qualification. Page of 9 ectron International 7 Lowell Road, Hudson, NH 030 Tel: 88ECTRON http://www.vectron.com

PX7 Single Frequency HPLL XO Test Circuits & Output Waveform nf nf NC 39 Scope Scope 0k 00 00 0k 0k MD MD Figure LCMOS Production Test Circuit Figure 3 LPECL Production Test Circuit 80% nf 0k 0k Scope s 0% t R On Time t F MD Period Figure 4 LDS Production Test Circuit Figure Waveform Diagram Absolute Maximum Ratings Parameter Symbol Ratings Unit Power Supply DD 0 to 3.8 Input Current I IN 00 ma Output Current I OUT ma Output Enable OE 0 to DD Storage Temperature T STR to C Soldering Temperature / Duration T PEAK / t P 0 / 40 C / sec Page 3 of 9 ectron International 7 Lowell Road, Hudson, NH 030 Tel: 88ECTRON http://www.vectron.com

PX7 Single Frequency HPLL XO LPECL Application Diagrams nf nf 30 30 40 40 8 8 Figure Single Resistor Termination Scheme Resistor values are typically 0 to 40 ohms for 3.3 operation and 8 to 0 ohms for. operation. Figure 7 Pull Up Pull Down Termination Resistor values are typically for 3.3 operation For. operation, the resistor to ground is ohms and the resistor to supply is 40 ohms There are numerous application notes on terminating and interfacing PECL logic and the two most common methods are a single resistor to ground, Figure, and a pullup/pulldown scheme as shown in Figure 7. An AC coupling capacitor is optional, depending on the application and the input logic requirements of the next stage. One of the most important considerations is terminating the Output and Complementary Outputs equally. An unused output should not be left unterminated, and if one of the two outputs is left open it will result in excessive jitter on both. PC board layout must take this and 0 ohm impedance matching into account. Load matching and power supply noise are the main contributors to jitter related problems. LDS Application Diagrams nf nf Receiver Receiver 00 00 Figure 8 LDS to LDS, internal 00Ω Figure 9 LDS to LDS, External 00Ω and AC block ing caps Some LDS structures have an internal 00 ohm resistor on the input and do not need additional components. One of the most important considerations is terminating the Output and Complementary Outputs equally. An unused output should not be left unterminated, and if one of the two outputs is left open it will result in excessive jitter on both. PC board layout must take this and 0 ohm impedance matching into account. Load matching and power supply noise are the main contributors to jitter related problems. Page 4 of 9 ectron International 7 Lowell Road, Hudson, NH 030 Tel: 88ECTRON http://www.vectron.com

PX7 Single Frequency HPLL XO Typical Characteristics Figure 0 Typical Phase Noise/Jitter Performance INTEGER Mode Page of 9 ectron International 7 Lowell Road, Hudson, NH 030 Tel: 88ECTRON http://www.vectron.com

PX7 Single Frequency HPLL XO Reliability I qualification includes aging at various extreme temperatures, shock and vibration, temperature cycling, and IR reflow simulation. The PX7 family is capable of meeting the following qualification tests: Parameter Environmental Compliance Conditions Mechanical Shock MILSTD883, Method 00 Mechanical ibration MILSTD883, Method 007 Solderability MILSTD883, Method 003 Gross and Fine Leak MILSTD883, Method 04 Resistance to Solvents MILSTD883, Method 0 Moisture Sensitivity Level Handling Precautions IPC/JEDEC JSTD00, MSL Although ESD protection circuitry has been designed into the PX7 proper precautions should be taken when handling and mounting. I employs a human body model (HBM) and a chargeddevice model (CDM) for ESD susceptibility testing and design protection evaluation. ESD Ratings Model Minimum Conditions Human Body Model 000 MILSTD883, Method 30 Charged Device Model 900 JEDEC, JESDC0 Machine Model 00 JEDEC, JESDAA Reflow Profile (IPC/JEDEC JSTD00) Parameter Symbol alue PreHeat Time t S 0 sec Min, 80 sec Max Ramp Up R UP 3 C/sec Max Time Above 7 C t L 0 sec Min, 0 sec Max Time To Peak Temperature T AMBP 480 sec Max Time at 0 C t P 0 sec Min, 40 sec Max Ramp Down R DN C/sec Max The device has been qualified to meet the JEDEC standard for PbFree assembly. The temperatures and time intervals listed are based on the PbFree small body requirements. The temperatures refer to the topside of the package, measured on the package body surface. The PX7 device is hermetically sealed so an aqueous wash is not an issue. Terminal Plating: Electrolytic Ni >.9µm Electrolytic Au > 0.7µm Page of 9 ectron International 7 Lowell Road, Hudson, NH 030 Tel: 88ECTRON http://www.vectron.com

PX7 Single Frequency HPLL XO Outline & Marking Diagram Suggested Pad Layout PX7 YWW CCCCCCC D XXXMXXX 9g9h Y = Year WW = Week C = Option Codes XXXMXXX = Frequency (See Ordering Info) inch [mm] Pin Out Pin Symbol Function Output Enable or No Connection Output Enable or No Connection 3 GND Case and Electrical Ground 4 Output Output COutput (N/A for LCMOS) Complementary Output (N/C for LCMOS) DD Power Supply oltage 7,8 NC Factory Use Only 9 NC/GND No Connect or Ground OD = Outputs Disabled OE = Outputs Enabled Output Enable Option Symbol Function Result A C H (3 DD /4) to DD OE L Gnd to 0. OD H (3 DD /4) to DD OD L Gnd to 0. OE, Output Enable is internally pulled to DD with a 30 kω resistor. If option C is selected, OE must be pulled low by the user with a LCMOS logic device or a 3 kω resistor to ground., OE on Pin or Pin is an ordering option (see page 8). Tape & Reel (EIA48A) Tape Dimensions (mm) Reel Dimensions (mm) Dimension W F Do Po P A B C D N W W # Per Tolerance Typ Typ Typ Typ Typ Typ Min Typ Min Min Typ Max Reel PX7 7.. 4 8 78. 3 0. 0.4.4 00 Page 7 of 9 ectron International 7 Lowell Road, Hudson, NH 030 Tel: 88ECTRON http://www.vectron.com

PX7 Single Frequency HPLL XO Standard Frequency Table Standard Factory Configurable Frequencies (MHz) 8.700000 39.0000 73.780000 73.370748.080000 78.0000 9.000000 39.3000 74.0000 73.43700 4.93800 79.87000 9.3980 39.843700 74.78000 7.8387 4.704800 800.000000 9.4400000 40.0000000 74.00000 8.0000.000000 80.400 9.300 40.83030 7.0000000 8.874 7.3900 809.0300 9.08000 40.900000 7.8000000 84.000000 9.987800 89.00000 9.98980 4.0888870 77.700000 84.30000 37.00000 8.777300 9.790000 4.7440 78.0000000 87.00000 40.000000 80.000000 9.9870 4.00000 78.0000 9.000000 44.30 983.400000 0.0000000 4.83930 78.43000 00.000000 4.0000,000.0000 0.4000 4.0000000 79.87000 00.9000 47.39400 0.4800000 4.0090 80.0000000 0.400 47.0800 Recent Adds: 0.444340 4.000000 80.430.00000 49.970300 74.703083 0.73000 4.00000 8.777380 9.497 7.487 7.000000 0.8870 44.09440 8.9440000 40.000000.00 98.8330 0.88000 44.4343000 83.34880 43.000000.48 0.940 44.8000 83.80 4.70000 9.800.000840 44.730000 84.003380 0.000000 9.38.0000000 44.980000 8.83740.748 9.4900.04770 4.84000 88.490880.000000 70.83800.7000 4.840000 9.7000000.44000 7.000000.79000 4.037940 97.000000 9.749 7.0 4.0000000 4.700000 00.000000 300.000000 7.7 4.70000 4.870000 0.000000 307.00000 73.400 4.7040000 48.0000000 0.0000 3.040000 84.400.0000000 49.0000 08.000000 3.00000 87.700000.8000 49.4080000 0.000000 38.70000 90.99.000000 0.0000000.000000 30.000000 93.4870.900000 0.0480000 4.000000 3.0 93.4899.0000000.000000 0.000000 38.7090 93.70000 7.0000000.8400000.880000 333.70 9.390 7.480000.0000000 4.4000 334.3300 9.4478 8.7040000 3.3300000.000000 33.0830 9.487 9.49000 4.740000 30.000000 33.730 704.38000 9.000000.0000000 3.07000 38.40000 707.3700 30.0000000 0.0000000 39.4000 37.000000 707.00000 30.700000.3800000 0.000000 38.800000 70.94800 30.8800000.4400000 0.44000 400.000000 7.0000 3.00000.080000 3.00000 409.00000 7.7300 3.0000000.000000.0000 49.0000 78.70000 3.780000.94000.0000 00.000000 79.734400 33.0000000 3.300000 9.37000 0.000000 737.80000 33.3330000 3.897000 0.000000 3.000000 739.00000 34.380000 4.0000000.383 3.0000 74.00000 34.00000 4.0000 4.347 8.9800 748.070900 3.840000.30000.87 9.9400 70.000000 37.00000.0000000 7.334 88.000000 78.000000 37.0000 70.0000000 8.04078 9.0000 777.00000 37.000000 70.0000 70.000000 00.000000 779.800 38.8800000 7.00000 7.00000 4.400000 780.88000 Page 8 of 9 ectron International 7 Lowell Road, Hudson, NH 030 Tel: 88ECTRON http://www.vectron.com

PX7 Single Frequency HPLL XO Ordering Information PX 7 E C E H C A A xxxmxxxxxx Product Family PX: XO Package 7: x 7 x.8 mm Supply E: 3.3 H:. Output A: LCMOS C: LPECL D: LDS Operating Temperature W: 0/70 C E: 40/8 C Example: PX7HDJHABAM0000 Frequency 0M0000000 00M00000 Performance Option (Future) N: N/A A: 00 fsrms typical Jitter Output Enable Pin A: Pin B: Pin Enable/Disable A: Enable High C: Enable Low Stability E: ±0ppm F: ±ppm K: ±0ppm S: ±00ppm For Additional Information, Please Contact USA: ectron International 7 Lowell Road Hudson, NH 030 Tel:.888.38.7 Fax:.888.39.838 Europe: ectron International Landstrasse, D7494 Neckarbischofsheim, Germany Tel: +49 (0) 338.4784.7 Fax: +49 (0) 338.4784.30 Asia: 8 Yin Cheng Road(C), nd Floor One Lu Jia Zui Pudong, Shanghai 000, China Tel: +8 94 88 Fax: +8 94 99 Disclaimer ectron International reserves the right to make changes to the product(s) and or information contained herein without notice. No liability is assumed as a result of their use or application. No rights under any patent accompany the sale of any such product(s) or information. Page 9 of 9 ectron International 7 Lowell Road, Hudson, NH 030 Tel: 88ECTRON http://www.vectron.com