Low-Jitter Precision LVPECL Oscillator
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- Karin Barnett
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1 DSC0 General Description The DSC0 & series of high performance oscillators utilizes a proven silicon MEMS technology to provide excellent jitter and stability over a wide range of supply voltages and temperatures. By eliminating the need for quartz or SAW technology, MEMS oscillators significantly enhance reliability and accelerate product development, while meeting stringent clock performance criteria for a variety of communications, storage, and networking applications. DSC0 has a standby feature allowing it to completely powerdown when EN pin is pulled low; whereas for, only the outputs are disabled when EN is low. Both oscillators are available in industry standard packages, including the small.x. mm, and are dropin replacements for standard pin LVPECL quartz crystal oscillators. Block Diagram Features Low RMS Phase Jitter: < ps (typ) High Stability: ±0, ±, ±0 ppm Wide Temperature Range o Industrial: 0 to 8 C o Ext. commercial: 0 to 70 C High Supply Noise Rejection: 0 dbc Short Lead Time: Weeks Wide Freq. Range:. to 0 MHz Small Industry Standard Footprints o.x.0,.x.,.0x., & 7.0x.0 mm Excellent Shock & Vibration Immunity o Qualified to MILSTD88 High Reliability o 0x better MTF than quartz oscillators Low Current Consumption Supply Range of. to. V Standby & Output Enable Function Lead Free & RoHS Compliant LVDS & HCSL Versions Available Applications Output Enable Modes EN Pin DSC0 High Outputs Active Outputs Active NC Outputs Active Outputs Active Low Standby Outputs Disabled Storage Area Networks o SATA, SAS, Fibre Channel Passive Optical Networks o EPON, 0GEPON, GPON, 0GPON Ethernet o G, 0GBASET/KR/LR/SR, and FCoE HD/SD/SDI Video & Surveillance PCI Express: Gen & Gen DisplayPort DSC0 Page MKQBPD000
2 DSC0 Absolute Maximum Ratings Item Min Max Unit Condition Supply Voltage V Input Voltage 0. V DD +0. V Junction Temp +0 C Storage Temp +0 C Soldering Temp +0 C 0sec max. ESD HBM MM CDM Note: 000+ years of data retention on internal memory Specifications V Ordering Code Enable Modes 0: Enable/Standby : Enable/Disable DSC 0 C I.0000 Package A: 7.0x.0mm B:.0x.mm C:.x.mm D:.x.0mm N: 7.0x.0mm (no center pad) Temp Range E: 0 to 70 I: 0 to 8 L: 0 to 0 Stability : ±0ppm : ±ppm : ±0ppm Packing T: Tape & Reel : Tube T Freq (MHz).0000 Parameter Condition Min. Typ. Max. Unit Supply Voltage V DD.. V Supply Current Frequency Stability I DD Notes:. Pin VDD should be filtered with 0.uf capacitor.. tsu is time to 00ppm of output frequency after VDD is applied and outputs are enabled.. Output Waveform and Test Circuit figures below define the parameters.. Output is enabled if pad is floated or not connected. Δf EN pin low outputs are disabled DSC0 0 Includes frequency variations due to initial tolerance, temp. and power supply voltage 0.09 ±0 ± ±0 Aging Δf C ± ppm Startup Time t SU T= C ms Input Logic Levels Input logic high Input logic low V IH V IL 0.7xV DD 0.xV DD Output Disable Time t DA ns Output Enable Time t EN DSC0 Enable PullUp Resistor Pullup resistor exist 0 kω LVPECL Outputs Supply Current I DD Output Enabled, R L =0Ω. 8 ma Output Logic Levels Output logic high Output logic low V OH V OL R L =0Ω V DD.08 0 V DD. Pk to Pk Output Swing SingleEnded 800 mv Output Transition time Rise Time Fall Time t R t F 0% to 80% R L =0Ω, C L = 0pF ma ppm V ms ns V 0 ps Frequency f 0 Single Frequency. 0 MHz Output Duty Cycle SYM Differential 8 % Period Jitter J PER. ps RMS Integrated Phase Noise J PH 00kHz to 00kHz to khz to ps RMS DSC0 Page MKQBPD000
3 Rejection (dbc) Phase Jitter (ps RMS) DSC0 Nominal Performance Parameters (Unless specified otherwise: T= C, V DD =. V) mV 00mV..0. MHzLVPECL MHzLVPECL 0MHzLVPECL 0MHzLVPECL Supply Noise Frequency (khz) Power supply rejection ratio Lowend of integration BW: x khz to 0 MHz Phase jitter (integrated phase noise) Output Waveform t R t F Output Output 80% 0% 0% 80 mv /f o t EN t DA V IH Enable V IL Typical Termination Scheme V DD V DD 0.uF 0 Ω 0 Ω 00 Ω 8 Ω 8 Ω DSC0 Page MKQBPD000
4 Temperature ( C) DSC0 Test Circuit LVPECL I DD LVPECL 0Ω 0Ω V DD 0.uF 0.0uF V DA V TT V TT = V DD.0V Solder Reflow Profile 0 C 7 C 00 C 0 C C C/Sec Max. 080 Sec Pre heat 8 min max C/Sec Max. 00 Sec 00 Sec Reflow C/Sec Max. Cool Time 0 C refer to JSTD00C RampUp Rate (00 C to Peak Temp) C/Sec Max. Preheat Time 0 C to 00 C 080 Sec Time maintained above 7 C 00 Sec Peak Temperature 0 C Time within C of actual Peak 00 Sec RampDown Rate C/Sec Max. Time C to Peak Temperature 8 min Max. DSC0 Page MKQBPD000
5 DSC0 Package Dimensions 7.0 x.0 mm Plastic Package 7±0.0 [0.7±0.00]. [0.00].±0.0 [0.0±0.00] Plane.[0.00] ±0.0 [0.97±0.00].7 [0.] REF.8 [0.0].8 [0.07].±0.0[0.±0.00]. [0.0]. [0.0] 0.8±0.0 OUT OUT VDD PAD TIE TO GND. [0.0].0 x. mm Plastic Package ±0.0 [0.97±0.00].7 [0.00] 0.±0.0 Plane.7[0.0]. [0.07] REF. [0.07] REF.±0.0 [0.±0.00] 0.8± ±0. [0.079±0.00] OUT OUT VDD 0. [0.0]. [ 0.0] DSC0 Page MKQBPD000
6 DSC0. x. mm Plastic Package.±0.0 [0.±0.00].0 [0.0] 0.7±0. [0.079±0.00] Plane [0.0] REF 0.9 [0.0] REF [ 0.09].±0.0 [0.098±0.00] 0.9±0.0 [0.0±0.00] 0.[0.00] REF 0.9 [0.0] 0. [0.97] 0.±0.0 [0.98±0.00] No. Pin Terminal 0.8±0.0 OUT OUT VDD. x.0 mm Plastic Package.±0.0 [0.098±0.00] 0.7±0. [0.079±0.00] 0.8 [0.0] 0. REF 0. REF Plane Via to Power 0.7.0±0.0 [0.079±0.00] 0.7±0. [0.079±0.00] 0.7± REF 0.±0.0 [0.0±0.00] 0.±0.0 [0.099±0.00] ±0.0 OUT OUT VDD 0.±0.0 [0.0±0.00] 0.±0.0 [0.099±0.00] DSC0 Page MKQBPD000
7 DSC0 7.0 x.0 mm Plastic Package 7±0.0 [0.7±0.00]. [0.00].±0.0 [0.0±0.00] Plane.[0.00] ±0.0 [0.97±0.00].7 [0.] REF.±0.0[0.±0.00]. [0.0]. [0.0] 0.8±0.0 OUT OUT VDD. [0.0] Disclaimer: Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this data sheet. This information is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right to change circuitry, specifications and descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Micrel s terms and conditions of sale for such products, Micrel assumes no liability whatsoever, and Micrel disclaims any express or implied warranty relating to the sale and/or use of Micrel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser s own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. MICREL, Inc. 80 Fortune Drive, San Jose, California 9 USA Phone: + (08) Fax: + (08) hbwhelp@micrel.com DSC0 Page 7 MKQBPD000
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Low Voltage 1.2V/1.8V/2.5V CML 1:4 Fanout Buffer with /EN 3.2Gbps, 3.2GHz General Description The is a fully differential, low voltage 1.2V/1.8V/2.5V CML 1:4 Fanout Buffer with active-low Enable (/EN).
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CC series 1., 2.5,., 5.0 volt CMOS Oscillator Features CMOS output Output frequencies to 125 MHz Low jitter, Fundamental or rd OT Crystal Tristate output for board test and debug 10/70 or 0/5 C operating
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More informationFeatures. Applications GND. Micrel Inc Fortune Drive San Jose, CA USA tel +1 (408) fax + 1 (408)
3-Pin Microprocessor Supervisor Circuit with Open-Drain Reset Output General Description The is a single-voltage supervisor with open-drain reset output that provides accurate power supply monitoring and
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More informationFeatures. Applications. Micrel Inc Fortune Drive San Jose, CA USA tel +1 (408) fax + 1 (408)
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