XCO FAST TURNAROUND CLOCK OSCILLATOR HIGH FREQUENCY, LOW JITTER CLOCK OSCILLATOR FEATURES + DESCRIPTION SELECTOR GUIDE LVCMOS LVDS LVPECL

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XCO FAST TURNAROUND DESCRIPTION FEATURES + The XCO clock series is a cutting edge family of low to high frequency, low jitter output, single or multi - frequency clock oscillators. The XCO clocks are available in 7.0 x 5.0, 5.0 x 3.2, and 3.2 x 2.5 mm ceramic packages with output frequencies ranging from 10 MHz to 1.2 GHz. Customer can select up to four output frequencies. Its outstanding flexibility significantly reduces design cycle time and overall cost. The XCO clock design incorporates a low frequency crystal along with low jitter frequency synthesizer to provide a wide range of frequencies. The XCO clocks are available in LVCMOS, LVPECL and LVDS outputs, allowing for a wide variety of applications. Fast Turnaround (Ships Within Days) Very Low Jitter (Typical 0.6 ps) 10 MHz to 1.2 GHz Frequency Range Selectable Single, Dual, or Quadruple Frequencies Stability as low as ±20 ppm (-40 ~ 85 C) Available Sizes: 7.0 x 5.0 mm 5.0 x 3.2 mm 3.2 x 2.5 mm This product is ideal for the time conscious customer as shipments are made within days of a placed order. SELECTOR GUIDE LVCMOS LVDS LVPECL Package Size (mm) 7.0x5.0 5.0x3.2 3.2x2.5 7.0x5.0 5.0x3.2 3.2x2.5 7.0x5.0 5.0x3.2 3.2x2.5 Family Part Number XCO-74 XCO-54 XCO-34 XCO-78 XCO-58 XCO-38 XCO-79 XCO-59 XCO-39 Frequency Range (MHz) 10 250 10 1200 10-1200 Frequency Stability (ppm) ±20, ±25, ±50, ±100 ±20, ±25, ±50, ±100 ±20, ±25, ±50, ±100 Number of Frequencies 1, 2, 4 1, 2, 4 1, 2, 4 Supply Voltage (V) 2.5, 3.3 2.5, 3.3 2.5, 3.3 Temperature Range ( C) -20 ~ +70-20 ~ +70-20 ~ +70-40 ~ +85-40 ~ +85-40 ~ +85 Enable/Disable Pin Pin 1, Pin 2, or None Pin 1, Pin 2, or None Pin 1, Pin 2, or None

LVPECL LVCMOS ` OUTPUT CHARACTERISTICS PARAMETER SYMBOL CONDITION VALUE Min Typ. Max UNIT Frequency Range f O Up to 4 Available Frequencies 10 250 MHz V OH 0.9V cc V Output Levels V OL 0.1V cc V Rise/Fall Time T r/t f 20% - 80% (V OL, V OH) 0.5 ns 10 50 MHz 30 2.5V 51 135 MHz 45 Supply Current I s 136 250 MHz 55 ma 10 50 MHz 35 3.3V 51 135 MHz 50 136 250 MHz 60 Output Load O CL Standard 15 pf PARAMETER SYMBOL CONDITION Frequency Range f O Up to 4 available frequencies VALUE UNIT Min Typ. Max 10 1200 MHz Output levels V OH Load 50Ω to V cc-2v V cc-1.03 V cc-0.6 V V OL V cc-1.85 V cc-1.6 V Rise/Fall Time T r/t f 0.25 ns Output Voltage Swing V p-p Output termination 50 / V cc - 2.0V 0.6 1.0 V 10 50 MHz 35 2.5 V 51 215 MHz 45 216 640 MHz 65 Supply Current I s 641 1200 MHz 70 10 50 MHz 85 ma 3.3V 51 215 MHz 95 216 640 MHz 115 Output Load O CL 641 1200 MHz 120 Output Termination 50Ω to V cc-2v 50 Ω

LVDS ` PARAMETER SYMBOL CONDITION VALUE Min Typ. Max UNIT Frequency Range f O Up to 4 available frequencies 10 1200 MHz Differential Output Voltage V OD 10 1200 MHz 0.6 V Offset Voltage V OS V DC 1.3 V Rise/Fall Time T r/t f 0.35 ns 10 50 MHz 25 2.5V 51 215 MHz 30 216 640 MHz 43 Supply Current I s 641 1200 MHz 60 10 50 MHz 65 ma 3.3V 51 215 MHz 72 216 640 MHz 83 641 1200 MHz 100 Output Load O CL Differential 100Ω Load Connected Between Each Output 100 Ω

ELECTRICAL SPECIFICATIONS PARAMETER SYMBOL CONDITION VALUE Min. Typ. Max. UNIT Supply Voltage 1 V CC 2.5 or 3.3 V Duty Cycle DC Load depends on output type 45 55 % RMS Phase Jitter J 12 khz 20 MHz Bandwidth 0.6 1 ps -10 C to +70 C ± 20 ± 25 ± 50 Overall Frequency Stability 1,2 f/f c ppm -40 C to +85 C ± 25 ± 50 ±100 OE Function OE Pin Input LVCMOS/ LVTTL Start-Up Time t start T a=25 C 10 ms Enable Disable 3 Aging En Dis Min (logic 1 or open) HCMOS levels Max (logic 0) HCMOS levels 0.7V cc V 0.3 V Input Capacitance C IN 4 pf Input High Voltage V IH 0.7V CC V Input Low Voltage V IL 0.3V CC V Input High Current I IH 5 μa Input Low Current I IL -10 μa Equivalent Internal Pull-up Resistance R PULLUP 900 kω First year ±5 Year thereafter ±2 Operating Temperature 1 T a -40 +85 C Storage Temperature T (stg) Absolute max -45 +100 C Absolute Voltage Range V cc(abs) 4.6 V Moisture Sensitivity Level MSL JEDEC J-STD-020 1 Termination Finish Au Human body model ESD Sensitivity HBM 3 kv JESD22-A114 Notes 1 See part numbering table 2 Inclusive of 25 C calibration, tolerance, operating temperature range, input voltage variation, load change, aging, shock and vibration 3 Output goes to high impedance ppm

Phase Noise (dbc/hz) ` PHASE NOISE AND JITTER PERFORMANCE 0-20 -40-60 -80-100 -120 50.000 MHz 155.520 MHz 320.000 MHz 622.080 MHz -140-160 -180 10 100 1K 10K 100K 1M 10M 100M Offset Frequency (MHz) Data collected using Agilent E5052B signal source analyzer. V cc = 2.5V. FREQUENCY (MHz) FULL BANDWIDTH PHASE JITTER (ps) PHASE JITTER 12 khz to 20 MHz INTEGRATED BANDWIDTH (ps RMS) 50.000 3.0 0.9 155.520 2.1 0.6 320.000 3.2 0.7 622.080 3.3 0.7 Phase jitter integrated using Agilent E5052B signal source analyzer. V cc = 2.5V (LVCMOS, LVDS, LCPECL load)

MECHANICAL DIMENSIONS AND PIN FUNCTIONING

Notes (Applicable To All Packages) 1 Enable / Disable feature is available on either pin 1 or pin 2. See options on part numbering table. 2 There is no enable/disable option when the number of output frequencies is four. 3 0.01 μf external bypass capacitor is recommended as seen in solder pattern for 7 x 5 mm, and required for 5 x 3.2 and 3.2 x 2.5 mm PIN SYMBOL FUNCTION 1 see below Refer to Pin Logic Table Below 2 see below Refer to Pin Logic Table Below 3 GND Case and Electrical Ground 4 Output 1 Output 1 5 Output 2 or NC Complementary Output (LVPECL, LVDS) or N/C (LVCMOS) 6 V cc Power Supply Voltage PIN LOGIC TABLE NUMBER OF FREQUENCIES PIN 1 PIN 2 FREQUENCY OUTPUT 1 Enable/Disable N/C F 1 N/C Enable/Disable F 1 2 0 Logic Level F 1 Enable/Disable 1 Logic Level F 2 0 Logic Level F 1 Enable/Disable 1 Logic Level F 2 0 Logic Level 0 Logic Level F 1 4 0 Logic Level 1 Logic Level F 2 1 Logic Level 0 Logic Level F 3 1 Logic Level 1 Logic Level F 4

PART NUMBERING SERIES PACKAGE (mm) OUTPUT SUPPLY VOLTAGE (V) FREQUENCY STABILITY (ppm) TEMP RANGE ( C) NUMBER OF FREQUENCIES ENABLE / DISABLE PIN - OUTPUT FREQUENCY (MHz) xco 7: 7.0 x 5.0 5: 5.0 x 3.2 3: 3.2 x 2.5 4: LVCMOS 8: LVDS 9: LVPECL 2: V cc = 2.5 3: V cc = 3.3 K: ±20 I: ±25 H: ±50 J: ±100 U: -20~70 V: -40~85 1: Single 2: Dual 4: Quad 1 1: Pin 1 2: Pin 2 0: NONE 1 - F 1 F 1 - F 2 F 1 - F 2 - F 3 - F 4 Notes 1 There is no enable/disable option when the number of output frequencies is four. Enable/Disable pin option should be selected as 0. EXAMPLE: XCO 7 9 3 H U 2 2-74.250 156.250 XCO Clock Oscillator 7.0 x 5.0 mm LVPECL 3.3 V ±50 ppm -20 ~ 70 C Dual Frequency Enable/Disable Pin 2 1 st Frequency: 74.250 MHz 2 nd Frequency: 156.250 MHz MARKING A marking code will be issued by the sales department at order confirmation.

REFLOW PROFILE t P T P Ramp-up Critical Zone T L to T P T L Temp. [ C] T SMAX T SMIN t L Ramp-down t S Preheat t[25 C] to Peak Time [sec] Recommended Solder Reflow Profile Temperature Min Preheat T SMIN 150 C Temperature Max Preheat T SMAX 175 C Time (T SMIN to T SMAX) t S 60-180 sec. Temperature T L 217 C Peak Temperature T P 260 C Ramp-up rate R UP 3 C/sec max. Ramp-down rate R DOWN 6 C/sec max. Time within 5 C of Peak Temperature t P 10 sec max. Time t[25 C] to Peak Temperature t[25 C] to Peak 480 sec. Time t L 60-150 sec.