Investigating the Electronic Behavior of Nano-materials From Charge Transport Properties to System Response Amit Verma Assistant Professor Department of Electrical Engineering & Computer Science Texas A&M &University Kingsville 1
Current State of Si Technology Semiconductor industry currently routinely fabricates devices with sizes in the 10 s of nanometers Intel has come up with a device size that is 32 nm long, i.e., the active area of the device. A chip now can contain up to 2 billion transistors Active research continues to bring the 22 nm technology to the market in a few years 2
Current State of Si Technology This continued advancement meets and exceeds Moore s Law Moore s Law: The number of transistors on a chip will double about every two years However there are many problems over the horizon 3
Current State of Si Technology Continued scaling has brought many problems to the forefront Si devices at that small scale demonstrate a significantly reduced charge carrier mobility, resulting in lower device speeds Devices at that small scale also behave erratically in terms of their current-voltage relationship 4
Current State of Si Technology Some of these problems have been overcome by clever design Using SiGe in stead of Si increases device speeds Different device topologies, for example a gate-allaround structure result in better electrostatic control At the circuit level, using 3-D circuit topology, or system-on-a-chip, or multi-core technologies improves performance 5
State of Semiconductor Technology Moore s Law, however, has become a historical and economical impetus Device sizes will continue to shrink This has led to an enormous interest in small diameter ( < 5 nm) nanowires and nanotubes, such as carbon nanotubes (CNTs) and silicon nanowires (SiNWs) 6
What are CNTs? Multi-wall Carbon Nanotube [1] Mono-atomic tubes of honey-comb lattice of carbon Diameter of tubes in the range of nanometers Multi-wall or single wall Hold excellent mechanical and electrical properties 7
What are SiNWs? Within the context of our presentation they are small diameter structures Figure shows crosssection and side view of a typical free-standing SiNW where Si atoms on the surface are terminated with H atoms 8
Why Nano-materials Oxide Drain Target molecule Gate An example of detection through conductance modulation channel conductance changes if a molecule attaches to the material Nano-material Promise of significantly improved electrical properties Such small scales also promise improved performance in other applications - Nano- bio or chemical sensors - Nano-scale antennas - Nano-optoelectronics and solar power harvesting Source 9
An important point to highlight before proceeding further When it comes to small cross-section nano-materials whether CNTs or SiNWs, or any other we are essentially dealing with classes of materials Each individual member has a potentially different electronic response depending on the physical structure 10
Current Research My current research on nano-materials focuses on a few broad areas: - Charge transport modeling of nanowires and nanotubes - Modeling of the current-voltage response of nanodevices, and circuit response of those devices - Development of antennas from nano-materials - Solar power harvesting using carbon nanotubes 11
Carrier-phonon interaction Broad approach so far: Determine the electronic band structure of nanowires and nanotubes using the quantum mechanical tight-binging method Couple tight binding approach for electrons and holes with continuum approach for phonons This allows us to treat holes and electrons with the full quantum mechanical tight binding wave functions Scattering between multiple subbands is included 12
Carrier transport Once carrier-phonon scattering rates are determined, both low- and high-field carrier transport can be investigated For CNTs, low-field mobility obtained from Rode s method For SiNWs we use momentum relaxation time approximation High-field transport investigated using ensemble Monte Carlo simulations i k B i i 2e Tm eff i n 1 st n i i BZ E i ( k i subband index z 1 ) W ( k st BZ i f 0 z ( k ) z 1 f ) dk 0 z ( k z ) dk W i Scattering rate E i Energy m eff Effective mass f o Equilibrium distribution function z 13
Carrier transport low-field Diameter dependence of low-field mobility at various temperatures for CNTs n here represents the chirality and is a measure of the diameter Larger diameter CNTs show very high low-field mobility Using this approach for semiconducting CNTs, mobility has been found to be ~ independent of chirality and dependent on diameter [4] (important implication for fabrication!) 14
Carrier transport low-field SiNW diameter Hole mobility Electron mobility 1.27 nm 221 309 1.93 nm 309 574 2.40 nm 865 834 3.10 nm 665 1037 Room temperature low-field electron and hole mobility (in cm 2 /V-s) Room temperature electron and hole low-field mobility for [110] axially aligned SiNWs for different diameters For some of the SiNWs, hole mobility is greater than bulk Si hole mobility Hole mobility is also comparable to electron mobility 15
Modeling of Devices and Circuits Modeling of devices and larger circuits at the nanoscale also requires a paradigm shift. Device modeling involves solving the device electrostatics (Poisson equation) along with the charge carrier transport equations, usually selfconsistently Circuit modeling generally involves SPICE modeling, where standardized device parameters are used, which are difficult to change 16
Device Modeling At the ultra-small scale, charge carrier transport is usually 1-D However the Poisson equation is 3-D, making it difficult to solve these equations self-consistently We have proposed a new method to overcome this problem Solve the Gauss Law in integral form instead of Poisson equation D. ds area Qtotal 17
Device Modeling - example 3.1 nm diameter [110] axially aligned cylindrical intrinsic SiNW. It consists of an intrinsic SiNW, surrounded by 450 nm SiO 2 as the insulator, in turn surrounded by Al as the gate electrode. The source and drain contacts are assumed to be ideal Ohmic. Drain current versus gate-source voltage for a 5 μm long channel SiNW FET. Inset: Drain current versus drain-source voltage. Gate voltage is with respect to theal-si work function difference The new proposed method has shown excellent promise so far. It is currently being extended to smaller structures to determine the limitations. Drain current versus gate-source voltage for a 10 μm channel SiNW gate-all-around FET. Inset: Drain current versus drain-source voltage. Gate voltage is with respect to the Al- Si work function 18
Circuit Modeling Simplified distributed parameter representation of the SiNW GAA FET Given the plethora of material physical structure and device geometry possible, we have proposed that circuit modeling at the nanoscale requires a close coupling of device and circuit simulations. Modeling circuits involving nanoscale devices also requires a new approach, and development of new tools for use by the industry. Output current versus time for the GAA SiNWFET for 5 μm long SiNW channel FET (above), and for 10 μm long SiNW channel FET (below). Inset to above: The input voltage signal. b a Device simulations, in this scenario, are inputs to the circuit simulations. 19
Antenna Design A new class of microwave antennas has recently been developed where the radiating patch is composed entirely of nanomaterials It is expected that this new antenna design will have far reaching implications for integrated circuit chip design, as well as other specialized applications 20
Antenna Design The antenna utilizes an aperture coupled (or contactless) electromagnetic energy feeding mechanism This overcomes the need to make electrical contacts to the active patch, which can now be composed entirely of nanomaterials. Three resonance peaks with frequencies of 8.9 GHz, 14 GHz, and 14.7 GHz, respectively, obtained from simulation results 21
Antenna Design Final assembled view of the Fe patch thinfilm antenna. Left: Top view. Right: Bottom view Top view and bottom view of a CNT patch antenna Scanning Electron Microscopy view of the CNTs grown as the patch of the microstrip antenna. Left: Low resolution image, and Right: High resolution image of the CNT patch. 22
Magnitude of S 21 (db) Antenna Design Response of the CNT patch antenna (top), and Fe nano-film patch antenna (bottom) CNT patch antenna shows resonance peaks lower in frequency (The three resonance peaks occur at 8.37 GHz, 10.05 GHz, and 11.36 GHz.), demonstrating potential for antenna miniaturization Fe antenna shows ultra-wide band response. This provides it with the potential to carry higher data rate with lower power and reduced interference than 802.11 Wi-Fi networks or first-generation Bluetooth products -45-50 -55-60 -65 12 13 14 15 16 17 1 GHz 23
Conclusions The field of nano-materials is still evolving, with many challenges and yet to be discovered potential It is certain that small cross-section nanomaterials nanowires or nanotubes will dominate the semiconductor industry in the future Whether that future is near or distant depends on how fast we can address those challenges 24
Thank You!!