Data Pack H Issued March 1997 232-2756 Data Sheet Modem IC 6929 CCITT V21 data format RS stock number 630-976 The 6926 is 300 bit per second chip modem designed to transmit and receive serial binary data over a switched telephone network using frequency shift keyed (FSK) modulation. CCITT V21 data format allows compatibility with equipment operating to this standard. All the necessary modulation, demodulation and filtering to implement a serial, asynchronous communications link are included on-chip. Absolute maximum ratings Power supply voltage + 112V (V A ) -0.3 to +15V +5V (V D ) -0.3 to +7V Analogue input voltage -0.3 to VA + 0.3V Digital input voltage -0.3 to VD + 0.3V Storage temperature range -55 to + 150 C Operating temperature range 0 to +70 C Features CCITT V21 compatible Full duplex (2-wire) operation Data rate up to 300b/s Originate and answer modes Filtering, modulation, demodulation on-chip Full DTE interface Low power CMOS construction TTL compatible digital interface. ATTENTION OBSERVE PRECAUTIONS FOR HANDLING ELECTROSTATIC SENSITIVE DEVICES Electrical characteristics dc and digital interface (VA = 12V ± 10%, VD = 5V ±5%, Ta = 0 ~ 70 C) Parameter Symbol Condition Min Typ Max Unit Power supply IA Ordinary 7.5 15.0 current ID operation 1.0 2.0 Input *1 I IL V I = 0 V -10 10 leakage current I IH V I = V D -10 10 *1 V IL 0 0.8 Input voltage V IH 2.2 VD *2 V OL I OL = 1.6mA 0 0.4 Output voltage V OH I OH = 400µA 0.8 x VD VD ma µa V V *1 * LT,CC,RS1,RS2,XD,CD2,RD2,M,FT,T S1,T S2 *2 * CLK,CS,RD,CD1,CD2,RD1 *CD2 is I/O terminal
Recommended operating conditions Parameter Symbol Condition Min Typ Max Unit Power supply voltage VA With respect to AG 10.8 12.0 13.2 Analogue VA + 12V VD With respect to DG 4.75 5.00 5.25 V Digital VD +5V AG,DG 0 Operating temperature T OP 0 70 C CRYSTAL 3.579545 MHz R1 Transformer 600 Ω impedance = 600Ω R2 51 R3 51 R4 51 R5 51 R6 51 R8 51 R8 33 R9 51 C0 C1 0.047 C2 2.2 C3 1.0 C4 0.01 C5 10 C6 10 Application circuits using above conditions are provided in Figure 6 Analogue interface characteristics (VA = 12V ± 10%, VD = 5V ± 5%, Ta = 0 ~ 70 C) Parameter Symbol Condition Min Typ Max Unit Transmit carrier out (a o ) ORIGINATE Mark MODE 1 f OM 974 980 986 Carrier Space fcrystal = f OS 1174 1180 1186 frequency 0 3.579545MHz Hz ANSWER Mark MODE 1 f AM 1644 1650 1656 Carrier Space frequency 0 f AS 1844 1850 1856 Output resistance ROXA 200 Ω Load resistance RLXA 50 kω Load capacitance CLXA 100 pf Transmit level VOXA 4 6 8 *1 dbm Output VA -1 VA VA +1 V offset voltage VOSX 2 2 2 Out-of-band energy (referred to carrier level) E OX C 1 = 0.047µF Refer to Figure 2 db Receive carrier input (A IN ) Input resistance R IRA 100 kω Receive signal level range V IRA 48 6 *1 dbm Carrier ON V CD ON R8 = 33kΩ *2 43 detect level OFF V CD OFF R9 = 51kΩ 48 Carrier detect hysteresis H YS V CD ON - V CD OFF 2 db kω µf 2 Note: *1. OdBm = 0.775 Vrms *2. The resistor values are typical.
Receive filter ORIG. 1600 800 MODE ~1900Hz Group delay D DL ANS. 930 distortion MODE. ~1200Hz 850 µs Adjacent channel rejection L AC V AIN = 6dBm 50 db Figure 1 Block diagram Figure 2 Out-of-band energy referred to carrier level (C 1 = 0.047 µf) 3
Figure 3 Low band filter Figure 4 High band filter Demodulated bit characteristics (VA = 12V ± 10%, VD = 5V ±5%, T a = 0 ~ 70 C) Parameter Symbol Condition Min Typ Max Unit Peak inter-symbol ID Back-to-back over input signal distortion range 6 to 40dBm. 511-bit test pattern 6 % Bit error rate BER Back-to-back with 0.3 ~ 3.4kHz flat noise. Receive signal level -25dBm. 511-bit test S/N 5 10-5 pattern (db) Timing characteristics (VA = 12V ± 10%, VD = 5V±5%, T a = 0 ~ 70 C) Parameter Symbol Condition TS2 TS1 Min Typ Max Unit RS/CS delay time TRC ON RS1 = '0' 0 0 395 400 405 CS = '0' 0 1 25 30 35 1 0 345 350 355 1 1 External delay timer TRC OFF RS1 = '1' CS = '1' * * 0 0.5 CD/ON TCD ON 0 0 300 320 delay time 0 1 5 20 1 0 150 170 ms 1 1 External delay timer CD/OFF TCD OFF 0 0 20 70 delay time 0 1 20 70 1 0 10 40 1 1 External delay timer Soft Turn-OFF time TST * * 10 Refer to Figure 5. Note: * Irrespective of I/O condition. 4
Figure 5 Timing diagrams Pin description Name Pin No. I/O Function Power DG 15 Ground reference of V D (digital ground) A G 19 Ground reference of V A (analogue ground) V A 24 Supply voltage (+ 12V nominal) D 26 Supply voltage (+ 5V nominal) Clocks X1 1 Master clock timing is provided by either a crystal (3.579545MHz ± 0.01%) connected across X1 and X2 2 X2, or by an external TTL/CMOS clock driving X2 with ac coupling where X1 is left unconnected. (Figure 7). CLK 3 O 873.9Hz clock output. This clock is used to implement external delay circuits etc. Control LT 4 I Digital loop back. During digital 'High' any data sent on the XD pin will appear on the RD pin and any data sent on the RS1 pin will immediate;y appear on the CS pin. Any data demodulated from the received carrier on the AIN pin will be the modulated data to implement the transmitted carrier. In this case, sending the transmitted carrier to the phone line depends on the CC line status and not on RS1. CC 5 I During digital loopback, the data on this pin becomes a control signal for sending the transmitted carrier to the phone line in place of RS1. RS2 8 I When an external circuit gives the RS/CS delay time which is not possible within the device, this pin should be connected to the external circuit output. (Figure 8). CD1 11 O Fast carrier detection output. This pin is internally connected to the input of the built-in carrier detect delay circuit. When an external delay circuit provides the delay time which is not possible with the device alone, CD1 should be connected to the external circuit input. (Figure 8). CD2 12 I/O When an external circuit provides the carrier detect delay time which is not possible with the device alone, this pin becomes the input for the external circuit output signal. In other cases (when using the delay time within the device, the data on the TS1 or TS2 is not a digital 'High ), this pin becomes the Carrier-Detect signal output. RD1 13 O The RD1 data is demodulated data from the received carrier. RD2 is the input of the following logic circuits. (Figure 9). Usually, RD1 data is input directly to RD2. In some cases RD2 data is controlled by an NCU (Network-Control-Unit) etc. this may be required instead of the RD1 data. RD2 14 I CDR1 16 O These two pins are the output (CRD1) and inverting input (CRD2) of the buffer operational amplifier of which the noninverting input is connected to the built-in voltage reference, stabilised to variations in the supply voltage and temperature. (Figure 10). An adequate carrier-detect level can be set by CDR2 17 I selecting the ratio of R8 and R9. Therefore, the loss in the received carrier level by the phone-line transformer can be compensated for by adjusting the ratio of R 8 and R 9. R 8 + R 9 should be greater than 50kΩ. M 22 I Answer/Originate mode select. During digital 'High', the originate mode is selected. A low input selects the answer mode. FT 23 I This pin may be used for device tests only. During digital 'High", the A o pin will be connected to the receiving filter output instead of transmitting filter output. 5
Name Pin. No. I/O Function TS1 27 I RS/CS delay and carrier detect options are selected by TS1 and TS2 inputs. If the external timing option is required, digital 'High' should be applied to TS1 and TS2 pins and the external delay circuits used to obtain the desired delay characteristics. In this case, the CD2 pin becomes not only the input TS2 28 I for the externally delayed signal, but also the Carrier Detect output. (Figure 8). Inputs/Outputs CS 6 O Clear-to-Send signal output. A digital 'High" level indicates the 'OFF' state and a digital 'Low' indicates the ON state. This output goes 'Low" at the end of a delay (RS/CS delay) initiated when RS1 (Request-to-Send) goes 'Low'. RS1 7 I Request-to-Send signal output. A digital 'High' level indicates the 'OFF' state. A digital 'Low' level indicates the 'ON' state and instructs the modern to enter the transmit mode. This input must remain 'Low' for the duration of data transmission. 'High' turns the transmitter off. XD 9 I This is the digital data to be modulated and transmitted via AO. A digital 'High' will be transmitted as 'Mark'. A digital 'Low' will be transmitted as 'Space'. No signal appears at AO unless RS1 is 'Low". RD 10 O Serial digital data demodulated from AIN is available at this output. A digital 'High' indicates 'Mark' and a digital 'Low' indicates 'Space'. For example, under the following condition this output is forced to be a 'Mark' state because the data may be invalid. When CD2 (Carrier-detect) is in the 'OFF' state. SG2 18 O SG1 and SG2 are built-in analogue signal grounds. SG2 is used only for the Carrier-Detect function. The dc voltage of SG1 is approximately 6V, so the analogue line interface must be implemented by ac coupling. (Figure 6). To make these impedances lower and ensure device performance, it is SG1 20 O necessary to put bypass capacitors on SG1 and SG2 in close physical proximity to the device. AIN 21 I This is the input pin for the analogue signal from the phone line. The modem extracts the information in this modulated carrier and converts it into a serial data stream for presentation at RD output. A O 25 O This analogue output is the modulated carrier to be conditioned and sent over the phone line. Figure 6 Typical application circuits Notes: 1. The crystal should be wired in close physical proximity to the device. 2. High level signals should not be routed next to low level signals. 3. Bypass capacitors on V A, SG1 and SG2 should be as close to the device as possible. 4. AG and DG should be linked as close to the system ground as possible. 5. C 5 and C 6 are supply decoupling capacitors typically 10µF. 6
C 0, Receive C 0.047µF R 2 51kΩ R 6 (51kΩ) 1 signal level C 2 2.2µF R 3 51kΩ R 7 51kΩ C 3 1µF R 4 51kΩ R 8 (33kΩ) Carrier detect level R 1 600Ω R 5 (51kΩ) Transmit R 9 51kΩ signal level Note: The signal level on the A IN pin should not exceed -6dBm. Figure 7 Figure 8 External delay connection (A) RS/CS delay, (B)...CD/ON delay, (C)...CD/OFF delay Note: Supply voltage equals VD for all gates. * : The desired delay can be realised by selecting the appropriate bits from 4020's outputs. The number of the bits is not always 3. Each delay can be set differently from built-in delays. 7
Figure 9 Equivalent logic interface of the integrated modem Figure 10 External resistor connection for the setting of carrier detect level General information The telephone line allows transmission of analogue audio frequency signals, but the digital data signal, as such, cannot be passed through. For this reason, modems are required as interface to existing analogue transmission lines. The basic role of a modem is to convert digital logic signals '1' and '0' into an analogue equivalent that can be passed through a telephone line, and vice versa. A data signal (digital signal) from a data terminal is converted into an analogue audio signal, and transmitted to the modem of a receiving terminal utilising the public telephone network. At the receiving end, the analogue audio signal thus received is then converted by its modem into a corresponding digital signal and conveyed to the receiving data terminal. In this way, two distant data terminals can communicate for the exchange of data by means of modems. 8
Referring to Figure 11, modulation and demodulation means the conversion of digital signals into analogue and vice versa. The duplexer transmits a signal to the telephone line or receives it from the telephone line, and is designed to ignore the locally generated transmitted signal. Usually, it uses a hybrid transformer or hybrid resistor circuit consisting of two operational amplifiers, resistors and a line transformer. Modem communication systems The modem communication systems are largely divided into modes of operation. One is called the full duplex system, and the other the half-duplex system. The telephone line is a balanced two-wire circuit, and usually is called the 2-wire (2W) line. The full-duplex and half-duplex are terms which conform to the common use of this 2-wire line. a) 4-wire full-duplex communication The 4-wire half-duplex communication is another widely practiced method in which two dedicated telephone lines are used for transmission and reception, respectively. This method provides transmission and reception simultaneously, but requires two telephone lines. b) 2-wire half-duplex communication The 2-wire half-duplex communication is a method which links two terminals in either direction, but only one direction at a time. Namely, when one terminal is transmitting, the other must operate in the receiving mode. This limitation may be a drawback for certain applications. c) 2-wire full-duplex communication The 2-wire full-duplex communication is a method in which duplexers or the like are used to permit two distant terminals to work in both directions simultaneously through a 2-wire line. This method is more economical compared with 2-wire half duplex. The above three methods are schematically shown in Figure 12. Figure 13 FSK transmission Modem operation In case of manual calling, the modem is placed in the originate and voice mode (telephone line connected to the telephone handset), and a call is made using the telephone handset. When an answer is detected (ie. an answer mark tone is heard), the modem is placed in the data mode (the telephone line connected to the modem), and the indicator will light up showing that a carrier signal from the answering modem is received. Setting of the carrier detect level In the 6926, the receive carrier detect ON and OFF levels can be set within the range of -43 to -48dBm by Figure 14 Figure 11 Typical modem system adjusting the ratio of the external resistors R 8 and R 9. After adjustment, the voltage between Pin 16 (CDR1) and Pin 18 (SG2) will be about 3V. Since the input signal level is referenced to Pin 21 (A IN ) of the LSI, it may have to be amplified if attenuated by a line transformer, etc. Figure 15 Figure 12 Modem communication systems Figure 16 is a simplified drawing of Figure 15. 9
Figure 16 GR 1 + R 3 R2 2 +6dB AR R 7 1/2 6db R 6 + R 7 Typical Design Values GT R 5 1 0dB R 4 The information provided in RS technical literature is believed to be accurate and reliable; however, RS Components assumes no responsibility for inaccuracies or omissions, or for the use of this information, and all use of such information shall be entirely at the user s own risk. No responsibility is assumed by RS Components for any infringements of patents or other rights of third parties which may result from its use. Specifications shown in RS Components technical literature are subject to change without notice. RS Components, PO Box 99, Corby, Northants, NN17 9RS Telephone: 01536 201234 An Electrocomponents Company RS Components 1997