MIC722 Rail-to-Rail Dual Op Amp General Description The MIC722 is a dual high-performance CMOS operational amplifier featuring rail-to-rail inputs and outputs. The input common-mode range extends beyond the rails by 300mV, and the output voltage swings to within 50µV of both rails when driving a 00kΩ load. The amplifiers operate from 2.2V to 5V and are fully specified at 2.2V, 5V, and 5V. Gain bandwidth and slew rate are 750kHz and 0.7V/µs, respectively at 2.2V supply. The MIC722 is available in the MM8 8-lead MSOP package. Features Small footprint MSOP-8 package 350µA supply current per op amp at 2.2V supply Guaranteed 2.2V, 5V, and 5V performance 750kHz gain-bandwidth product at 2.2V supply 0.0% total harmonic distortion at khz (5V, 2kΩ) Drives 200pF at 5V and greater supply voltages Applications Battery-powered instrumentation PCMCIA, USB peripherals Portable computers and PDAs Ordering Information Part Number Standard Pb-free Temperature Range Package MIC722BMM MIC722YMM 40 C to +85 C MSOP-8 Pin Configuration OUT A 8 8 IN A IN A+ V 2 3 4 7 6 5 OUT B INB INB+ 2 3 4 A B 7 6 5 MSOP-8 (MM) Pin Description Pin Number Pin Name Pin Function / 7 OUTA / OUTB Amplifier Outputs 2 / 6 INA / INB Inverting Inputs 3 / 5 INA+ / INB+ Noninverting Inputs 4 V Negative Supply: Negative supply for split supply application or ground for single supply applications. 8 Positive Supply MM8 is a trademark of, Inc., Inc. 280 Fortune Drive San Jose, CA 953 USA tel + (408) 944-0800 fax + (408) 474-000 http://www.micrel.com June 2005 MIC722
Absolute Maximum Ratings (Note ) Supply Voltage (V V V )... 6.5V Differential Input Voltage (+ )...±0V I/O Pin Voltage (, ), Note 3... V + 0.3V to V V 0.3V Junction Temperature (T J )... +50 C Storage Temperature... 65 C to +50 C Lead Temperature (soldering, 0 sec.)... 260 C ESD, Note 6... 000V Operating Ratings (Note 2) Supply Voltage (V V V )... 2.2V to 5V Junction Temperature (T J )... 40 C to +85 C Max. Power Dissipation... Note 4 Package Thermal Resistance, Note 5 MSOP-8 (θ JA )... 200 C/W DC Electrical Characteristics (2.2V) V = +2.2V, V V = 0V, V CM = = V /2; R L = MΩ; T J = 25 C, bold values indicate 40 C T J +85 C; Note 7; unless noted V OS Input Offset Voltage 0.5 9 mv TCV OS Input Offset Voltage Average Drift 3.0 µv/ C I B Input Bias Current.0 0 pa 64 500 pa I OS Input Offset Current 0.5 5 pa 32 250 pa R IN Input Resistance > TΩ CMRR Common-Mode Rejection Ratio -0.3V V CM 2.5V, Note 9 45 65 db ±PSRR Power Supply Rejection Ratio V = V V =.V to 2.5V, = V CM = 0 60 85 db C IN Common-Mode Input Capacitance 3 pf V O Output Swing output high, R L = 00k, 0.5 mv specified as V mv output low, R L = 00k 0.5 mv mv output high, R L = 2k 8 33 mv specified as V 50 mv output low, R L = 2k 8 33 mv 50 mv output high, R L = 600Ω 26 0 mv specified as V 65 mv output low, R L = 600Ω 26 0 mv 65 mv I SC Output Short Circuit Current sinking or sourcing, Note 8 20 50 ma I S Supply Current both amplifiers 0.7.6 ma AC Electrical Characteristics (2.2V) V = 2.2V, V V = 0V, V CM = = V /2; R L = MΩ; T J = 25 C, bold values indicate 40 C T J +85 C; Note 7; unless noted SR Slew Rate 0.7 V/µs GBW Gain-Bandwidth Product 750 khz φ m Phase Margin C L = 0pF 80 C L = 200pF 40 G m Gain Margin 0 db Interamplifier Isolation Note 2 90 db MIC722 2 June 2005
DC Electrical Characteristics (5V) V = +5.0V, V V = 0V, V CM =.5V, = V /2; R L = MΩ; T J = 25 C, bold values indicate 40 C T J +85 C; Note 7; unless noted V OS Input Offset Voltage 0.5 9 mv TCV OS Input Offset Voltage Average Drift 3.0 µv/ C I B Input Bias Current.0 0 pa 64 500 pa I OS Input Offset Current 0.5 5 pa 32 250 pa R IN Input Resistance > TΩ CMRR Common-Mode Rejection Ratio -0.3V V CM 5.3V, Note 9 55 75 db ±PSRR Power Supply Rejection Ratio V = V V = 2.5V to 7.5V, = V CM = 0 55 00 db C IN Common-Mode Input Capacitance 3 pf Output Swing output high, R L = 00k 0.3.0 mv specified as V.5 mv output low, R L = 00k 0.3.0 mv.5 mv output high, R L = 2k 3 50 mv specified as V 75 mv output low, R L = 2k 3 50 mv 75 mv output high, R L = 600Ω 40 65 mv specified as V 250 mv output low, R L = 600Ω 40 65 mv 250 mv I SC Output Short Circuit Current sinking or sourcing, Note 8 40 40 ma I S Supply Current both amplifiers 0.8.8 ma AC Electrical Characteristics (5V) V = 5V, V V = 0V, V CM =.5V, = V /2; R L = MΩ; T J = 25 C, bold values indicate 40 C T J +85 C; Note 7; unless noted THD Total Harmonic Distortion f = khz, A V = 2, 0.05 % R L = 2kΩ, = 4.0 V PP SR Slew Rate 0.6 V/µs GBW Gain-Bandwidth Product 465 khz φ m Phase Margin C L = 0pF 85 C L = 200pF 40 G m Gain Margin 0 db Interamplifier Isolation Note 2 90 db June 2005 3 MIC722
DC Electrical Characteristics (5V) V = +5V, V V = 0V, V CM =.5V, = V /2; R L = MΩ; T J = 25 C, bold values indicate 40 C T J +85 C; Note 7; unless noted V OS Input Offset Voltage 0.5 9 mv TCV OS Input Offset Voltage Average Drift 3.0 µv/ C I B Input Bias Current.0 0 pa 64 500 pa I OS Input Offset Current 0.5 5 pa 32 250 pa R IN Input Resistance > TΩ CMRR Common-Mode Rejection Ratio -0.3V V CM 5.3V, Note 9 60 85 db ±PSRR Power Supply Rejection Ratio V = V V = 2.5V to 7.5V, = V CM = 0 55 00 db A V Large Signal Voltage Gain sourcing or sinking, 340 V/mV R L = 2k, Note 0 sourcing or sinking, 300 V/mV R L = 600Ω, Note 0 C IN Common-Mode Input Capacitance 3 pf Output Swing output high, R L = 00k 0.8 2 mv specified as V 3 mv output low, R L = 00k 0.8 2 mv 3 mv output high, R L = 2k 40 80 mv specified as V 20 mv output low, R L = 2k 40 80 mv 20 mv output high, R L = 600Ω 30 270 mv specified as V 400 mv output low, R L = 600Ω 30 270 mv 400 mv I SC Output Short Circuit Current sinking or sourcing, Notes 8 50 250 ma I S Supply Current both amplifiers 0.9 2.0 ma AC Electrical Characteristics (5V) V = 5V, V V = 0V, V CM =.5V, = V /2; R L = MΩ; T J = 25 C, bold values indicate 40 C T J +85 C; Note 7; unless noted THD Total Harmonic Distortion f = khz, A V = 2, 0.0 % R L = 2k, = 8.5 V PP SR Slew Rate = 5V, Note 0.5 V/µs GBW Gain-Bandwidth Product 420 khz φ m Phase Margin C L = 0pF 85 C L = 500pF 40 G m Gain Margin 0 db e n Input-Referred Voltage Noise f = khz, V CM = V 37 nv/ Hz i n Input-Referred Current Noise f = khz.5 fa/ Hz Interamplifier Isolation Note 2 90 db MIC722 4 June 2005
Note. Note 2. Note 3. Note 4. Note 5. Note 6. Note 7. Note 8. Note 9. Exceeding the absolute maximum rating may damage the device. The device is not guaranteed to function outside its operating rating. I/O Pin Voltage is any external voltage to which an input or output is referenced. The maximum allowable power dissipation is a function of the maximum junction temperature, T J(max) ; the junction-to-ambient thermal resistance, θ JA ; and the ambient temperature, T A. The maximum allowable power dissipation at any ambient temperature is calculated using: P D = (T J(max) T A ) θ JA. Exceeding the maximum allowable power dissipation will result in excessive die temperature. Thermal resistance, θ JA, applies to a part soldered on a printed-circuit board. Devices are ESD protected; however, handling precautions are recommended. Human body model,.5kω in series with 00pF. All limits guaranteed by testing or statistical analysis. Continuous short circuit may exceed absolute maximum T J under some conditions. CMRR is determined as follows: The maximum V OS over the V CM range is divided by the magnitude of the V CM range. The measurement points are: V CM = V V 0.3V, (V V V )/2, and V + 0.3V. Note 0. R L connected to 7.5V. Sourcing: 7.5V 2.5V. Sinking: 2.5V 7.5V. Note. Device connected as a voltage follower with a 0V step input. The value is the positive or negative slew rate, whichever is slower. Note 2. Referenced to input. June 2005 5 MIC722
Application Information Input Common-Mode Voltage The MIC722 tolerates input overdrive by at least 300mV beyond either rail without producing phase inversion. If the absolute maximum input voltage is exceeded, the input current should be limited to ±5mA maximum to prevent reducing reliability. A 0kΩ series input resistor, used as a current limiter, will protect the input structure from voltages as large as 50V above the supply or below ground. See Figure. R IN 0kΩ Figure. Input Current-Limit Protection Output Voltage Swing Sink and source output resistances of the MIC722 are equal. Maximum output voltage swing is determined by the load and the approximate output resistance. The output resistance is: VDROP ROUT = ILOAD V DROP is the voltage dropped within the amplifier output stage. V DROP and I LOAD can be determined from the V O (output swing) portion of the appropriate Electrical Characteristics table. I LOAD is equal to the typical output high voltage minus /2 and divided by R LOAD. For example, using the Electrical Characteristics DC (5V) table, the typical output high voltage drops 3mV using a 2kΩ load (connected to / 2), which produces an I LOAD of: 5.0V 0.03V 2.5V =.244mA 2kΩ Because of output stage symmetry, the corresponding typical output low voltage (3mV) also equals V DROP. Then: 0.03V ROUT = 0.00244A =0. 5Ω Power Dissipation The MIC722 output drive capability requires considering power dissipation. If the load impedance is low, it is possible to damage the device by exceeding the 25 C junction temperature rating. On-chip power consists of two components: supply power and output stage power. Supply power (P S ) is the product of the supply voltage (V S = V V V ) and supply current (I S ). Output stage power (P O ) is the product of the output stage voltage drop (V DROP ) and the output (load) current (I OUT ). Total on-chip power dissipation is: P D = P S + P O P D = V S I S + V DROP I OUT where: P D = total on-chip power P S = supply power dissipation P O = output power dissipation V S = V V V I S = power supply current V DROP = V (sourcing current) V DROP = V V (sinking current) The above addresses only steady state (dc) conditions. For non-dc conditions the user must estimate power dissipation based on rms value of the signal. The task is one of determining the allowable on-chip power dissipation for operation at a given ambient temperature and power supply voltage. From this determination, one may calculate the maximum allowable power dissipation and, after subtracting P S, determine the maximum allowable load current, which in turn can be used to determine the miniumum load impedance that may safely be driven. The calculation is summarized below. TJ(max) TA PD(max) = θja θ JA(MSOP-8) = 200 C/W Driving Capacitive Loads Driving a capacitive load introduces phase-lag into the output signal, and this in turn reduces op-amp system phase margin. The application that is least forgiving of reduced phase margin is a unity gain amplifier. The MIC722 can typically drive a 200pF capacitive load connected directly to the output when configured as a unity-gain amplifier and powered with a 2.2V supply. At 5V operation the circuit typically drives 500pF. Using Large-Value Feedback Resistors A large-value feedback resistor (> 500kΩ) can reduce the phase margin of a system. This occurs when the feedback resistor acts in conjunction with input capacitance to create phase lag in the feedback signal. Input capacitance is usually a combination of input circuit components and other parasitic capacitance, such as amplifier input capacitance and stray printed circuit board capacitance. Figure 2 illustrates a method of compensating phase lag caused by using a large-value feedback resistor. Feedback capacitor C FB introduces sufficient phase lead to overcome the phase lag caused by feedback resistor R FB and input MIC722 6 June 2005
capacitance C IN. The value of C FB is determined by first estimating C IN and then applying the following formula: R IN C IN R FB C FB C FB 0V to 2 MIC722 0V to R FB = R IN Figure 4. Voltage Follower/Buffer C IN V S 0.5V to Q V CEO(sus) Figure 2. Cancelling Feedback Phase Lag Since a significant percentage of C IN may be caused by board layout, it is important to note that the correct value of C FB may change when changing from a breadboard to the final circuit layout. Typical Circuits Some single-supply, rail-to-rail applications for which the MIC722 is well suited are shown in the circuit diagrams of Figures 3 through 7. 0V to A V 2 MIC722 0V to 0V to 2V 2 MIC722 Change Q and R S for higher current and/or different gain. V IOUT = IN = RS Load I OUT Q 2N3904 R S 0Ω 2W 00mA/V as shown 0V to { V CEO = 40V I C(max) = 200mA Figure 5. Voltage-Controlled Current Sink C 0.00µF R4 00k 2 MIC722 R2 90k R 00k Figure 3a. Noninverting Amplifier R2 00k R4 00k R3 00k 0V 00 Figure 6. Square Wave Oscillator (V) A R2 V = + R 0 C IN R 33k R2 330k 2 MIC722 C OUT 0 0 V 00 IN (V) Figure 3b. Noninverting Amplifier Behavior R3 330k C µf R4 330k R L R2 330k A V = R = 33k = 0 0V Figure 7. AC-Coupled Inverting Amplifier June 2005 7 MIC722
Package Information 0.22 (3.0) 0.2 (2.84) 0.99 (5.05) 0.87 (4.74) DIMENSIONS: INCH (MM) 0.036 (0.90) 0.032 (0.8) 0.20 (3.05) 0.6 (2.95) 0.043 (.09) 0.038 (0.97) 0.02 (0.30) R 0.007 (0.8) 0.005 (0.3) 0.02 (0.03) 0.0256 (0.65) TYP 0.008 (0.20) 0.004 (0.0) 5 MAX 0 MIN MM8 8-Lead MSOP (MM) 0.02 (0.03) R 0.039 (0.99) 0.035 (0.89) 0.02 (0.53) MICREL INC. 280 FORTUNE DRIVE SAN JOSE, CA 953 USA TEL + (408) 944-0800 FAX + (408) 474-000 WEB http://www.micrel.com This information is believed to be accurate and reliable, however no responsibility is assumed by for its use nor for any infringement of patents or other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Inc. 2005 Incorporated MIC722 8 June 2005