To power supply 5V Imax = 2A. To TEC. TEC Controller LED CMPIN CIRP VDR CDRD. 470nF S2. 820nF. 680nF. 680nF. 470nF. 1uF.

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TECEV TEC CONTROLLER EVALUATION KIT TECEV (updated 6//4) Our TEC controller modules can be evaluated conveniently by using this evaluation kit TECEV which comes with an evaluation board, TECEVB and a TEC controller module of TEC -A (there is no internal compensation network in side). The main purpose of using the evaluation board is to tune the compensation network on the board for match ing the characteristics of users thermal load. The objectives of the tuning are to minimize the response time of the thermal control loop and the dynamic temperature tracking errors, while keeping the control loop stable.. Connection To A/D, D/A, and/or microprocessor To power supply Imax = A To TEC To Thermistor For For multimeter oscilloscope probing probing + Rth TEC Controller Temp. good Vlim Power On S On LED Off Off Rd CDRD V CIRP CLHT 4.uF.uF.uF.5uF S uf nf 4nF 6nF nf uf nf 6nF 4nF S nf nf nf 5nF nf G G Wi M Wd Wp W W 5K M 5K 5K W K Figure TEC Controller Evaluation Board TECEV 5 Walsh Ave. Santa Clara, CA 955. U. S. A. Tel.: (4) 4-9, Fax: (4) 4-9 www.analogtechnologies.com Copyright 999 4, Analog Technologies, Inc. All ghts Reserved. Updated: /5/4

TECEV Figure shows the layout of the evaluation board and Figure shows its photo. These are the procedures for the adjustment.. Set up basic connections. Connect a DC power supply and the TEC terminals in the right polarity as indicated onto the board. Connect the thermistor terminals to the board, there is no polarity requirement. Turn the two switches, for Vlim and Power, to the off Figure TECEV Photo positions (down side). Check the evaluation board connections, making sure that they are all correctly connected. Turn on the Power side switch and see how the Controller works.. Tune the compensation network. The purpose for this step is to match the controller compensation network with the thermal load characteristics thus that the response time and temperature tracking error are minimized. Adjust the potentiometer W to ch ange 5 Walsh Ave. Santa Clara, CA 955. U. S. A. Tel.: (4) 4-9, Fax: (4) 4-9 www.analogtechnologies.com Copyright 999, Analog Technologies, Inc. All ghts Reserved. Updated: /5/4

TECEV the set-point temperature just a small amount, simulating a step function. At the same time, connect an oscilloscope at the test pin (on the right side of the evaluation board), set it to a scrolling mode (. Second/Division or slower) and monitor the waveform of as is fed by a step function signal. The circuit in the compensati on network is shown in Figure below. Rd - + Cf Figure Compensation network The transfer function of the compensation network, defined as H(ω)=(ω)/(ω), is shown in figure 4. H(w ) Gd.Gd.4Gp Gp w w w w 4 Figure 4 Transfer Function of the Compensation Network In principle, these are the impacts of the components to the tuning results: a. / determines the gain for the proportional component of the feedback signal which is from the thermistor, Gp = /, in the control loop, the higher the gain, the smaller the short term error in the target temperature (which is of the cold side of the TEC) compared with the set -point temperature, but the higher the tendency of the loop s instability. b. /Rd determines the gain for the differential component, Gd = /(Rd//) /Rd, where symbol // stands for two resistor s in parallel, since >> Rd, Rd// = Rd. The higher the gain, the shorter the rise time of the response, the more the oversh oot and/or the undershoot will be. c. * determines the corner frequency, ω = /(*), where the integral component starts picking up, as the w frequency goes down. It determines the cut -off frequency be low which the TEC controller will start having a large open loop gain. The higher the open loop gain, the smaller the tracking error will be. d. * determines the corner frequency, ω =/(*), where the differential component starts picking up (see Figure 4), as the frequency goes up. e. *Rd determines the corner frequency, ω =/(*Rd), where the differential component starts getting flat. It determines the cut -off frequency above which the TEC controller will give extra weight or gain in response. f. Cf* determines the corner frequency, ω 4 =/(Cf*), where the differential component starts rolling down. Since this frequency is way higher than being needed for controlling the TEC, ω 4 does not need to be tuned. The capacitor is built into the TEC controller module, not the evaluation board. To start the tuning, turn off the differential circuit by setting Open. Turn W quickly by a small angle, back and forth, approximately 5 seconds per change. Set to uf, set to M, and increase the rati o of / as much as possible, provided the loop is stable, i.e. there are no oscillations seen in. Then, minimize as much as possible, provided the loop is stable. The next step is to minimize Rd and maximize while maintaining about % overshoot found in. Optimum result can be obtained after diligent and patient tuning. The tuning is fun and important. When the TEC controller is used for driving a TEC to stabilize the temperature of a diode laser, there is no need to turn on the laser diod e while tuning the TEC controller. To simulate the active thermal load given by the laser diode, setting the set -point temperature low er than the room temperature is enough. For a typical laser head used in EDFA s or laser transmitters (found in DWDM applications, for instance), = MΩ, = MΩ, = 6nF, =.5µF, and Rd = 5kΩ. These values may vary, depending on the characteristics of a particular thermal load. To be conservative in stability, use larger and larger ; To have quicker response, use smaller Rd and larger. The closer to the TEC the thermistor is mounted, the easier to have the loop stabilized, the shorter the rise time and the settling time of the response will be.. After tuning, the values of the capacitors for and can be read off the capacitor selection switches. The values of the resistors,, Rd and, can be measured by an Ohm -meter by connecting to the resistor pins. As seen in the photo of Figure, can be read off between and test points; Rd can be read off 5 Walsh Ave. Santa Clara, CA 955. U. S. A. Tel.: (4) 4-9, Fax: (4) 4-9 www.analogtechnologies.com Copyright 999, Analog Technologies, Inc. All ghts Reserved. Updated: /5/4

TECEV between and CDRD test points; can be read off between and CIRP test points. 4. After the compensation network is tuned properly, we can now adjust set -point temperature to see if the TEC controller can drive the target temperature to a certain range and with high stability. Turn the temperature set - point potentiometer W while monitoring its output voltage at test point (4th row on either left or right side of the board), watch the LED: when it turns to green, the target temperature is locked to the set -point temperature within. C or less. The relationship between the set -point voltage vs. the set -point temperature is given in the datasheet. After seeing the LED lock into the set -point temperature, should be a constant voltage as shown in the oscilloscop e and the voltage between and should be very small, less than mv. When a standard TEC controller is used, the mv represent a. temperature error. 5. Set output voltage limit. 6. To know more parameters of the TEC controller. a. To know the actual target temperature, use a voltage meter to measure the voltage between the TMP O and the pins, the reading result is: target temperature = 5 C + ( voltage (V))*6.6 C for approximation (see the curve in the TEC controller data sheet). b. To know how hard the TEC is working, measure the voltage by a voltage meter o r an ADC, TEC voltage =.. When the TEC voltage (from the calculation) is positive, it is in cooling mode; when the TEC voltage is negative, it is in heating mode. Cool/ Heat Balance CLHT can be adjusted by W. TEC maximum voltage can be reduced by reducing W, make sure Vlim switch is now turned to the on position. c. To try other values of capacitors not provided by the evaluation board for the capacitors in the compensation network, turn the capacitor switches you want to try to the top point, the position, connect the component to the corresponding soldering pads as marked on the evaluation board. d. To shut down the TEC controller, turn the Power switch to the Off position, see Figure. e. To control the set -point temperature directly by using a DAC, set the set -point temperature POT W to the middle point (5 C), on which the is about., the half value of the reference voltage, connect test point to the output of the DAC and use this formula for approximation when the input voltage is between V and V: set-point temperature ( C) = 5 C + (TMP O voltage (V))*6.6 C. The maximum voltage allowed is Vps (pow er supply). See the curve in the TEC controller data sheet. f. To control the TEC voltage directly by using a DAC, connect to the output of the DAC and use this formula: TEC voltage =. (V). g. To shut down the TEC controller by using a microprocessor, turn off the Power switch, connect test point (nd row from the bottom side, on both left and right columes.) to one of its digital outputs. When pulling low, the TEC controller is shut off. When pulling high, the TEC controller is turned on. h. The evaluation schematic is given in Figure 5. Using the TEC controller for more applications not described here, and/or having any questions, please free to contact us. 5 Walsh Ave. Santa Clara, CA 955. U. S. A. Tel.: (4) 4-9, Fax: (4) 4-9 www.analogtechnologies.com Copyright 999, Analog Technologies, Inc. All ghts Reserved. Updated: /5/4 4

TECEV V S RI ST9P CD 4nF CD 6nF CD4 nf 4 CD5 uf 5 6 U TEMPGD V TEMPSP 4 5 TECCRT 6 VTEC CMIN TEMP WI M CD nf CD6.5uF CD.uF CD.uF CD9 4.uF 9 RD Rd CD CI THM TECA VPS 6 P 5 P 4 EG OS G 9 WP M WD 5K THM CDRD P RP THM V W W 5K 5K R CI CI nf CI 5nF CI4 nf CI5 nf CI6 CI 6nF CI nf CI9 uf THM4 CIRP CHB nf 4 5 4nF 6 9 W K R K S ST9P THM5 S 4 N6-4 SPL SPL SPL4 SPL5 SPL6 SPL SPL9 LED SPL SML-LXSUGC R4 K THL SPR SPL THL THL THL4 THL6 THL THL THL9 V Q THM6 Left Side ght Side Top Side MMBT64 THM R K THM V THR THR THR4 THR5 THR6 THR THR THR9 CHB Bottom Side THM9 CLHT TT TT TT TT4 TT5 TT6 TT TT TT9 SPM SPM SPR TECEV- SPT4 THR SPR SPR4 SPR5 SPR6 SPR SPR SPR9 P SPT SPT V SPT SPT5 - SPT6 - () Figure 5 Evaluation Board Schematic 5 Walsh Ave. Santa Clara, CA 955. U. S. A. Tel.: (4) 4-9, Fax: (4) 4-9 www.analogtechnologies.com Copyright 999, Analog Technologies, Inc. All ghts Reserved. Updated: /5/4 5