Programmable Low-Jitter Precision LVDS Oscillator

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General Description The & series of high performance fieldprogrammable oscillators utilizes a proven silicon MEMS technology to provide excellent jitter and stability over a wide range of supply voltages and temperatures. Using the TIMEFLASH programmer, the end user can easily program the oscillators frequency in the field for immediate testing or use in advance prototype development or production. has a standby feature allowing it to completely powerdown when EN pin is pulled low; whereas for, only the outputs are disabled when EN is low. Both oscillators are available in industry standard packages, including the small 3.2x2. mm 2, and are dropin replacement for standard 6pin LVDS quartz oscillators. Block Diagram Features Low RMS Phase Jitter: <1 ps (typ) High Stability: ±10, ±2, ±0 ppm Wide Temperature Range o Industrial: 40 to 8 C o Ext. commercial: 20 to 70 C High Supply Noise Rejection: 0 dbc Wide Freq. Range: 10 to 460 MHz Small Industry Standard Footprints o 2.x2.0, 3.2x2.,.0x3.2, & 7.0x.0 mm Excellent Shock & Vibration Immunity o Qualified to MILSTD883 High Reliability o 20x better MTF than quartz oscillators Low Current Consumption Supply Range of 2.2 to 3.6 V Standby & Enable Function Lead Free & RoHS Compliant LVPECL & HCSL Versions Available Applications Enable Modes EN Pin High s Active s Active NC s Active s Active Low Standby s Disabled Storage Area Networks o SATA, SAS, Fibre Channel Passive Optical Networks o EPON, 10GEPON, GPON, 10GPON Ethernet o 1G, 10GBASET/KR/LR/SR, and FCoE HD/SD/SDI Video & Surveillance PCI Express: Gen 1 & Gen 2 DisplayPort Page 1

Absolute Maximum Ratings Item Min Max Unit Condition Supply Voltage 0.3 +4.0 V Input Voltage 0.3 V DD +0.3 V Junction Temp +10 C Storage Temp +10 C Soldering Temp +260 C 40sec max. ESD HBM MM CDM 4000 400 100 Note: 1000+ years of data retention on internal memory V Ordering Code Enable Modes 0: Enable/Standby 2: Enable/Disable DSC81 0 Package A: 7.0x.0mm B:.0x3.2mm C: 3.2x2.mm D: 2.x2.0mm 3 C I Temp Range E: 20 to 70 I: 40 to 8 Stability 1: ±0ppm 2: ±2ppm : ±10ppm Packing T: Tape & Reel : Tube T Specifications Parameter Condition Min. Typ. Max. Unit Supply Voltage 1 V DD 2.2 3.6 V Supply Current Frequency Stability I DD Notes: 1. Pin 6 VDD should be filtered with 0.1uf capacitor. 2. tsu is time to 100ppm of output frequency after VDD is applied and outputs are enabled. 3. Waveform and Test Circuit figures below define the parameters. 4. is enabled if pad is floated or not connected. Δf EN pin low outputs are disabled 20 Includes frequency variations due to initial tolerance, temp. and power supply voltage Aging Δf 1 year @2 C ± ppm Startup Time 2 t SU T=2 C ms Input Logic Levels Input logic high Input logic low V IH V IL 0.7xV DD 0.09 22 ±10 ±2 ±0 0.2xV DD Disable Time 3 t DA ns Enable Time t EN Enable PullUp Resistor 4 Pullup resistor exist 40 kω LVDS s Supply Current I DD Enabled, R L =0Ω 29 32 ma offset Voltage V OS R=100Ω Differential 1.12 1.4 V Delta Offset Voltage V OS 0 mv Pk to Pk Swing V PP SingleEnded 30 mv Transition time 3 Rise Time Fall Time t R t F 20% to 80% R L =0Ω, C L = 2pF 20 ma ppm V ms ns 200 ps Frequency f 0 Single Frequency 10 460 MHz Duty Cycle SYM Differential 48 2 % Period Jitter J PER 2. ps RMS Integrated Phase Noise J PH 200kHz to 20MHz @16.2MHz 100kHz to 20MHz @16.2MHz 12kHz to 20MHz @16.2MHz 0.28 0.4 1.7 2 ps RMS Page 2

Rejection (dbc) Phase Jitter (ps RMS) Nominal Performance Parameters (Unless specified otherwise: T=2 C, V DD =3.3 V) 0 10 20 30 40 0mV 100mV 2. 2.0 1. 16MHzLVDS 212MHzLVDS 320MHzLVDS 410MHzLVDS 0 1.0 60 70 0. 80 0.1 1 10 100 1000 10000 Supply Noise Frequency (khz) Power supply rejection ratio 0.0 0 200 400 600 800 1000 Lowend of integration BW: x khz to 20 MHz Phase jitter (integrated phase noise) Waveform t R t F 80% 0% 20% 830 30 mv mv 1/f o t EN t DA V IH Enable V IL Typical Termination Scheme V DD 0.1uF 6 2 3 4 100 Ω 100 Ω Page 3

Temperature ( C) Test Circuit Solder Reflow Profile 260 C 217 C 200 C 10 C 2 C 3C/Sec Max. 60180 Sec Pre heat 8 min max 3C/Sec Max. 2040 Sec 6010 Sec Reflow 6C/Sec Max. Cool Time MSL 1 @ 260 C refer to JSTD020C RampUp Rate (200 C to Peak Temp) 3 C/Sec Max. Preheat Time 10 C to 200 C 60180 Sec Time maintained above 217 C 6010 Sec Peak Temperature 2260 C Time within C of actual Peak 2040 Sec RampDown Rate 6 C/Sec Max. Time 2 C to Peak Temperature 8 min Max. Page 4

Package Dimensions 7.00 2.4 7.0 x.0 mm Plastic Package 1.40 4 4 6 1.10.00 3.70 1.80 2 3 3 2 1 2.80 0.8 No. 1 2 3 4 6 Pin terminal Enable nc GND VDD.0 x 3.2 mm Plastic Package Page

3.2 x 2. mm Plastic Package 2. x 2.0 mm Plastic Package 2.±0.0 [0.098±0.002] 0.82 [.032 ] 0.7±0.10 [0.028±0.004] 0.9 [.03] REF 0.1 [.004] REF 0.37 [0.01] 2.0±0.0 [0.079±0.002] 0.6±0.0 [0.026±0.002] 0.2±0.0 [0.099±0.002] 0.8 [0.033] 0.70 [0.028] 0.6 [0.026] 0.2 [0.0098] Disclaimer: Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this data sheet. This information is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right to change circuitry, specifications and descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Micrel s terms and conditions of sale for such products, Micrel assumes no liability whatsoever, and Micrel disclaims any express or implied warranty relating to the sale and/or use of Micrel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. MICREL, Inc. 2180 Fortune Drive, San Jose, California 9131 USA Phone: +1 (408) 9440800 Fax: +1 (408) 4741000 Email: hbwhelp@micrel.com www.micrel.com Page 6