Deigning Stable Digital Power Sulie Dr Ali Shiravar Biricha Digital Power Ltd Biricha Digital Power 0
Agenda Welcome and Introduction Introduction to digital ower Benefit of digital ower Digital ower challenge How can I hel with your DPS Deign Digital Power olution, develoment tool, board and oftware from I Suort from I on your deign including digital ower training though Biricha Digital Power Ste by te digital ower deign guideline Deigning our firt digital ower uly Converting analog controller into digital uing bilinear tranform Phae margin eroion and tability in your ower ulie Demontration of changing the loo' behaviour on the fly under digital control Quetion and Anwer Biricha Digital Power 0
he Need for Power Management Renewable Energy Generation elecom Digital Power AC Drive, Indutrial & Conumer Motor Control Automotive Radar & Electric Power Steering Power Management Power Line Communication Conumer & Automotive Digital Power Lighting Biricha Digital Power 0
Introduction to Digital Power In analog world: Advantage High bandwidth/reolution Low cot heory well defined and undertood Gate Driver Challenge Comonent drift/aging/tolerance Hardware baed - not flexible Limited to claical control theory only No intelligent control over erformance Number of ower tage/toologie i more limited Large BoM for comlex ytem Analog Controller (e.g.85) + comenation network + timing comonent Biricha Digital Power 0 4
Introduction to Digital Power In digital world: Advantage Inenitive to environment (tem, drift, ) S/W rogrammable / flexible olution (i.e. one deign for multile ulie) Advanced control oible (non-linear, multi-variable) Can erform multile loo and other function Could reduce real etate Failure rediction Biricha Digital Power 0 Challenge Bandwidth limitation (amling loo) PWM frequency and reolution limit Numerical roblem (quantiation) CPU erformance limitation Bia ulie, interface requirement heory not well undertood Current mode may be difficult More exenive? Gate Driver Digital Controller (e.g. F8x) + comenation algorithm + digital PWM ADC 5
raditional Analog Switch Mode PSU yically we tune the controller (alo known a the comenator) by electing the oition of ole and ero o a to achieve the deirable gain and hae margin Ref error + - Hc() (controller) V out PWM H() (lant) Vout hi i done through aroriate election of the comonent value Ref - + comenator + - O/P PWM Biricha Digital Power 0 6
yical Digital Digital PSU ADC and PWM are imlemented in the MCU H/W All we need to do i et u the PWM/ADC & rogram the -domain control algorithm into the chi here i a great deal of hel from I to allow you to do thi Software librarie Develoment board In-deth workho A Note/Deign guide Digital controller running on the MCU PWM ADC Power Elec. Biricha Digital Power 0 7
Samle Alication: Commercial LED Lighting AC Inut AC/DC converion (with PFC) DC/DC converion Current Control Current Control Current Control Biricha Digital Power 0 One MCU control both ower tage and LED lighting Intelligent current control Automatic oerating tate (uch a blown tring) detection and rotection emerature monitoring for thermal runaway revention Precie oerating voltage and current control for recie light intenity, color mix/tem control, and increaed efficiency Uniform latform for different LED tye or configuration Eay ytem networking One C000 MCU can control LED lighting and ower line communication ytem DALI and other lighting control tandard eaily added On chi eriheral (SPI, UAR, etc) imlify interfacing with other ytem 0
Samle Alication: Aliance AC Inut AC/DC converion (with PFC) Phae Motor Driver Sytem Communication Phae Motor Driver Biricha Digital Power 0 Single MCU olution, reduced ytem cot Piccolo control ower tage and motor driver On chi ocillator and VREG reduce external comonent Advanced motor control Voltage-Frequency or Field Oriented Control technique for three hae motor Piccolo ha the erformance to imlement enorle control Advanced -hae motor control oftware librarie and training material from I Digital Power Digitally controlled AC/DC converion tage with integrated PFC Eay ytem networking On chi eriheral (SPI, UAR, etc) imlify interfacing with other comonent in the ytem
Samle Alication: Architecture for hybrid vehicle AC Inut AC/DC converion (with PFC) 4 Volt Battery F80xx DC/DC converion Volt Battery Sytem Communication Motor Driver Biricha Digital Power 0 Single MCU olution, reduced ytem cot Piccolo control DC/DC converion, AC/DC converion, and communication Digital Power Fat, accurate and ohiticated control of current and voltage for fat battery rotection, long battery life, and fat charging Relacement of multile PWM and other IC by imlementing multile control loo with one controller, to reduce ytem comlexity and cot Imlementation of roer PFC and DC/DC converion control to achieve high efficiency Eay ytem networking Imlementation of additional ytem control function, uch a ytem monitoring and uerviion, with the ame controller, to reduce ytem comlexity and cot
Digital Power Challenge Deigning digital ower ulie require an undertanding of many engineering kill Analog ower uly deign Power uly tability criteria Continuou time control Embedded ytem rogramming Dicrete time control theory Mot engineer will have tudied thee ubject at univerity year ago, but will have ued only one or two of them in their job Biricha Digital Power 0
Frequently Aked Quetion by Engineer I am an analog engineer and have not rogrammed ince univerity Programming digital ower ulie ha a very ecific temlate/code tructure and thee are available through I. Furthermore there are numerou examle, alication note, develoment tool and in-deth training to tart you off on your firt DPS deign I am not confident with dicrete time control theory and digital control loo deign Although dicrete time control theory i a vat toic, only a very mall fraction of thi i needed for digital ower. hrough our in-deth training and free on-line tool we will teach you all you need to deign table digital control loo I am an embedded ytem rogrammer and know little about witch mode ower ulie hrough our training rogram and free oftware tool, we will hel learn the algorithm that are needed for table digital ower uly rogram Biricha Digital Power 0 4
How Doe I Hel Engineer in heir DPS Deign? Extenive ortfolio of MCU dedicated to digital ower Fixed oint/floating oint/dual core Dedicated eriheral Hi-reolution PWM and Fat ADC Extenive Hardware Develoment ool From imle Buck to PFC to Phae Shifted Full Bridge Extenive oftware librarie dedicated to digital ower I digital ower librarie Biricha Digital Chi Suort Library (CSL) In-deth raining Biricha Digital day hand-on digital ower deign workho Biricha Digital Power 0 5
exa Intrument MS0C000 M Family Digital ower, Indutrial, and motor control alication Dedicated eriheral & functionality ADC PWM/Hi-Re PWM Analog Comarator Fat ri Zone Fat interrut Fixed and floating oint Excellent dev tool and librarie Biricha Digital Power 0 6
I Piccolo Part Dedicated to Digital Power Significantly Lower Sytem Cot Single Suly.V only On-Chi Reet Lower Power Conumtion Minimal Suort Pin Small Package x On-Chi Ocillator Increaed CPU Performance Control Law Accelerator Enhanced PWM Caabilitie High reolution PWM eriod reonant converter Enhanced PWM triggering eak current mode Imroved Analog Ratio-metric ADC Imroved triggering Analog comarator Bit ADC Analog Com C8x Main Core Fixed & FPU CLA Com Port Multile PWM Multile ri Zone Multile HI-Re PWM Biricha Digital Power 0 7
Indutry' Mot Extenive et of Digital Power Hardware Develoment ool A multitude of DPS board are now available baed on a range of veratile control card Biricha Digital Power 0 8
Docking Station / rototyer Periheral Exlorer Multi-Rail/Phae DCDC controlcard PFC hil PFC BridgeLe Reonant LLC+ SR Biricha Digital Power 0 PSFB+SR + Peak Current Mode Control 9
Generic Low Cot Develoment Hardware Piccolo controlsick - $9 On board USB JAG emulation Small, USB tick form factor Acce to all control eriheral through header in Examle roject how how to ue Piccolo feature Ultra low-cot Deigned to be an evaluation tool to teach new uer about Piccolo and how to ue the eriheral uch a PWM, ADC, and etu a Piccolo roject Biricha Digital Power 0 Piccolo USB Exerimenter Kit - $79 On board USB JAG emulation No external emulator or ower uly needed Ha connection for external emulator and ower uly Come with Piccolo controlcard Acce to all Piccolo in Prototying Area Low cot Deigned to be a develoment tool for uer who want to tart develoing with Piccolo controlcard only - $49 And many many more. Pleae viit www.ti.com 0
Software Dev ool and Librarie Code Comoer Studio (CCS) Biricha Digital Power 0
Free Oen Source Librarie Provided by I Biricha Digital Power 0
Proriety API Dedicated to Digital Power Biricha Digital Chi Suort Library (CSL) Highly otimied code ake the ain out of rogramming Hardware Abtraction Layer to you from having to deal with regiter directly Aimed at digital ower uly deigner Analog engineer Programming made eay! Embedded ytem engineer Numerou function: Dedicated to digital ower Quick chi etu Quick ADC/PWM Digital ower control algorithm Biricha Digital Power 0
Examle : Dedicated Digital Voltage Mode Controller Function with the CSL #define K (.78) #define A (+.4688) #define A (-0.49) #define A (-0.548) #define B0 (.784405) #define B (-.690695) #define B (-.7809675) #define B (.678) CNRL_Init(&my_iccolo_,_IQ5(REF),_IQ6(A),_IQ6(A),_IQ6(A),_IQ6(B0),_IQ6(B),_IQ6(B),_IQ6(B),_IQ(K),MIN_DUY,MAX_DUY ); Biricha Digital Power 0 4
Examle : CSL Simlifie Creating a 00kH PWM EPwmReg.BCL.bit.SYNCOSEL = B_SYNC_IN; EPwmReg.BCL.bit.PHSEN = B_ENABLE; EPwmReg.BPHS.half.BPHS = 00; EPwmReg.BPRD = PWM_IMER_BPRD; EPwmReg.BCL.bit.CRMODE = B_COUN_UP; EPwmReg.ESEL.bit.INSEL = E_CR_ZERO; EPwmReg.ESEL.bit.INEN = PWM_IN_ENABLE; EPwmReg.EPS.bit.INPRD = E_S; PWM_config( PWM_MOD_, PWM_freqoick(00000), PWM_COUN_UP ); hi oftware bundle i free to all attendee of I Day Digital Power raining Workho We will talk about training next Biricha Digital Power 0 5
Digital Power Deign Workho Deigning digital ower ulie require an undertanding of many engineering kill Analog ower uly deign Power uly tability criteria Embedded ytem rogramming Continuou and dicrete time control theory Graing all of the above by a deign engineer i time conuming and exenive herefore I i roviding Engineer with in-deth training In order reduce your develoment time and learning curve I ha develoed am in-deth hand-on engineering workho Biricha Digital Power 0 6
Abridged Workho Syllabu Day : Introduction to Digital Power & Programming he C000 family develoment tool & feature Ue Biricha Digital librarie to run MCU code with minimal rogramming Programming the C000 for digital ower (Interrut, emlate, PWM etc) Day : Voltage Mode PSU Deign Ste by te deign of digital ower ulie Stable Analogue and digital ower uly Deign Dicrete time control theory, Z tranform & digital convolution Day : Digital Peak Current Mode Piccolo B and the CLA Analogue and Digital eak current mode control Running multile ower ulie Biricha Digital Power 0 7
Deigning Our Firt Digital Power Suly here i lenty of information on: I ortfolio of dedicated digital ower MCU Hardware develoment tool available Software librarie rovided to hel All we need i to learn how to deign digital ower uly During the day workho we aume no reviou knowledge and teach analogue and digital ower uly control loo deign in detail For thi hour eion there i little time o we tart with a re deigned analogue ower uly and concentrate on digital deign only Biricha Digital Power 0 8
Analog Comenator Deign A Short Review Analog PSU are (almot) alway deigned in the frequency domain We uerimoe a inuoid of a certain frequency (ay 0 H) on our PWM and we meaure how the gain and hae of thi inuoid i modified by the time it goe through our lant (i.e. PSU) We increae the frequency of our injected inuoid and meaure again, we reeat thi for all frequencie of interet (ay 0H to ½ F) and lot the Bode lot In hort we lot the oen loo gain and hae of the PSU (i.e. it Bode lot) and deign the comenator uch that we get aroriate gain and hae margin Biricha Digital Power 0 9
yical Voltage Mode Analog PSU yically we tune the comenator by electing the oition of ole and ero o a to achieve the deirable gain and hae margin Ref error + - Hc() (controller) PWM H() (lant) Vout o do thi we need the ranfer Function Hc() & H() and we can then lot the Bode lot and calculate the comonent value V out - Ref + comenator + - O/P PWM Biricha Digital Power 0 0
Bode Plot of the Buck Converter Ued in the Lab f r 67 LC H Double ole L uh ESR 0.0 C 440uF Gain (db) & Phae (degree) 00 PWM Gain =.58dB 0-00 f 668. er ESR C 5 ESR Zero H Biricha Digital Power 0 High frequency hae: ole and ero (-80 + 90 ) = -90-00 0H 00H.0KH 0KH Frequency (H) 00KH.0MH
Biricha Digital Power 0 ye III: ole & ero Ued for voltage mode buck ranfer function: Where: ye III Comenator ued to Stabilie our Buck Converter ) ( 0 c H 0 ; ; ; ; C R C C R C C C C R R R C C R
Analog Comenator Deign Examle ye III Controller (imle aroximate method) 00 Place two ero at F r i.e. @ 67H Place one ole at F er i.e. 668.5 H Place econd ole at F / i.e. 00 kh Place Pole at Origin at: f 0 V ram V F in x 0-00 -00 0H 00H.0KH 0KH 00KH.0MH Frequency (H) i.e. for a V ram of V, V in = and F x of 0kH f 0 = 8H Biricha Digital Power 0
Examle Our BDP-06 Buck Converter in Analog World Ref error + - Hc() (controller) PWM H() (lant) Vout L o V in V out + COMPARAOR D o C o - DRIVER CONROLLER C C R C R - R + REF Biricha Digital Power 0 4
Examle Our BDP-06 Buck Converter in Analog World Red (dotted) race Original ower tage without comenation Blue (olid) race Oen loo gain after comenation Uing the tranfer function and comonent value 80 our analog tye III 60 comenator ole and 40 ero are elected uch 0 that: Biricha Digital Power 0 Very high gain at DC, i.e. ole at origin Fx = 0kH a deired M 75 Sloe of gain lot at Fx = 0dB/decade G M better than 40dB hi ower uly i table All we need to do i to convert our Hc() from Analog (continuou time) to digital (dicrete time) Gain (db) Phae 0-0 -40-60 0-0 -40-60 -80-00 -0-40 -60-80 0 00 000 0000 00000 000000 0 00 000 0000 00000 000000 Frequency (H) 5
Converting our Analog Deign in to Digital Domain he deign of an analog PSU i carried out in continuou time A digital ower uly i a dicrete time ytem Ref error + - Hc[] (controller) PWM (ZOH) H() (lant) Vout ADC Recontructed ignal back in continuou time Vout ADC amling at F Vout he MCU will only ee Vout time Actual Vout in continuou time Biricha Digital Power 0 time Samling at F we end u with a dicrete number of amle i.e. dicrete time time he MCU will only have the value of Vout when we amled it and ha to wait until the next amle for an udate 6
Dicrete ime Samling Proce Recontructed ignal after the DAC (i.e. PWM) ha a time delay of 0.5 Samled number rereented between 0x0000 to 0x0FFF Vout Samle and Hold ime Samling Interval = (/ F) Biricha Digital Power 0 Now that we have converted our analog ignal into dicrete domain we need to be able to maniulate it 7
Rereenting Dicrete ime Signal Unit Ste: u[n] = 0, n < 0 u[n] =, n 0 Unit Imule [n] = 0, n 0 [n] =, n= 0 u[n] Scaling and delaying Digital unit te n Digital unit imule [n] n he digital ignal can be caled And it can be delayed in time Imortant: hi i how we rereent delay in the digital world Sie = Delayed by amling interval n [n - ] Biricha Digital Power 0 8
Digital PSU: Vref[n].V Our Inut n Ref Vref[n] Vout[n] Verror[n] n error + - Hc[] (controller) Magic box with a digital tranfer function that will take the error, maniulate it (e.g. uing a digital tye III controller) and outut a dicrete number between 0 and 00 rereenting 0% to 00% duty PWM (ZOH) H() (lant) ake 0 00 from reviou block and create a PWM between 0% and 00% duty Vout Analog Plant; i.e. the ower tage n = 0 Vout[0] n = Vout[] n = 6 Vout[6] Biricha Digital Power 0 Vout[n] n ADC Imortant: x axi now rereent amle number [n] meaning one amling interval Vout.V ± v time 9
Inide the Magic Box he digital controller/comenator take the amled error ignal and maniulate it Jut like an analog circuit, it can be decribed with a digital equivalent of a differential equation In digital world thi i called the linear difference equation We need the linear difference equation becaue it i the algorithm that the MCU need to run in order to maniulate/roce the error ignal Jut like an analog circuit it ha a tranfer function hi i called the tranfer function we will talk about thi later Biricha Digital Power 0 We need thi tranfer function o that we can convert our tried and teted analog tranfer function in the domain (e.g. ye III H() ) into the digital world 40
Digital Convolution: What haen inide the Magic Box Outut y[n] Ding! Dang! Dong! INPU x[n] red Blue Inide the magic box i the Linear Difference Equation or the Imule Reone Hc[n] Later we will convert to domain Hc[] @ t amling interval: outut (Blue x Ding) + (Red x 0) @ nd amling interval: outut (Blue x Dang) + (Red x Ding) @ rd amling interval: outut (Blue x Dong) + (Red x Dang) @ 4 th amling interval: outut ( Blue x 0 ) + (Red x Dong) Biricha Digital Power 0 4
Digital Convolution: What haen inide the Magic Box x[n] h[n] Convolve with h[n] n - n @ t amling interval: outut y[0] ( x ) + ( x 0) = 4 @ nd amling interval: outut y[] ( x -) + ( x ) = 0 @ rd amling interval: outut y[] ( x ) + ( x -) = @ 4 th amling interval: outut y[] ( x 0) + ( x ) = Biricha Digital Power 0 Inide the magic box Hc[n]; later we will convert to domain Hc[] 4
Inide the Magic Box Let aume that our inut x[n] i jut a unit imule Scaled by a factor of 8 n =0 x[n] = 8[n] 8 + 0.5 y[n-] Unit Delay y[n] Let evaluate: y[n] = x[n] + 0.5 y[n-] @ n=0: [0 ] y[0] = x[0] + (0.5 y[-]) y[0] = 8 + (0.5 0) y[0] = 8 @ n = : y[] = x[] + (0.5 y[0]) y[] = 0 + (0.5 8) y[] = 4 @ n = : y[] = x[] + (0.5 y[]) y[] = 0 + (0.5 4) y[] = @ n = : y[] = x[] + (0.5 y[]) y[] = 0 + (0.5 ) y[] = Biricha Digital Power 0 y[n] = x[n] + 0.5 y[n-] Linear difference equation: y[n-] mean the reviou value of outut y[n] or in other word it mean y[n] delayed by one amling interval Becaue the outut y[n] deend on the reviou value of itelf, thi i a recurive linear difference equation he outut in thi cae in an exonential decay and therefore the ytem i table 4
Converting Linear Difference Equation into ranfer Function A you can imagine a comuter excel at calculating the recurive linear difference equation on the reviou lide We can very eaily imlement any equation of tye: y[n] = x[n] + y[n-]. on our MCU uing C or aembly he roblem i that a linear difference equation doe not readily tranlate into an analog tranfer function We need a way of converting our analog controller' H() into a linear difference equation in order to calculate it uing our MCU e.g. We need to convert Hc() for our tye III controller into a linear difference equation H c ( ) R R R R C R C C C RCC R R C R C y[n] =..? Biricha Digital Power 0 44
ranform ranform allow analog tranfer function to be converted into the digital domain Similar to Lalace in the analog world, they make the job of maniulating tranfer function very eay Very convenient and comact Like the domain, we deal with ole and ero We define the oerator a a unit advance in time Z - Z - Advance in time by amling interval Biricha Digital Power 0 Unit delay (i.e. reviou value) i.e. delay by one amling interval e.g. y[n -] Unit delay (reviou value) e.g. y[n -] unit delay e.g. y[n -] 45
Linear Difference Equation to H[] Converion Conider the following linear difference equation: y[n] = 4 x[n] + x[n-] + y[n ] Subtituting for the coefficient of y[n] and x[n]: B 0 = 4, B = and A = Unit delay (reviou value) y[n] = B 0 x[n] + B x[n-] + A y[n ] ranforming onto domain: y[] = B 0 x[] + B x[] - + A y[] - Finally: H y[ ] x[ ] B A B0 Where: x[] i the inut; in our cae the error ignal And y[] i the outut of the controller; in our cae new value of duty Biricha Digital Power 0 46
ranfer Function H[] tranfer function allow u to analye the behavior of our digital ytem (jut like Lalace) here i a direct link between H() and H[] So we can eaily convert our analog controller in the domain to an equivalent digital controller in the domain Starting from a tranfer function H[] we can very eaily get back to the linear difference equation H y[ ] x[ ] B A B0 y[n] = B 0 x[n] + B x[n-] + A y[n ] We can then get our MCU to calculate the linear difference equation during every cycle Biricha Digital Power 0 47
Biricha Digital Power 0 48 H[] to Linear Difference Equation Converion Convert the following tranfer function to a linear difference equation: ] [ ] [ 0 A B B x y H y[n] = B 0 x[n] + B x[n-] + A y[n ] 0 ] [ ] [ B B x A y 0 ] [ ] [ ] [ ] [ y A x B x B y
Ste for Deigning a Digital PSU controller Ste : Deign table analog controller H() Ste : Convert analog deign into digital H[] Bilinear ranform (we will talk about thi hortly) Ste : Convert H[] to the Linear Difference Equation Ste 4: Get the MCU to calculate the Linear Difference Equation every cycle Biricha Digital Power 0 49
Converting an Analog ranfer function H() into it Digital Counterart H[] Bilinear ranform Alo know a utin and raeoidal It convert an analog tranfer function in domain into an equivalent digital tranfer function in domain It i not an exact converion: Biricha Digital Power 0 It i an aroximation he lower the cro over frequency with reect to your amling frequency the better the aroximation: For conervative deign Fx <= F / 0 If tarting with a table analog deign, it will alway have ole and ero in the table region; but hae margin could be a roblem due to digitiation delay we will talk about thi later Where = amling interval = /F All you need to do i to relace oerator in H() with: 50
Biricha Digital Power 0 5 Examle: - Derive H() Convert to H[] Convert to Linear Difference Equation R C H ) ( - + / C R R C H C R x y ] [ ] [ ] [ ] [ ] [ ] [ x x y RC y RC ] [ ] [ ] [ ] [ x x y RC y RC ] [ ] [ ] [ ] [ y x RC x RC y ] [ ] [ ] [ ] [ n y n x RC n x RC n y X and y delayed by amling interval
Biricha Digital Power 0 5 From reviou lide Alying bilinear tranform jut like our imle integrator examle we have a ole ero (PZ) digital controller: And now we know ALL the coefficient (leae ee next lide) Digital ye III Controller (PZ) * Where we elect the oition of the ole and ero a decribed in the reviou lide ) ( 0 c H y[n] = A y[n-] + A y[n-] + A y[n-] + B 0 x[n] + B x[n-] + B x[n-] + B x[n-] ] [ ] [ ] [ 0 A A A B B B B x y H Convert to linear difference equation
Biricha Digital Power 0 5 Digital ye III Controller (PZ) We have derived the following LDE and we now know ALL the coefficient Outut coefficient are: y[n] = A y[n-] + A y[n-] + A y[n-] + B 0 x[n] + B x[n-] + B x[n-] + B x[n-] A A A
Biricha Digital Power 0 54 Digital ye III Controller (PZ) Inut coefficient are: 0 0 B 0 4 B 0 4 B 0 B We now know everything to calculate our digital coefficient but thee rocedure are cumberome, o we have automated everything for you and laced it free on our webite
Automated Digital Control Loo Deign ool Biricha Digital Power 0 55
Automated Digital Control Loo Deign ool Biricha Digital Power 0 56
Automated Digital Control Loo Deign ool Correct coefficient for an equivalent digital ower uly are automatically calculated Biricha Digital Power 0 57
& Library Function We now have deigned a digital controller and calculated the coefficient, but we till need to rogram the MCU: We have written a comrehenive et of library function in order to make the rogramming eay and eed u your deign We call thi library the Chi Suort Library or the CSL he CSL uort almot ALL of the C000 erie including F8069 and the Delfino It ha over 500 function to eaily et u eriheral uch a PWM Interrut ADC etc Mot imortantly it ha dedicated and function which only need the coefficient from the reviou lide he CSL i not free but all the attendee of the Day workho will receive a full commercial licene a art of their coure fee Biricha Digital Power 0 58
Uing the CSL Library function Initialie the coefficient: Ax and Bx Coefficient from the webite REF i our inut to the controller a er reviou lide Deendent on our otential divider and the ADC range (.V for Piccolo,.0V for 808) K i our caling factor a er reviou lide #define A (+.4688) #define A (-0.49) #define A (-0.548) #define B0 (.784405) #define B (-.690695) #define B (-.7809675) #define B (.678) #define REF (_IQ5toF(5)) Biricha Digital Power 0 #define K (.7) 59
Uing & Library function Ste : Declare an intance of the controller: CNRL_Data Cntrl; Ste : In main() initialie the controller: CNRL_Init(&Cntrl,_IQ5(REF) /*Ref*/,_IQ6(A),_IQ6(A),_IQ6(A) /*a,a,a*/,_iq6(b0),_iq6(b),_iq6(b),_iq6(b) /*b0,b,b,b*/,_iq4(0.0),_iq4(0.9999) /* min, max duty */ ); Ste 4: In the ISR, inut the ADC value into the controller and equate the outut of the controller to PWM duty: Cntrl.Fdbk.m_Int = ADC_getValue( ADC_MOD_); CNRL_( &Cntrl ); PWM_etDutyA( PWM_MOD, Cntrl.Out.m_Int ); Biricha Digital Power 0 60
Deign Examle from the Day Workho BDP-06 Buck Converter Sec: Vin = V; Vout =.V; Iout = A L = µh; DCR = 47m C = 440µF; ESR = m F = 00kH; Fx = 0kH In analog world we ued a ye III controller with: F =.6764 kh F =.6764 kh F =.668 kh F = 00 kh F0 = 8 H Biricha Digital Power 0 6
Analying Your Converter in Frequency Domain Gain lot of the real ractical converter, running at 00kH 80 Fx = 0kH a deigned 60 Gain (db) 40 0 0 Gm > db (from next lot) -0-40 -60 0 00 000 0000 00000 000000 Frequency (H) Meaured gain lot of the actual digital PSU Simulated gain lot of the equivalent analog PSU Biricha Digital Power 0 6
Analying Your Converter in Frequency Domain Phae lot of real ractical converter Phae eroion at Fx in the digital PSU Analog m 75 Digital m 45 Digital Phae deteriorate raidly a we aroach witching frequency 0-50 -00 Stuttgart Phae (deg) -50-00 -50-00 -50-400 0 00 000 0000 00000 000000 Frequency (H) Meaured hae lot of the actual digital PSU Simulated hae lot of the equivalent analog PSU Biricha Digital Power 0 6
Analying Your Converter in Frequency Domain Meaurement etu with a network analyer Vin V out to CH PWM from C000 Injection reitor 4Ω Injection tranformer Network Analyer outut (frequency wee) o ADC 0Ω to CH 0Ω Biricha Digital Power 0 64
Analying Your Converter in Frequency Domain Meaurement etu Injection tranformer Biricha Digital Power 0 65
Phae Margin Eroion in Digital World (Voltage Mode Only) From reviou lot our digital PSU ha a G M of better than db M of better than 40 hi i a very good ower uly but we deigned our analog uly to have a hae margin of 75 We deigned for 75 degree on uroe! he digitiation roce ha introduced an extra hae lag of about 0 degree! hi i an inherent characteritic of the amling roce We mut calculate thi hae lag and allow for it in our analog deign We have included extra lide about thi toic at the end of thi reentation Biricha Digital Power 0 66
Phae Margin Eroion in Digital World here are two mechanim that introduce hae lag in to our digital ower uly: he amling and recontruction roce he time taken from the time we amled our voltage to the time we carried out our calculation i.e. ime delay, d Recontructed ignal after the DAC (i.e. PWM). hi ha a time delay of 0.5. Vout Biricha Digital Power 0 Samling interval = (/ F) ime 67
Phae Margin Eroion in Digital World For a ure ine wave, hae delay at a certain frequency f i given by: 60 f ime Delay he amling roce and recontruction introduce a time delay of 0.5x. herefore the hae margin eroion at Fx: amling 60 Fx In our cae: (60 x 0kH x 5 /) = 9 Phae margin eroion at Fx due to calculation delay: calculation 60 F k x In our cae: (60 x 0kH x 5 x = 8 Where: k = in the number of amling interval (need not be an integer). Wort cae cenario: we do the calculation at the beginning of the firt amling interval and udate in the next; therefore k = Biricha Digital Power 0 otal hae delay = 7. We deigned our analog controller with a large hae margin of 75 o that our digital controller would have a erfect hae margin of 48 68
Final Remark Forthcoming day workho: t rd of Nov 0 Coenhagen, Denmark nd -4 th of Nov 0 Stuttgart, Germany Free of charge digital controller coefficient calculator on: www.biricha.com/reource Chi Suort Library Free limited evaluation verion on www.biricha.com/reource Commercial licene included in the rice of the day workho Workho rice i 795 Euro but all attendee of thi eminar receive a 0% dicount i.e. 65 Euro More info on: www.ti.com/biricha Biricha Digital Power 0 69
Concluion Digital ower i gaining momentum and will be a ignificant layer in the future of ower management In many alication digital ower ha advantage over analog Deigning digital ower need not be difficult; I rovide: Dedicated MCU Excellent develoment tool Beoke, in-deth training and uort I would like to be artner in your digital ower alication Biricha Digital Power 0 70
END of Seminar hank you for taking art Biricha Digital Power 0 7