N5L0, N5L, NL0, NL YNHONOU -IT UP/OWN EE N INY OUNTE ingle own/up ount ontrol Line Look-head ircuitry Enhances peed of ascaded ounters Fully ynchronous in ount Modes synchronously Presettable With Load ontrol Package Optio Include Plastic mall Outline Packages, eramic hip arriers, and tandard Plastic and eramic 00-mil IPs ependable Texas Itruments Quality and eliability description The L0 and L are synchronous, reversible up/down counters. The LL0 is a -bit decade counter and the L is a -bit binary counter. ynchronous counting operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincident with each other when so itructed by the steering logic. This mode of operation eliminates the output counting spikes normally associated with asynchronous (ripple clock) counters. The outputs of the four flip-flops are triggered on a low-to-high-level traition of the clock input if the enable input is low. high at inhibits counting. The direction of the count is determined by the level of the down/up input. When is low, the counter counts up and when is high, it counts down. 0, EEME EVIE MY N5L0, N5L...J PKGE NL0, NL... O N PKGE (TOP VIEW) Q Q Q Q GN These counters feature a fully independent clock circuit. hanges at the control inputs ( and ) that will modify the operating mode have no effect on the contents of the counter until clocking occurs. The function of the counter will be dictated solely by the condition meeting the stable setup and hold times. These counters are fully programmable; that is, the outputs may each be preset to either level by placing a low on the load input and entering the desired data at the data inputs. The output will change to agree with the data inputs independently of the level of the clock input. This feature allows the counters to be used as modulo-n dividers by simply modifying the count length with the preset inputs. The,, and LO inputs are buffered to lower the drive requirement, which significantly reduces the loading on, or current required by, clock drivers, etc., for long parallel words. Two outputs have been made available to perform the cascading function: ripple clock and maximum/minimum count. The latter output produces a high-level output pulse with a duration approximately equal to one complete cycle of the clock while the count is zero (all outputs low) counting down or maximum ( or 5) counting up. The ripple clock output produces a low-level output pulse under those same conditio but only while the clock input is low. The counters can be easily cascaded by feeding the ripple clock output to the enable input of the succeeding counter if parallel clocking is used, or to the clock input if parallel enabling is used. The maximum/minimum count output can be used to accomplish look-ahead for high-speed operation. The N5L0 and N5L are characterized for operation over the full military temperature range of 55 to 5. The NL0 and NL are characterized for operation from 0 to 0. 5 5 0 0 5 5 0 V LO N5L0, N5L... FK PKGE (TOP VIEW) Q N Q Q N Q GN N V N No internal connection N LO POUTION T information is current as of publication date. Products conform to specificatio per the terms of Texas Itruments standard warranty. Production processing does not necessarily include testing of all parameters. opyright, Texas Itruments Incorporated 5I POT OFFIE OX 550 LL, TEX 55
N5L0, N5L0 YNHONOU -IT UP/OWN EE OUNTE 0, EEME EVIE MY L0 logic symbol 5 LO 5 0 TIV0 G M (OWN) (T=0)Z M (UP) (T=)Z, /,+ G,, 5,5 [] [] [] [] Q Q Q L0 logic diagram (positive logic) LO 5 5 Q Q 0 Q This symbol is in accordance with NI/IEEE td - and IE Publication -. Pin numbers shown are for, J, and N packages. POT OFFIE OX 550 LL, TEX 55
N5L, N5L YNHONOU -IT UP/OWN EE OUNTE 0, EEME EVIE MY L logic symbol 5 LO 5 0 TIV0 G M (OWN) (T=0)Z M (UP) (T=)Z, /,+ G,, 5 5 [] [] [] [] Q Q Q L logic diagram (positive logic) LO 5 5 Q Q 0 Q This symbol is in accordance with NI/IEEE td - and IE Publication -. Pin numbers shown are for, J, and N packages. POT OFFIE OX 550 LL, TEX 55
N5L0, N5L0 YNHONOU -IT UP/OWN EE OUNTE 0, EEME EVIE MY typical load, count, and inhibit sequences L0 Illustrated below is the following sequence:. Load (preset) to seven. ount up to eight, nine (maximum), zero, one, and two. Inhibit. ount down to one, zero (minimum), nine, eight, and seven LO ata Inputs LOK Q Q Q 0 0 ount Up Inhibit ount own Load POT OFFIE OX 550 LL, TEX 55
N5L, N5L YNHONOU -IT UP/OWN EE OUNTE typical load, count, and inhibit sequences L Illustrated below is the following sequence:. Load (preset) to seven. ount up to eight, nine (maximum), zero, one, and two. Inhibit. ount down to one, zero (minimum), nine, eight, and seven 0, EEME EVIE MY LO ata Inputs LOK Q Q Q 0 0 ount Up Inhibit ount own Load POT OFFIE OX 550 LL, TEX 55 5
N5L0, N5L, NL0, NL YNHONOU -IT UP/OWN EE OUNTE 0, EEME EVIE MY absolute maximum ratings over operating free-air temperature range (unless otherwise noted) L0 0 0 0 5 fclock lock frequency MHz L 0 0 0 0 0 5 0 high or low tw Pulse duration 0.5 before 5 0 tsu etup time before 5 0 VOL upply voltage, V........................................................................ V Input voltage............................................................................... V Operating free-air temperature range: N5L0, N5L................... 55 to 5 NL0, NL....................... 0 to 0 torage temperature range....................................................... 5 to 50 recommended operating conditio N5L0 N5L NL0 NL UNIT MIN NOM MX MIN NOM MX V upply voltage.5 5 5.5.5 5 5.5 V VIH High-level input voltage V VIL Low-level input voltage 0. 0. V IOH High-level output current 0. 0. m IOL Low-level output current m LO low 5 0 ata before LO 5 0 LO inactive before 0 0 ata after LO 5 5 tsu Hold time after 0 0 after 0 0 T Operating free-air temperature 55 5 0 0 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PMETE TET ONITION N5L0 N5L NL0 NL MIN TYP MX MIN TYP MX VIK V =.5 V, II = m.5.5 V VOH V =.5 V to 5.5 V, IOH = 0. m V V V V =.5 V, IOL = m 0.5 0.5 0.5 0. V =.5 V, IOL = m 0.5 0.5 II V = 5.5 V, VI = V 0. 0. m IIH V = 5.5 V, VI =. V 0 0 µ O 0. 0. IIL V = 5.5 V, VI = 0. V m ll others 0. 0. IO V = 5.5 V, VO =.5 V 0 0 m I V = 5.5 V, ll inputs at 0 V m ll typical values are at V = 5 V, T = 5. The output conditio have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IO. UNIT V POT OFFIE OX 550 LL, TEX 55
N5L0, N5L, NL0, NL YNHONOU -IT UP/OWN EE OUNTE switching characteristics (see Note ) 0, EEME EVIE MY V =.5 V to 5.5 V, L = 50 pf, PMETE FOM (INPUT) TO (OUTPUT) L = 500 Ω, T = MIN to MX UNIT N5L0 NL0 N5L NL MIN MX MIN MX fmax L0 0 5 L 0 0 MHz tplh 0 LO ny Q tphl 0 tplh 5,,, ny Q tphl 5 5 tplh 5 5 0 tphl 5 5 5 0 tplh ny Q tphl tplh tphl tplh 5 5 tphl 0 0 tplh 5 5 tphl 0 5 tplh tphl NOTE : Load circuit and voltage waveforms are shown in ection. POT OFFIE OX 550 LL, TEX 55
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