MPSA Amplifier Transistor NPN Silicon Features Pb Free Package is Available* MAXIMUM RATINGS Rating Symbol Value Unit Collector Emitter Voltage V CEO 4 Vdc Collector Base Voltage V CBO 4. Vdc Collector Current Continuous I C madc Total Device Dissipation @ Derate above 25 C P D 625 mw mw/ C 2 BASE COLLECTOR 3 1 EMITTER Total Device Dissipation @ T C = 25 C Derate above 25 C P D 1.5 12 W mw/ C Operating and Storage Junction Temperature Range THERMAL CHARACTERISTICS T J, T stg 55 to +1 C Characteristic Symbol Max Unit Thermal Resistance, Junction to Ambient (Note 1) R JA C/W Thermal Resistance, Junction to Case R JC 83.3 C/W Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. R JA is measured with the device soldered into a typical printed circuit board. 1 2 3 TO 92 CASE 29 11 STYLE 1 MARKING DIAGRAM MPS A AYWW MPSA = Device Code A = Assembly Location Y = Year WW = Work Week = Pb Free Package (Note: Microdot may be in either location) ORDERING INFORMATION Device Package Shipping MPSA TO 92 5, Units / Box MPSAG TO 92 5, Units / Box (Pb Free) *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. Semiconductor Components Industries, LLC, 6 January, 6 Rev. 3 1 Publication Order Number: MPSA/D
MPSA ELECTRICAL CHARACTERISTICS ( unless otherwise noted) Characteristic Symbol Min Max Unit OFF CHARACTERISTICS Collector Emitter Breakdown Voltage (Note 2) (I C = madc, I B = ) V (BR)CEO 4 Vdc Emitter Base Breakdown Voltage (I E = Adc, I C = ) Collector Cutoff Current (V CB = 3 Vdc, I E = ) ON CHARACTERISTICS DC Current Gain (Note 2) (I C = madc, V CE = Vdc) Collector Emitter Saturation Voltage (I C = madc, I B = madc) SMALL SIGNAL CHARACTERISTICS Current Gain Bandwidth Product (Note 2) (I C = madc, V CE = Vdc, f = MHz) Output Capacitance (V CB = Vdc, I E =, f = MHz) 2. Pulse Test: Pulse Width 3 s, Duty Cycle 2.%. V (BR)EBO 4. Vdc I CBO nadc h FE 4 4 V CE(sat) 5 Vdc f T 125 MHz C obo 4. pf EQUIVALENT SWITCHING TIME TEST CIRCUITS 3 ns DUTY CYCLE = 2%.5 V < ns +.9 V k + 3. V 275 C S < 4. pf* < t 1 < s DUTY CYCLE = 2% 9.1 V t 1 +.9 V < ns k 1N916 + 3. V 275 C S < 4. pf* *Total shunt capacitance of test jig and connectors Figure 1. Turn On Time Figure 2. Turn Off Time 2
MPSA NOISE FIGURE CONTOURS (V CE = Vdc, ) e n, NOISE VOLTAGE (nv) 7. 3. I C = ma A 3 A A 3 A 2. 1 k 2 k 5 k k f, FREQUENCY (Hz) Figure 3. Noise Voltage BANDWIDTH = Hz R S = I n, NOISE CURRENT (pa) 2. I C = ma 3 A.5 3 A A.1 1 k 2 k 5 k k f, FREQUENCY (Hz) Figure 4. Noise Current BANDWIDTH = Hz R S A R S, SOURCE RESISTANCE (OHMS) k k k k k k 5 k 2 k 1 k 2. db 3. db 4. db 6. db I C, COLLECTOR CURRENT ( A) BANDWIDTH = Hz db R S, SOURCE RESISTANCE (OHMS) 1 M k k k k k k 5 k 2 k 1 k 8. db 3 7 3 7 1 k 3 7 3 7 1 k db I C, COLLECTOR CURRENT ( A) BANDWIDTH = Hz 2. db 3. db db Figure 5. Narrow Band, Hz Figure 6. Narrow Band, khz R S, SOURCE RESISTANCE (OHMS) k k k k k k 5 k 2 k 1 k Hz to 15.7 khz db 2. db 3. db db 8. db 3 7 3 7 1 k I C, COLLECTOR CURRENT ( A) Figure 7. Wideband Noise Figure is defined as: NF log e n 2 4KTRS In 2 RS 2 1 2 4KTRS e n = Noise Voltage of the Transistor referred to the input. (Figure 3) I n = Noise Current of the Transistor referred to the input. (Figure 4) K = Boltzman s Constant (1.38 x 23 j/ K) T = Temperature of the Source Resistance ( K) R S = Source Resistance (Ohms) 3
MPSA TYPICAL STATIC CHARACTERISTICS 4 T J = 125 C h FE, DC CURRENT GAIN 8 6 4.4 25 C 55 C MPSA V CE = V V CE = V.6.1.2.3.5.7.1.3.5.7 2. 3. 7. 3 7 Figure 8. DC Current Gain V CE, COLLECTOR EMITTER VOLTAGE (VOLTS).8.6.4.2.5.1.2.5.1.5 2. 15 25 3 35 4 I B, BASE CURRENT (ma) MPSA I C = ma ma ma ma 8 6 4 PULSE WIDTH = 3 s DUTY CYCLE 2.% I B = A 4 A 3 A A A V CE, COLLECTOR EMITTER VOLTAGE (VOLTS) Figure 9. Collector Saturation Region Figure. Collector Characteristics V, VOLTAGE (VOLTS) 1.4 1.2.8 V BE(sat) @ I C /I B =, TEMPERATURE COEFFICIENTS (mv/ C).6 V BE(on) @ V CE = V.8.4 25 C to 125 C 1.6 VB for V BE 55 C to 25 C V CE(sat) @ I C /I B = 2.4.1.5 2..1.5 2. V θ 1.6.8 *APPLIES for I C /I B h FE /2 * VC for V CE(sat) 25 C to 125 C 55 C to 25 C Figure 11. On Voltages Figure 12. Temperature Coefficients 4
MPSA TYPICAL DYNAMIC CHARACTERISTICS t, TIME (ns) 3 7 3 7. 3. t d @ V BE(off) =.5 Vdc 2. 3. 7. 3 7 Figure 13. Turn On Time t r V CC = 3. V I C /I B = t, TIME (ns) 7 3 t s t f 7 3 V CC = 3. V I C /I B = I B1 = I B2 2. 3. 7. 3 7 Figure 14. Turn Off Time f, T CURRENT GAIN BANDWIDTH PRODUCT (MHz) 3 7 f = MHz V CE = V V.5.7 2. 3. 7. 3 C, CAPACITANCE (pf) 7. 3. 2..5 C ib C ob.1.5 2. V R, REVERSE VOLTAGE (VOLTS) f = MHz Figure 15. Current Gain Bandwidth Product Figure 16. Capacitance h ie, INPUT IMPEDANCE (k Ω ) 7. 3. 2..7.5.3 MPSA h fe @ I C = ma V CE = Vdc f = khz.1.5 2. h oe, OUTPUT ADMITTANCE ( mhos) 7 3 7. 3. V CE = Vdc f = khz MPSA h fe @ I C = ma 2..1.5 2. Figure 17. Input Impedance Figure 18. Output Admittance 5
MPSA r(t) TRANSIENT THERMAL RESISTANCE (NORMALIZED).7.5.3.1.7.5.3.2.1.1 D =.5.1.1.5.2 SINGLE PULSE.2.5.1.5 2. k 2. k k k k k k t, TIME (ms) P (pk) FIGURE t 1 t2 DUTY CYCLE, D = t 1 /t 2 D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t 1 (SEE AN 569) Z JA(t) = r(t) R JA T J(pk) T A = P (pk) Z JA(t) Figure 19. Thermal Response I C, COLLECTOR CURRENT (na) 4 3 2 1 1 2 4 V CC = 3 Vdc 2 I CEO + + 4 + 6 + 8 + + 1 + 14 + 16 T J, JUNCTION TEMPERATURE ( C) Figure 21. I CBO AND I CEX @ V BE(off) = 3. Vdc DESIGN NOTE: USE OF THERMAL RESPONSE DATA A train of periodical power pulses can be represented by the model as shown in Figure. Using the model and the device thermal response the normalized effective transient thermal resistance of Figure 19 was calculated for various duty cycles. To find Z JA(t), multiply the value obtained from Figure 19 by the steady state value R JA. Example: Dissipating 2. watts peak under the following conditions: t 1 = ms, t 2 = ms. (D = ) Using Figure 19 at a pulse width of ms and D =, the reading of r(t) is 2. The peak rise in junction temperature is therefore T = r(t) x P (pk) x R JA = 2 x 2. x = 88 C. For more information, see ON Semiconductor Application Note AN569/D, available on our website at www.onsemi.com. 4 6 4 6. 4. 2. T J = 1 C s ms s T C = 25 C s dc dc CURRENT LIMIT THERMAL LIMIT SECOND BREAKDOWN LIMIT 4. 6. 8. 4 V CE, COLLECTOR EMITTER VOLTAGE (VOLTS) Figure 22. The safe operating area curves indicate I C V CE limits of the transistor that must be observed for reliable operation. Collector load lines for specific circuits must fall below the limits indicated by the applicable curve. The data of Figure 22 is based upon T J(pk) = 1 C; T C or T A is variable depending upon conditions. Pulse curves are valid for duty cycles to % provided T J(pk) 1 C. T J(pk) may be calculated from the data in Figure 19. At high case or ambient temperatures, thermal limitations will reduce the power that can be handled to values less than the limitations imposed by second breakdown. 6
MPSA PACKAGE DIMENSIONS TO 92 (TO 226) CASE 29 11 ISSUE AL NOTES: A B 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. CONTOUR OF PACKAGE BEYOND DIMENSION R R IS UNCONTROLLED. P 4. LEAD DIMENSION IS UNCONTROLLED IN P AND BEYOND DIMENSION K MINIMUM. L INCHES MILLIMETERS SEATING PLANE K DIM MIN MAX MIN MAX A.175.5 4.45 5. B.17 4.32 5.33 C.125.165 3.18 4.19 D.16.21.47.533 X X D G.45.55 1.15 1.39 H.95.5 2.42 2.66 G J.15..39. H J K. 12.7 L 6.35 V C N.8.5 2.4 2.66 P. 2.54 SECTION X X R.115 2.93 1 N V.135 3.43 STYLE 1: N PIN 1. EMITTER 2. BASE 3. COLLECTOR ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 61312, Phoenix, Arizona 882 1312 USA Phone: 48 829 77 or 8 344 386 Toll Free USA/Canada Fax: 48 829 779 or 8 344 3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 8 282 9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2 9 1 Kamimeguro, Meguro ku, Tokyo, Japan 153 51 Phone: 81 3 5773 38 7 ON Semiconductor Website: Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. MPSA/D