One-Time Programmable, Linear-Taper Digital Potentiometers

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19-3665; Rev 1; 7/9 EVAUATION KIT AVAIABE One-Time Programmable, inear-taper Digital General Description The linear-taper digital potentiometers perform the same function as mechanical potentiometers, replacing the mechanics with a simple 2-wire up/down digital interface. These digital potentiometers provide an optional one-time programmable feature that sets the power-on reset position of the wiper. Once the wiper position is programmed, the 2-wire interface can be disabled to prevent unwanted adjustment. The provide an end-to-end resistance of 1kΩ, 5kΩ, and 1kΩ, respectively. The devices feature low temperature coefficients of 35ppm/ C end-to-end and 5ppm/ C ratiometric. All devices offer 64 wiper positions and operate from a single +2.7V to +5.5V supply. An ultra-low,.25µa (typ) standby supply current saves power in battery-operated applications. The are available in 3mm x 3mm, 8-pin TDFN and 5mm x 3mm, 8-pin µmax packages. Each device is guaranteed over the -4 C to +15 C temperature range. Applications Products Using One-Time Factory Calibration Mechanical Potentiometer Replacements TOP VIE 2 Pin Configurations 1 8 7 Features iper Position Stored After One-Time Fuse Programming 64 Tap Positions iper Position Programmed Through Simple 2-ire Up/Down Interface 35ppm/ C End-to-End Temperature Coefficient 5ppm/ C Ratiometric Temperature Coefficient Ultra-ow 1.5µA (max) Static Supply Current +2.7V to +5.5V Single-Supply Operation 1kΩ, 5kΩ, and 1kΩ End-to-End Resistances Tiny, 3mm x 3mm, 8-Pin TDFN and 5mm x 3mm, 8-Pin µmax Packages Ordering Information PART PIN-PACKAGE RESISTANCE (kω) TOP MARK GTA+ 8 TDFN-EP* 1 AOG GUA+ 8 µmax 1 GTA+ 8 TDFN-EP* 5 AO GUA+ 8 µmax 5 GTA+ 8 TDFN-EP* 1 AOI GUA+ 8 µmax 1 +Denotes a lead(pb)-free/ros-compliant package. *EP = Exposed pad. Note: All devices are specified over the -4 C to +15 C operating temperature range. 3 4 µmax 6 5 PV PV 8 7 6 5 Functional Diagram S 63 R 62 S 62 PV UP/DON COUNTER ONE-TIME PROGRAM BOCK 64- POSITION DECODER R 61 R 1 S 61 R S 2 S 1 1 2 3 4 R VDD TDFN* *EXPOSED PADDE. CONNECT TO. µmax is a registered trademark of Maxim Integrated Products, Inc. Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim s website at www.maxim-ic.com. S

ABSOUTE MAXIMUM RATINGS to...-.3v to +6.V PV to...-.3v to +12.V All Other Pins to...-.3v to ( +.3V) Maximum Continuous Current into,, and...±.5ma...±1.ma...±2.ma Continuous Power Dissipation (T A = +7 C) 8-Pin µmax (derate 4.5m/ C above +7 C)...362m 8-Pin TDFN (derate 18.2m/ C above +7 C)...1454.5m Operating Temperature Range...-4 C to +15 C Junction Temperature...+15 C Storage Temperature Range...-65 C to +15 C ead Temperature (soldering, 1s)...+3 C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. EECTRICA CARACTERISTI ( = +2.7V to +5.5V, V =, V =, T A = -4 C to +15 C, unless otherwise noted. Typical values are at = +5.V, T A = +25 C.) (Note 1) PARAMETER SYMBO CONDITIONS MIN TYP MAX UNITS DC PERFORMANCE Resolution 64 Taps End-to-End Resistance End-to-End Resistance Temperature Coefficent 75 1 125 37.5 5 62.5 7.5 1 12.5 TC R 35 ppm/ C Resistance Ratio Temperature / 5 Coefficient 1 kω ppm/ C Integral Nonlinearity IN Potentiometer configuration, no load, Figure 1 ±.25 ±1 SB Differential Nonlinearity DN Potentiometer configuration, no load, Figure 1 ±.1 ±1 SB Full-Scale Error Potentiometer configuration, no load, Figure 1 -.5-1 SB Zero-Scale Error Potentiometer configuration, no load, Figure 1 +.6 +1 SB 3V 9 2 iper Resistance (Note 2) R < 3V 125 65 Ω DYNAMIC CARACTERISTI iper -3dB Bandwidth (Note 3) Total armonic Distortion 1 2 1 f = 1kz, midscale, 1V RMS R = 1kΩ -78-82 -94 kz db 2

EECTRICA CARACTERISTI (continued) ( = +2.7V to +5.5V, V =, V =, T A = -4 C to +15 C, unless otherwise noted. Typical values are at = +5.V, T A = +25 C.) (Note 1) PARAMETER SYMBO CONDITIONS MIN TYP MAX UNITS DIGITA INPUTS (, ) Input igh Voltage V I.7 x.3 x Input ow Voltage V I V Input Current I IN ±.1 ±1 µa Input Capacitance C IN 5 pf TIMING CARACTERISTI (Note 4) Mode to Setup Time t CU Figures 2 and 3 5 ns Mode to old Time t CI Figures 2 and 3 5 ns to Step old Time t IC Figures 2 and 3 ns Step ow Time t I Figures 2 and 3 1 ns Step igh Time t I Figures 2 and 3 1 ns iper Settling Time t I C = pf, Figures 2 and 3 (Note 5) 4 ns PV Rising Edge to Falling Edge Falling Edge to PV Falling Edge t PC Figure 5 1 ms t CP Figure 5 5 ms Step ow Time t C Figure 5 5 ms Step igh Time t C Figure 5 5 ms PV Falling Edge to Rising Edge t P Figure 5 1 ms Frequency f MAX 5 Mz Power-Up Time t UP (Note 6) 1 ms POER SUPPY Supply Voltage 2.7 5.5 V Static Supply Current I DD = = or 1.5 µa Programming Voltage PV T A < +5 C 1.45 11.55 T A +5 C 11. 11.55 Programming Current I PV V PV = 11V 4 5 ma V V Note 1: All devices are production tested at T A = +25 C, and are guaranteed by design for T A = -4 C to +15 C. Note 2: The wiper resistance is measured by driving the wiper terminal with a source of 2µA for the, 4µA for the, and 2µA for the. Note 3: iper at midscale with a 1pF load. Note 4: Digital timing is guaranteed by design, not production tested. Note 5: iper setting time is measured for a single step from transition until wiper voltage reaches 9% of final value. Note 6: Power-up time is the period of time from when the power supply is applied, until the serial interface is ready for writing. 3

( = +5.V, T A = +25 C, unless otherwise noted.) R-DN ERROR (SB) R-IN ERROR (SB).1.5 -.5 R-DN ERROR vs. IPER POSITION -.1 16 32 48 64 IPER POSITION.1.5 R-IN ERROR vs. IPER POSITION toc1 toc4 R-IN ERROR (SB) R-DN ERROR (SB).1.5 -.5 R-IN ERROR vs. IPER POSITION -.1 16 32 48 64 IPER POSITION.1.5 R-DN ERROR vs. IPER POSITION Typical Operating Characteristics toc2 toc5 R-DN ERROR (SB) R-IN ERROR (SB).1.5 -.5 R-DN ERROR vs. IPER POSITION -.1 16 32 48 64 IPER POSITION.1.5 R-IN ERROR vs. IPER POSITION toc3 toc6 -.5 -.5 -.5 -.1 16 32 48 64 IPER POSITION -.1 16 32 48 64 IPER POSITION -.1 16 32 48 64 IPER POSITION IPER RESISTANCE (Ω) IPER RESISTANCE vs. IPER VOTAGE 15 = 3V 125 1 75 = 5V : = 5V, I SOURCE = 5µA 5 = 3V, I SOURCE = 3µA : = 5V, I SOURCE = 1µA 25 = 3V, I SOURCE = 6µA : = 5V, I SOURCE = 5µA = 3V, I SOURCE = 3µA 2 3 4 5 IPER VOTAGE (V) toc7 END-TO-END RESISTANCE CANGE (%).4.3.2.1 -.1 -.2 -.3 END-TO-END RESISTANCE PERCENTAGE CANGE vs. TEMPERATURE -.4-4 -15 1 35 6 85 11 TEMPERATURE ( C) toc8 -TO- RESISTANCE (kω) -TO- RESISTANCE vs. IPER POSITION 1 9 8 7 6 5 4 3 2 1 16 32 48 64 IPER POSITION toc9 4

SUPPY CURRENT (na) Typical Operating Characteristics (continued) ( = +5V, T A = +25 C, unless otherwise noted.) 3 25 2 15 1 5 STATIC SUPPY CURRENT vs. TEMPERATURE = 5V = 3V = = -4-15 1 35 6 85 11 TEMPERATURE ( C) GAIN (db) -3-6 -9-12 toc1 SUPPY CURRENT (na) 3 25 2 15 1 5 MIDSCAE IPER RESPONSE vs. FREQUENCY STATIC SUPPY CURRENT vs. SUPPY VOTAGE = = 2.5 3. 3.5 4. 4.5 5. 5.5 SUPPY VOTAGE (V) toc13 TD (db) -4-5 -6-7 -8-9 toc11 SUPPY CURRENT (µa) 1 1 1.1 SUPPY CURRENT vs. DIGITA INPUT VOTAGE = 3V = 5V.1 2 3 4 5 6 DIGITA INPUT VOTAGE (V) TOTA ARMONIC DISTORTION vs. FREQUENCY MIDSCAE, 1V RMS, R = 1kΩ toc14 toc12-15 -18.1 1 1 1 1 1, FREQUENCY (kz) -1-11.1.1 1 1 1 FREQUENCY (kz) TAP-TO-TAP SITCING TRANSIENT toc15 OUTPUT 5mV/div 4ns 5

Typical Operating Characteristics (continued) ( = +5V, T A = +25 C, unless otherwise noted.) TAP-TO-TAP SITCING TRANSIENT toc16 4ns POER-UP IPER TRANSIENT toc18 OUTPUT 5mV/div POER-UP IPER TRANSIENT toc17 2µs POER-UP IPER TRANSIENT toc19 OUTPUT OUTPUT OUTPUT 1µs 2µs 6

PIN NAME FUNCTION 1 iper Connection 2 Detailed Description The 1kΩ/5kΩ/1kΩ end-to-end resistance digitally-controlled potentiometers offer 64 wiper tap positions accessible along the resistor array between and. These devices function as potentiometers or variable resistors (see Figure 1). The wiper () position is adjusted sequentially through the tap positions using a simple 2-wire up/down interface. These digital potentiometers provide an optional one-time programmable feature that sets and locks the power-on reset position of the wiper (see the PV One- Time Programming section). Once the desired wiper position is programmed, the 2-wire interface can be disabled to prevent unwanted adjustment. Digital Interface Operation The provide two modes of operation when the serial interface is active: increment mode or decrement mode. The serial interface is only active when is low. The and inputs control the position of the wiper along the resistor array. Set high to increment the when transitions from high to low (Figure 2). Set low to decrement the when transitions high to low (Figure 3). Once is held low, each lowto-high transition at increments or decrements the wiper one position. Once the increment or decrement POTENTIOMETER CONFIGURATION Pin Description Chip-Select Input. A high-to-low transition determines the increment/decrement mode. Increment if is high, or decrement if is low. is also used for one-time programming. See the PV One- Time Programming section. 3 Supply Voltage. Bypass with a.1µf capacitor to. 4 Ground 5 PV 6 7 Resistor ow Terminal 8 Resistor igh Terminal EP One-Time Programming Voltage. Connect PV to an 11V supply at the time the device is programmed/locked, and bypass with a 22µF capacitor to. For normal operation, connect to or leave floating. Up/Down Control Input. hen is low, a low-to-high transition at increments or decrements the wiper position. See the Digital Interface Operation section. Exposed Pad (TDFN Only). Internally connected to. Connect to a large ground plane to maximize thermal dissipation. VARIABE-RESISTOR CONFIGURATION Figure 1. Potentiometer/Variable-Resistor Configuration mode is set, the device remains in that mode until goes high. Idle high for normal operation. If is low when transitions low to high, the wiper moves one additional tap in its present direction. The wiper remains in the same position when is high and transitions low to high. After returns high, the wiper position remains the same (Figure 4). Additional increments do not change the wiper position when the wiper is at the maximum end of the resistor array. Additional decrements do not change the wiper position when the wiper is at the minimum end of the resistor array. 7

t UP t CU t CI t I t I t IC t I V Figure 2. Increment-Mode Timing Diagram t UP t CU t CI t I t I t IC t I V Figure 3. Decrement-Mode Timing Diagram V IPER REMAINS TE SAME IT IG AND RISING IPER CANGES IT O AND RISING Figure 4. ow-to-igh Transition Timing Diagram PV One-Time Programming The power up and function after power-up with the wiper position set in one of three ways: 1) Factory default power-up position, midscale, adjustable wiper 2) A newly programmed power-up position, adjustable wiper 3) A new programmed power-up position, locked wiper The wiper is set to the factory default position at powerup (midscale, tap 31). Connect PV to or leave floating to continue powering up the wiper position at midscale. See Table 1 for the default and one-time programming options. 8

+11V PV V t PC 6 PUSES RECORD IPER POSITION Figure 5. One-Time Program Mode, Serial-Interface Timing Diagram Table 1. One-Time Programming Options MODE Factory Default (Unprogrammed) Programmed by Six Pulses Programmed by Seven Pulses POER-ON RESET IPER POSITION Tap 31 Programmed position Programmed position Change the wiper s power-up position using the PV one-time programming sequence after power-up (see Figure 5). After setting the wiper to the desired powerup position, perform the following six-step sequence: 1) Set and high. 2) Connect an external voltage source at PV in the range of +11V to +11.55V. 3) Pull low. 4a) Pulse high for six cycles, consisting of starting low and going high for at least t C, and then low for at least t C, to change the wiper power-up position. The wiper remains adjustable. 4b) Pulse high for seven cycles, consisting of starting low and going high for at least t C and then low for at least t C, to change the wiper power-up position and lock the wiper in that same position. The seventh pulse is labeled the optional lockout bit in Figure 5. 5) Connect PV to or release the voltage source, leaving PV floating. 6) Pull high. t C t C t CP t P ADJUSTABE IPER Yes Yes No 11V 22µF TRACE PARASITI PARASITIC < 25µ OPTIONA 7T OCKOUT BIT R PARASITIC < 4Ω Figure 6. PV Power-Supply Decoupling Pulse high for six cycles to change the wiper powerup position. The wiper position returns to this programmed position on power-up, but remains adjustable. Pulse high for seven cycles to lock the / / to a specific wiper position with no further adjustments allowed. This effectively converts the potentiometer to a fixed resistor-divider. The seventh pulse locks the wiper position and disables the up/down interface. Once locked, connect and high, low, or leave them floating without increasing the supply current (see Table 1). If six clock pulses are used, the interface is enabled and the device can be put into program mode again. owever, the part uses one-time programmable (OTP) memory and should be programmed only once. If the part is programmed more than once, all applied values are ORed together. Thus, if 111 is programmed the first time and 111 is programmed the second time, the result will be 111111. The external PV power supply must source at least 5mA and have a good transient response. Decouple the PV power supply with a 22µF capacitor to. Ensure that no more than 25µ of inductance and/or 4Ω of parasitic resistance exists between the capacitor and the device (see Figure 6). PV 9

5V V OUT Figure 7. Positive CD Bias Control Using a Voltage-Divider V IN R3 C R2 5V 3V R1 V OUT 5V 3V V OUT Figure 8. Positive CD Bias Control Using a Variable Resistor +5V V IN MAX616 OUT ADJ R 1 R 2 V REF V = 1.23V x 1kΩ FOR TE R 2 (kω) V = 1.23V x 5kΩ FOR TE R 2 (kω) V = 1.23V x 1kΩ FOR TE R 2 (kω) Figure 9. Programmable Filter Figure 1. Adjustable Voltage Reference Applications Information Use the in applications requiring digitally controlled adjustable resistance, such as CD contrast control where voltage biasing adjusts the display contrast, or for programmable filters with adjustable gain and/or cutoff frequency. Positive CD Bias Control Figures 7 and 8 show an application where the voltagedivider or variable resistor is used to make an adjustable, positive CD bias voltage. The op-amp provides buffering and gain to the resistor-divider network made by the potentiometer (Figure 7), or to a fixed resistor and a variable resistor (Figure 8). Programmable Filter Figure 9 shows the configuration for a 1st-order programmable filter. The gain of the filter is adjusted by R2, and the cutoff frequency is adjusted by R3. Use the following equations to calculate the gain (G), and the -3dB cutoff frequency (f C ), only up to frequencies one decade below the wiper -3dB bandwidth. R1 G = 1 + R2 1 fc = 2π xr3 xc Adjustable Voltage Reference Figure 1 shows the used as the feedback resistors in an adjustable-voltage reference application. 1

ayout and Power-Supply Considerations Proper layout and power-supply bypassing can affect device performance. Bypass with a.1µf capacitor as close to the device as possible. hen programming the wiper position, bypass PV with a 22µF capacitor as close to the device as possible. For a power supply with a slew rate greater than 1V/µs or in applications where power-supply overshoot is prevalent, connect a 1Ω resistor in series to and bypass with an additional 4.7µF capacitor to ground. Chip Information TRANSISTOR COUNT: 342 PROCESS: BiCMOS Package Information For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note that a "+", "#", or "-" in the package code indicates RoS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoS status. PACKAGE TYPE PACKAGE CODE DOCUMENT NO. 8 TDFN-EP T833+2 21-137 8 µmax U8+1 21-36 11

REVISION NUMBER REVISION DATE DESCRIPTION Revision istory PAGES CANGED 5/5 Initial release 1 7/9 Added lead-free note to the Ordering Information. Added exposed pad information to the Pin Description. Added text to PV One-Time Programming section. 1, 7, 9 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 12 Maxim Integrated Products, 12 San Gabriel Drive, Sunnyvale, CA 9486 48-737-76 29 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.