Features SO-7. Typical Configuration for Low-Side -ve Supply Rail DRAIN. Top View

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V ACTIVE OR'ING MOSFET CONTROLLER IN SO7 Description The is a V Active OR ing MOSFET Controller designed for driving a very low R DS(ON) Power MOSFET as an ideal diode. This replaces the standard rectifier to reduce the forward voltage drop and overall increase the power transfer efficiency. The can be used on both high-side and low-side power supply units (PSU) with rails up to ±V. It enables very low R DS(ON) MOSFETs to operate as ideal diodes as the turn-off threshold is only -3mV with ±mv tolerance. In the typical 8V configuration, the standby power consumption is <5mW as the low quiescent supply current is <1mA. During PSU fault condition, the OR ing Controller detects the power reduction and rapidly turns off the MOSFET in <ns to block reverse current flow and avoid the common bus voltage dropping. Applications Active OR ing Controller in: (N+1) Redundant Power Supplies Telecom and Networking Data Centers and Servers -ve Rail Power Supply Rail Typical Configuration for Low-Side -ve Supply Rail VD DRAIN VG GATE VS ZXGD3111 Vcc C1 -ve Vout SO-7 Top View Features Active OR ing MOSFET Controller for High- or Low-Side PSU Ideal Diode to Reduce Forward Voltage Drop -3mV Typical Turn-Off Threshold with ±mv Tolerance rain Voltage Rating 5V Rating <5mW Standby Power with Quiescent Supply Current <1mA <ns Turn-Off Time to Minimize Reverse Current Totally Lead-Free & Fully RoHS compliant (Notes 1 & ) Halogen and Antimony free. Green Device (Note 3) Mechanical Data Case: SO-7 Case Material: Molded Plastic. Green Molding Compound. UL Flammability Rating 9V- Moisture Sensitivity: Level 1 per J-STD- Terminals: Finish Matte Tin Plated Leads, Solderable per MIL-STD-, Method 8 Weight:.7 grams (Approximate) V GATE 1 3 Top View Pin-Out 7 5 DRAIN P P Pin Functions Pin Number Pin Name Pin Function and Description 1, 3 GATE 5, P 7 DRAIN Ground Connect this pin to the MOSFET source terminal and ground reference point. Power Supply This supply pin should be closely decoupled to ground with a X7R type capacitor. Gate Drive This pin sources (I SOURCE) and sinks (I SINK) current into the MOSFET gate. If > 1V, then the GATE-to- will clamp at 1V. The turn-on time of the MOSFET can be programmed through an external gate resistor (R G). Power Ground Connect this pin to the MOSFET source terminal and ground reference point. Drain Sense Connect this pin to the MOSFET drain terminal to detect the change in drain-source voltage. 1 of 1 April 17

Ordering Information (Note ) Product Marking Reel Size (inches) Tape Width (mm) Quantity per Reel TC ZXGD3111 13 1,5 Notes: 1. No purposely added lead. Fully EU Directive /95/EC (RoHS) & 11/5/EU (RoHS ) compliant.. See http:///quality/lead_free.html for more information about Diodes Incorporated s definitions of Halogen- and Antimony-free, "Green" and Lead-free. 3. Halogen- and Antimony-free "Green products are defined as those which contain <9ppm bromine, <9ppm chlorine (<15ppm total Br + Cl) and <1ppm antimony compounds.. For packaging details, go to our website at http:///products/packages.html. Marking Information ZXGD 3111 YY WW ZXGD = Product Type Marking Code, Line 1 3111 = Product Type Marking Code, Line YY = Year (ex: 17 = 17) WW = Week (1 to 53) Absolute Maximum Ratings (Voltage relative to, @T A = +5 C, unless otherwise specified.) Characteristic Symbol Value Unit Supply Voltage 5 V Drain Pin Voltage -3 to V Gate Output Voltage -3 to +3 V Gate Driver Peak Source Current I SOURCE A Gate Driver Peak Sink Current I SINK 5 A Thermal Characteristics (@T A = +5 C, unless otherwise specified.) Power Dissipation Linear Derating Factor Characteristic Symbol Value Unit 9 (Note 5) 3.9 55 (Note ) 5. mw P D 7 mw/ C (Note 7) 5.7 785 (Note 8).8 (Note 5) 55 (Note ) 191 R θja C/W Thermal Resistance, Junction to Ambient (Note 7) 173 (Note 8) 159 Thermal Resistance, Junction to Lead (Note 9) R θjl 135 C/W Operating and Storage Temperature Range T J, T STG -5 to +15 C ESD Ratings (Note 1) Characteristic Symbol Value Unit JEDEC Class Electrostatic Discharge Human Body Model ESD HBM, V Electrostatic Discharge Machine Model ESD MM V B Notes: 5. For a device surface mounted on minimum recommended pad layout FR PCB with high coverage of single sided 1oz copper, in still air conditions; the device is measured when operating in a steady-state condition.. Same as Note 5, except Pin 3 () and pins 5 & (P) are both connected to separate 5mm x 5mm 1oz copper heat-sinks. 7. Same as Note, except both heat-sinks are 1mm x 1mm. 8. Same as Note, except both heat-sinks are 15mm x 15mm. 9. Thermal resistance from junction to solder-point at the end of each lead on pins & 3 () and pins 5 & (). 1. Refer to JEDEC specification JESD-A11 and JESD-A11. of 1 April 17

Max Power Dissipation (W) Thermal Derating Curve.8.7..5..3..1 Minimum Layout 15mm x 15mm 1mm x 1mm 5mm x 5mm. 8 1 1 1 1 Junction Temperature ( O C) Derating Curve Electrical Characteristics (@ = 1V, T A = +5 C, unless otherwise specified.) Characteristic Symbol Min Typ Max Unit Test Condition Input Supply Operating Supply Voltage V Quiescent Current I Q µa -.V RAIN V Gate Driver Gate Peak Source Current I SOURCE. A = 7nF Gate Peak Sink Current I SINK 3.3 Gate Peak Source Current (Note 11) I SOURCE 1 A ATE = 5V & RAIN = -1V Gate Peak Sink Current (Note 11) I SINK 1.8 A ATE = 5V & RAIN = 1V Detector Under DC Condition Turn-Off Threshold Voltage V T -5-3 -1 mv 1V (OFF).1.3 RAIN mv & = 1V 9. RAIN = -8mV & = 1V V Load: 5nF Gate Output Voltage (OFF).1.3 DRAIN mv & Capacitor Connected = V V in Parallel with 5kΩ V 3. DRAIN = -8mV & Resistor = V (OFF).1.3 RAIN mv & = V 1 RAIN = -8mV & = V Switching Performance Turn-On Propagation Delay t D(RISE) Gate Rise Time t = 7nF R 95 ns Rise and Fall Measured 1% to 9% Turn-Off Propagation Delay t D(FALL) Refer to Application Test Circuit Below Gate Fall Time t F 131 Note: 11. Measured under pulsed conditions. Pulse width 3μs. Duty cycle %. 3 of 1 April 17

Layout Considerations The GATE Pin should be close to the MOSFET gate to minimize trace resistance and inductance to maximize switching performance. While the to Pin needs an X7R type capacitor closely decoupling the supply. Trace widths should be maximized in the high current paths through the MOSFET and ground return loop in order to minimize the effects of circuit resistance and inductance. The ground return loop should also be as short as possible. For thermal consideration, the main heat path is from Pin 3 (), and pins 5 and (P). For best thermal performance, the copper area connected to Pin 3 (), and pins 5 and (P) should be maximized. Active OR ing or (N+1) Redundancy Application PSU (A) OR-ing Rectifier Common +ve Bus +ve Rail OR-ing Rectifier LOAD PSU (B) Critical systems require fault-tolerant power supply that can be achieved by paralleling two or more PSUs into (N+1) redundancy configuration. During normal operation, usually all PSUs equally share the load for maximum reliability. If one of the PSUs is unplugged or fails, then the other PSU fully supports the load. To avoid the faulty PSU from affecting the common bus, then an OR ing rectifier blocks the reverse current flow into the faulty PSU. Likewise during hot-swapping, the OR ing rectifiers isolate a PSU s discharged output capacitors from the common bus. As the load current is in the tens of amps then a standard rectifier has a significant forward voltage drop. This both wastes power and significantly drops the potential on low voltage rails. Hence, very low R DS(ON) Power MOSFETs can replace the standard rectifiers and the ZXGD3111 controls the MOSFET as an ideal diode. Functional Block Diagram Vcc ZXGD3111 + DRAIN - Differential amplifier Driver GATE Threshold voltage The device is comprised of a differential amplifier and high current driver. The differential amplifier acts as a detector and monitors the DRAIN-to- Pin voltage difference. When this difference is less than the threshold voltage (V T), then a positive output voltage approaching is given on the GATE Pin. If > 1V, then the GATE-to- will clamp at 1V. Conversely, when the DRAIN-to- Pin voltage difference is greater than V T, then GATE Pin voltage is rapidly reduced towards the voltage. of 1 April 17

Typical Application Circuits 1V / 15V N-channel Power MOSFET -8V Rail VD VS Common -8V Bus -8V VG PSU (A) DRAIN GATE ZXGD3111 C1 LOAD Rail Vcc ZXTR1 VOUT VIN Common 1V/15V N-channel Power MOSFET -8V Rail VD VS PSU (B) Rail VG DRAIN GATE ZXGD3111 Vcc C1 ZXTR1 VOUT VIN Focus Application of the ZXGD3111 OR ing Controller is for Redundant Low-Side -8V Power Supply Rail ZXTR1 (HV input, 1V output regulator) is suggested to power the of ZXGD3111 from high voltage rail. Example of the ZXGD3111 OR ing Controller in a Redundant High-Side +8V Power Supply Rail with Supply 5 of 1 April 17

Operation in Typical Application The ZXGD3111 operation is described step-by-step with reference to the typical application circuits and the timing diagram below: 1. The ZXGD3111 differential amplifier monitors the MOSFET s drain-source voltage (S).. At system start up, the MOSFET body diode is forced to conduct current from the input PSU to the load and S is approximately -.V as measured by the differential amplifier between DRAIN-to- pins. 3. As S < V T (threshold voltage), the differential amplifier outputs a positive voltage approaching with respect to. This feeds the driver stage from which the GATE Pin voltage rises towards. If > 1V, then the GATE-to- will clamp at 1V.. The sourcing current out of the GATE Pin drives the MOSFET gate to enhance the channel and turn it on. 5. If a short condition occurs on the input PSU, it causes the MOSFET S to increase.. When S > V T, then the differential amplifier s output goes to and the driver stage rapidly pulls the GATE Pin voltage to, turning off the MOSFET channel. This prevents high reverse current flow from the load to the PSU which could pull down the common bus voltage causing catastrophic system failure. MOSFET Drain Voltage S V V T -.V MOSFET Gate Voltage S V t R t D(FALL) t D(RISE) t F MOSFET Drain Current I D A of 1 April 17

Switching Time (ns) Supply Current (ma) Gate Voltage (V) Drain Voltage (mv) Gate Voltage (V) Gate Voltage (V) Typical Electrical Characteristics (@T A = +5 C, unless otherwise specified.) 18 1 1 1 1 8 Capacitive load only = V -1-9 -8-7 - -5 - -3 - -1 Drain Voltage (mv) Transfer Characteristic = V = 1V = 1V 18 1 1 1 1 8 Capacitive load and 5k pull down resistor = V -1-9 -8-7 - -5 - -3 - -1 Drain Voltage (mv) Transfer Characteristic = V = 1V = 1V 1 8 T A = 5 O C = 1V 5k pull down T A = -5 O C -3. -.5 -. -1.5-1. -.5. Drain Voltage (mv) Transfer Characteristic T A = 15 O C T A = 85 O C T A = 15 O C. -. -. -. -.8-1. -1. -1. -1. -1.8 = 1V = 1V 5k pull down -. -5 5 1 15 Temperature ( O C) Drain Sense Voltage vs Temperature 5 1 = 1V =7nF f=5khz = V 1 T ON = t D1 + t R 3 = 1V = 1V 8 T OFF = t D + t F 1 = V -5-5 5 5 75 1 15 15 Temperature ( O C) Switching vs Temperature 8 1 Capacitance (nf) Supply Current vs Capacitive Load 7 of 1 April 17

Peak Drive Current (A) Supply Current (ma) Time (ns) Gate Drive Source Current (A) Gate Drive Sink Current (A) Gate Voltage (V) DrainVoltage (mv) GateVoltage (V) Drain Voltage (mv) Typical Electrical Characteristics (Cont.) (@T A = +5 C, unless otherwise specified.) 1 15 1 15 1 8 - -15-1. -.5..5 1. 1.5. Switch Off Speed V=1V =7nF Time (s) 1 5-5 -1 1 8 1-5 -1 - -15-1. -.5..5 1. 1.5. Switch On Speed V=1V =7nF Time (s) 5 Sink Current Time Scale (s) 5 53 5 51 5 1. -5 1 =1V.8-9. I SOURCE I SINK -3 T OFF = t D + t F T ON = t D1 + t R.. V=1V =7nF - -1 3 1 1 1 Capacitance (nf) Switching vs Capacitive Load. -1 1 3 5 source Current Time Scale(s) Gate Drive Current =1V I SINK 1 1 =1V =1nF =7nF =1nF =.7nF =1nF -I SOURCE 1 1 1 1 Capacitance (nf) Gate Current vs Capacitive Load.1 1 1 1 1 1 Frequency (Hz) Supply Current vs Frequency 8 of 1 April 17

Package Outline Dimensions Please see http:///package-outlines.html for the latest version. SO-7 1 9 (All sides) R.1 e A1 D b E A ± 3 h 7 E1 E1a 5 L Q c Gauge Plane Seating Plane SO-7 Dim Min Max Typ A 1. 1.5 1.5 A1.1..15 b.3.5. c.15.5. D.85.95.9 E 5.9.1. E1 3.8 3.9 3.85 E1a 3.85 3.95 3.9 e 1.7 h.35 L..8.7 Q..7.5 All Dimensions in mm Suggested Pad Layout Please see http:///package-outlines.html for the latest version. SO-7 X1 Y1 Y Value Dimensions (in mm) C 1.7 X.8 X1.1 Y 1.55 Y1.5 C X Note: For high voltage applications, the appropriate industry sector guidelines should be considered with regards to creepage and clearance distances between device Terminals and PCB tracking. 9 of 1 April 17

IMPORTANT NOTICE DIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS DOCUMENT, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION). Diodes Incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other changes without further notice to this document and any product described herein. Diodes Incorporated does not assume any liability arising out of the application or use of this document or any product described herein; neither does Diodes Incorporated convey any license under its patent or trademark rights, nor the rights of others. Any Customer or user of this document or products described herein in such applications shall assume all risks of such use and will agree to hold Diodes Incorporated and all the companies whose products are represented on Diodes Incorporated website, harmless against all damages. Diodes Incorporated does not warrant or accept any liability whatsoever in respect of any products purchased through unauthorized sales channel. Should Customers purchase or use Diodes Incorporated products for any unintended or unauthorized application, Customers shall indemnify and hold Diodes Incorporated and its representatives harmless against all claims, damages, expenses, and attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized application. Products described herein may be covered by one or more United States, international or foreign patents pending. Product names and markings noted herein may also be covered by one or more United States, international or foreign trademarks. This document is written in English but may be translated into multiple languages for reference. Only the English version of this document is the final and determinative format released by Diodes Incorporated. LIFE SUPPORT Diodes Incorporated products are specifically not authorized for use as critical components in life support devices or systems without the express written approval of the Chief Executive Officer of Diodes Incorporated. As used herein: A. Life support devices or systems are devices or systems which: 1. are intended to implant into the body, or. support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in significant injury to the user. B. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or to affect its safety or effectiveness. Customers represent that they have all necessary expertise in the safety and regulatory ramifications of their life support devices or systems, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use of Diodes Incorporated products in such safety-critical, life support devices or systems, notwithstanding any devices- or systems-related information or support that may be provided by Diodes Incorporated. Further, Customers must fully indemnify Diodes Incorporated and its representatives against any damages arising out of the use of Diodes Incorporated products in such safety-critical, life support devices or systems. Copyright 17, Diodes Incorporated 1 of 1 April 17