FSUSB22 Low-Power, 2-Port, High-Speed USB 2.0 (480Mbps) Switch

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March 2008 FSUSB22 Low-Power, 2-Port, High-Speed USB 2.0 (480Mbps) Switch Features -40dB Off Isolation at 250MHz -40dB Non-adjacent Channel Crosstalk at 250MHz On Resistance: 4.5Ω Typical (RON) -3dB Bandwidth: 750MHz Low-Power Consumption: 1µA Maximum Control Input: TTL Compatible Bi-directional Operation USB High-Speed and Full-Speed Signaling Capability Applications Cell Phones, PDAs, Digital Cameras, Notebook Computers Ordering Information Description FSUSB22 is a low-power, high-bandwidth switch specially designed for applications switching high-speed USB 2.0 signals in handset and consumer applications; such as cell phone, digital camera, and notebook with hubs or controllers of limited USB I/O. The wide bandwidth (750MHz) allows signals to pass with minimum edge and phase distortion. Superior channelto-channel crosstalk results in minimal interference. It is compatible with the USB2.0 Hi-Speed standard.. Part Number FSUSB22BQX FSUSB22QSC FSUSB22QSCX FSUSB22MTC FSUSB22MTCX Operating Temperature Range -40 to +85 C -40 to +85 C -40 to +85 C -40 to +85 C -40 to +85 C Package 16-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241, 2.5 x 3.5mm 16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150-inch Wide 16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150-inch Wide 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Packing Method Tape and Reel Tube Tape and Reel Tube Tape and Reel All packages are lead free per JEDEC: J-STD-020B standard. 2005Fairchild Semiconductor Corporation FSUSB22 Rev. 1.0.3 www.fairchildsemi.com

Logic Diagram Docking Station USB 2.0 Host Controller S 1B 1 1B 2 1A 2B 1 2B 2 2A GND Docking Connector D+ D- D+ D- FSUSB22 Notebook Computer D+ D- D+ D- D- D+ D+ D- USB Port USB Port USB Port USB Port Analog Symbol 1B 1 1B 2 1A 2B 1 2B 2 2A 2 3 4 5 6 7 S GND V CC 1 16 8 9 3A 15 14 /OE 4B 1 13 4B 2 Figure 1. Logic Diagram Figure 2. Analog Symbol 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 V CC /OE 4B 1 4B 2 4A 3B 1 3B 2 3A 1B 1 1B 2 1A 2B 1 2B 2 2A 2 3 4 5 6 7 S GND V CC 1 16 8 9 3A 12 11 10 15 14 13 12 4A 3B 1 3B 2 /OE 4B 1 4B 2 4A 11 3B 1 10 3B 2 Figure 3. QSOP and TSSOP Pin Configuration Figure 4. Pad Assignment for DQFN Pin Descriptions Truth Table Pin # Pin Names Description 1 S Select Input 2,3,5,6,10,11,13,14 1B 1,1B 2, 2B 1,2B 2,3B 2,3B 1,4B 2,4B 1 Bus B 8 GND Ground 4,7,9,12 1A,2A,3A,4A Bus A 15 /OE Bus Switch Enable 16 V CC Supply Voltage S OE Function Don t Care HIGH Disconnect LOW LOW A=B 1 HIGH LOW A=B 2 FSUSB22 Rev. 1.0.3 2

Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Min. Max. Unit V CC Supply Voltage -0.5 4.6 V V S DC Switch Voltage -0.5 V CC + 0.05 V V IN DC Input Voltage (1) -0.5 4.6 V I IK DC Input Diode Current, V IN<0V -50 ma I OUT DC Output Sink Current 128 ma I CC / I GND DC V CC / GND Current ±100 ma T STG Storage Temperature Range -65 +150 C ESD Human Body Model, JESD22-A114 4 kv Note: 1. The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are observed. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol Parameter Min. Max. Unit V CC Power Supply Operating 3.0 3.6 V V IN Input Voltage 0 V CC V V OUT Output Voltage 0 V CC V t r, t f Input Rise and Fall Time Switch Control Input (2) 0 5 Switch I/O 0 DC ns/v T A Operating Temperature, Free Air -40 +85 C Note: 2. Unused control inputs must be held HIGH or LOW. They may not float. FSUSB22 Rev. 1.0.3 3

DC Electrical Characteristics Typical values are at V CC = 3.0V and T A = 25 C. Symbol Parameter Conditions V CC (V) T A =-40 to +85 C Min. Typ. Max. V IK Clamp Diode Voltage I IN = -18mA 3.0-1.2 V V IH High-Level Input Voltage 3.0 to 3.6 2.0 V V IL Low-Level Input Voltage 3.0 to 3.6 0.8 V I IN Input Leakage Current 0 V IN 3.6V 3.6 ±1.0 µa I OFF Off-state Leakage Current Units 0 A, B V CC 3.6 ±1.0 µa V IN = 0.8V, I ON = 8mA 3.0 5 7 R ON Switch On Resistance (3) V IN = 3.0V, I ON = 8mA 3.0 4.5 6.5 ΔR ON Delta R ON V IN = 0.8V, V IN = 0V - 1.5, I ON = 8mA 3.0 0.3 Ω R FLAT(ON) On Resistance Flatness (4) I OUT = 8mA 3.0 1 Ω I CC Quiescent Supply Current V IN = V CC or GND, I OUT = 0 3.6 1 µa Notes: 3. Measured by the voltage drop between the A and B pins at the indicated current through the switch. On resistance is determined by the lower of the voltages on the A or B pins. 4. Flatness is defines as the difference between the maximum and the minimum value on resistance over the specified range of conditions. Ω FSUSB22 Rev. 1.0.3 4

AC Electrical Characteristics Typical values are at V CC = 3.0V and T A = 25 C. Symbol Parameter Conditions V CC (V) Min. Typ. Max. Units Figure t ON t OFF Turn-on Time S-to-Bus B Turn-off Time S-to-Bus B 3.0 to 3.6 4.5 6.0 ns 3.0 to 3.6 2.5 4.0 ns Figure 9 Figure 10 Figure 9 Figure 10 t PD Propagation Delay C L = 10pF 3.0 to 3.6 0.25 ns Figure 14 O IRR X TALK Non-Adjacent Off Isolation Non-Adjacent Channel Crosstalk f = 250MHz, R L = 50Ω f = 250MHz, R L = 50Ω 3.0 to 3.6-30 db Figure 11 3.0 to 3.6-38 db Figure 12 BW -3dB Bandwidth R L = 50Ω 3.0 to 3.6 750 MHz Figure 13 USB Related AC Electrical Characteristics Typical values are at V CC = 3.0V and T A = 25 C. Symbol Parameter Conditions V CC (V) Min. Typ. Max. Units Figure t SK(O) t SK(P) T J Channel-to Channels Skew Skew of Opposite Transition of the Same Output Total Jitter C L = 10pF 3.0 to 3.6 0.051 pf C L = 10pF 3.0 to 3.6 0.020 pf R L = 50Ω, C L = 10pF t R = t F = 750ps at 480MPs 3.0 to 3.6 0.210 Figure 14 Figure 16 Figure 14 Figure 16 Capacitance Typical values are at V CC = 3.0V and T A = 25 C. Symbol Parameter Conditions Typ. Unists C IN Control Pin Input Capacitance V CC = 0V 2.5 pf C ON A/B On Capacitance V CC = 3.3V, /OE = 0V 12 pf C OFF Port B Off Capacitance V CC and /OE = 3.3V 4.5 pf FSUSB22 Rev. 1.0.3 5

Performance Characteristics Figure 5. Gain vs. Frequency Figure 6. Off Isolation Figure 7. Crosstalk Figure 8. R ON FSUSB22 Rev. 1.0.3 6

AC Loadings and Waveforms B 1 B 2 Control S /OE 50Ω GND Notes: Input driven by 50Ω source terminated in 50Ω. CL includes load and stray capacitance. Input PRR-1.0MHz, t W = 500ns. Figure 9. AC Test Circuit SELECT INPUT t r = 2.5ns 90% 90% A 10% 10% t ON OUTPUT 1.5V 1.5V 90% 90% 10pF t f = 2.5ns 3.0V t OFF GND V OH V OL Figure 10. AC Waveforms B 1 A B 1 A 50Ω 50Ω 100Ω 100Ω B 2 S Control S Control 50Ω /OE Figure 11. Off Isolation Test /OE Figure 12. Crosstalk Test FSUSB22 Rev. 1.0.3 7

AC Loadings and Waveforms Input 400mV Input Output B GND Output t PLH S Control 50Ω /OE Figure 13. Bandwidth Test t PLH A Figure 14. Propagation Delay t SK(P) = t PHL - t PHL t PHL Monitor t PHL 800mV V OH V OL 800mV 400mV 0 V OH V OL Figure 15. Pulse Skew t SP(P) 800mV Input 400mV t PLH1 t PHL1 0 Output 1 t SK(O) tsk(o) Output 2 t PLH2 t PHL2 t SK(O) = t PLH1 - t PLH2 or t PHL1 - t PHL2 Figure 16. Output Skew t SK(O) FSUSB22 Rev. 1.0.3 8

Physical Dimensions Figure 17. 16-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241,2.5 x 3.5mm Note: click here for tape and reel specifcations, available at: http://www.fairchildsemi.com/products/analog/pdf/mlp16_25x35_tnr.pdf Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ FSUSB22 Rev. 1.0.3 9

Physical Dimensions TOP VIEW SIDE VIEW LAND PATTERN RECOMMENDATION END VIEW DETAIL A Figure 18. 16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150-inch Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ FSUSB22 Rev. 1.0.3 10

Physical Dimensions 5.00±0.10 4.55 0.11 4.4±0.1 1.45 0.65 5.00 12 4.45 5.90 7.35 MTC16rev4 Figure 19. 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ FSUSB22 Rev. 1.0.3 11

FSUSB22 Rev. 1.0.3 12

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